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IRLM220A
N-Channel A-FET
200 V, 1.13 A, 800 mΩ
FEATURES
BVDSS = 200 V
ν Avalanche Rugged Technology
RDS(on) = 0.8 Ω
ν Rugged Gate Oxide Technology
ν Lower Input Capacitance
ID = 1.13 A
ν Improved Gate Charge
ν Extended Safe Operating Area
ν Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
ν Lower RDS(ON) : 0.609 Ω (Typ.)
D
S
SOT-223
G
D
Absolute Maximum Ratings
IRLM220ATF
Units
Drain-to-Source Voltage
200
V
Continuous Drain Current (TA=25°C)
1.13
Continuous Drain Current (TA=70°C)
0.9
Symbol
VDSS
ID
Characteristic
(1)
A
IDM
Drain Current-Pulsed
VGS
Gate-to-Source Voltage
EAS
Single Pulsed Avalanche Energy
(2)
IAR
Avalanche Current
(1)
EAR
Repetitive Avalanche Energy
(1)
0.2
mJ
dv/dt
Peak Diode Recovery dv/dt
(3)
5
V/ns
2
W
0.016
W/°C
PD
TJ , TSTG
TL
Total Power Dissipation (TA=25°C) *
Linear Derating Factor *
Operating Junction and
9
A
±20
V
29
mJ
1.13
A
- 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
300
Purposes, 1/8” from case for 5-seconds
Thermal Resistance
Symbol
RθJA
Characteristic
Junction-to-Ambient *
Typ.
Max.
Units
--
62.5
°C/W
* When mounted on the minimum pad size recommended (PCB Mount).
©1999 Fairchild Semiconductor Corporation
IRLM220A Rev. C0
1
www.fairchildsemi.com
IRLM220A — N-Channel A-FET
November 2013
Part Number
IRLM220ATF
Top Mark
IRLM220A
Package
SOT-223
Electrical Characteristics T
Symbol
Packing Method
Tape and Reel
Min. Typ. M-ax. Units
Characteristic
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
IDSS
RDS(on)
Gate Threshold Voltage
200
-1.0
--
--
0.18
2.0
--
100
Gate-Source Leakage , Forward
--
--
-100
Gate-Source Leakage , Reverse
--
--
10
--
100
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
--
V
nA
See Fig 7
VDS=5V,ID=250µA
VGS=20V
VGS=--20V
VDS=200V
VDS=160V,TC=125°C
--
--
--
0.8
Ω
VGS=5V,ID=0.57A
S
VDS=40V,ID=0.57A
--
2.8
--
Ciss
Input Capacitance
--
330
430
Coss
Output Capacitance
--
55
70
Crss
Reverse Transfer Capacitance
--
8
30
td(on)
Turn-On Delay Time
--
6
25
Rise Time
--
24
20
Turn-Off Delay Time
--
6
60
Fall Time
--
6
20
Qg
Total Gate Charge
--
10.3
15
Qgs
Gate-Source Charge
--
2.0
--
Qgd
Gate-Drain (“Miller”) Charge
--
4.4
--
tf
VGS=0V,ID=250µA
--
Forward Transconductance
td(off)
V
Test Condition
V/°C ID=250µA
µA
gfs
tr
Quantity
4000 units
= 25 C unless otherwise noted.
∆BV/∆TJ
IGSS
Tape Width
12 mm
o
C
BVDSS
VGS(th)
Reel Size
13 "
pF
VGS=0V,VDS=25V,f =1MHz
See Fig 5
VDD=100V,ID=5A,
ns
RG=9Ω
See Fig 13
(4)
VDS=160V,VGS=5V,
nC
ID=5A
See Fig 6 & Fig 12 (4)
Source-Drain Diode Ratings and Characteristics
Symbol
Characteristic
IS
Continuous Source Current
ISM
Pulsed-Source Current
VSD
Min. Typ. Max. Units
--
1.13
--
--
9
Diode Forward Voltage
--
--
1.5
trr
Reverse Recovery Time
--
140
Qrr
Reverse Recovery Charge
--
0.59
-(1)
A
Test Condition
Integral reverse pn-diode
in the MOSFET
V
TJ=25°C,IS=1.13A,VGS=0V
--
ns
TJ=25°C,IF=5A
--
µC
diF/dt=100A/µs
Notes ;
① Repetitive rating : pulse-width limited by maximum junction temperature.
② L = 35 mH, IAS = 1.13 A, VDD = 50 V, RG = 27 Ω, starting TJ = 25°C.
③ ISD ≤ 5 A, di/dt ≤ 180 A/µs, VDD ≤ BVDSS , starting TJ = 25°C.
④ Essentially independent of operating temperature.
©1999 Fairchild Semiconductor Corporation
IRLM220A Rev. C0
2
www.fairchildsemi.com
IRLM220A — N-Channel A-FET
Package Marking and Ordering Information
IRLM220A — N-Channel A-FET
!
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
V
GS
100
Top :
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
4.0 V
3.5 V
Bottom : 3.0 V
101
ID , Drain Current [A]
ID , Drain Current [A]
101
@ Notes :
1. 250 µs Pulse Test
2. T = 25 oC
10-1
C
10-1
100
150 oC
100
25 oC
10-1
101
@ Notes :
1. VGS = 0 V
2. VDS = 40 V
3. 250 µs Pulse Test
- 55 oC
0
2
4
6
8
10
VDS , Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
IDR , Reverse Drain Current [A]
RDS(on) , [ Ω ]
Drain-Source On-Resistance
2.0
1.5
VGS = 5 V
1.0
0.5
VGS = 10 V
o
@ Note : TJ = 25 C
0.0
0
3
6
9
12
15
101
100
25 oC
10-1
0.4
18
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
150 oC
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID , Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
500
C iss
6
VDS = 40 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]
400
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= ds+ Cgd
Crss= gd
300
200
C oss
100
C rss
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
00
10
VDS = 160 V
4
2
@ Notes : ID = 5 A
0
0
1
10
2
6
8
10
12
QG , Total Gate Charge [nC]
VDS , Drain-Source Voltage [V]
©1999 Fairchild Semiconductor Corporation
IRLM220A Rev. C0
VDS = 100 V
3
www.fairchildsemi.com
IRLM220A — N-Channel A-FET
!
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
2.5
RDS(on) , (Normalized)
Drain-Source On-Resistance
BVDSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
0.9
@ Notes :
1. V = 0 V
GS
2.0
1.5
1.0
@ Notes :
1. VGS = 5 V
2. ID = 2.5 A
0.5
2. I = 250 µA
D
0.8
-75
-50
-25
0
25
50
75
100
125
150
0.0
-75
175
-50
-25
o
102
0
25
50
75
100
125
150
175
TJ , Junction Temperature [oC]
TJ , Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Ambient Temperature
1.5
101
100 µs
1 ms
10 ms
0
10
10-1
-2
10
10-3 -1
10
ID , Drain Current [A]
ID , Drain Current [A]
Operation in This Area
is Limited by R DS(on)
DC
@ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
100
101
1.0
0.5
0.0
25
102
50
Thermal Response
102
Z (t) ,
100
75
100
125
150
TA , Ambient Temperature [oC]
VDS , Drain-Source Voltage [V]
Fig 11. Thermal Response
D=0.5
101
0.2
@ Notes :
1. J A (t)=62.5
0.1
0.05
o
θ
2
2.
0.02
3.
0.01
C/W Max.
ty Factor, D=t1 /t2
JM
-TA =PD M *Z
θJA
(t)
PDM
t1
θJA
single pulse
t2
-1
10
10- 5
10- 4
10- 3
10- 2
10- 1
100
t 1 , Square Wave Pulse Duration
©1999 Fairchild Semiconductor Corporation
IRLM220A Rev. C0
4
101
102
103
[sec]
www.fairchildsemi.com
IRLM220A — N-Channel A-FET
50KΩ
50K
Ω
200nF
200n
F
12V
VGS
Same
Same Type
as DU
DUT
T
Qg
300nF
300n
F
VDS
VGS
Qgs
Qgd
DUT
DU
T
IG = const.
Charrge
Cha
Figure 12. Gate Charge Test Circuit & Waveform
VDS
RG
RL
VDS
90%
VDD
VGS
VGS
DUT
DUT
VGS
10%
10%
td(on
d( on))
tr
td(o
d( of f)
t on
t of
offf
tf
Figure 13. Resistive Switching Test Circuit & Waveforms
VDS
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDS
DSS
S - VDD
L
BVDS
DSS
S
IAS
ID
RG
VGS
VDD
ID (t)
VDS (t)
VDD
DUT
tp
Ti
Tim
me
tp
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©1999 Fairchild Semiconductor Corporation
IRLM220A Rev. C0
5
www.fairchildsemi.com
IRLM220A — N-Channel A-FET
DUT
+
VDS
_
I SD
L
Driver
Driv
er
RG
VGS
VGS
( Driv
Driver
er )
I SD
( DUT )
Same Type
Same
as DUT
VDD
• dv/dt cont
ntrrolled by RG
• ISD con
onttrol
ollled by pu
pullse pe
perriod
Gate Pul
ulsse W idth
D = -------------------------Gate
Ga
te Pu
Pullse Pe
Perriod
10V
10
V
IFM , Body
Body Di
Diod
ode
e Forward Curr
rren
entt
di/d
di
/dtt
IRM
Body
Bo
dy Diod
ode
e Reverse Curren
entt
VDS
( DUT )
Body
Bo
dy Di
Diod
ode
e Recov
cove
ery dv
dv/d
/dtt
VSD
VDD
Body Diode
Body
For
Forw
ward Vol
olttag
age
e Dr
Drop
op
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
©1999 Fairchild Semiconductor Corporation
IRLM220A Rev. C0
6
www.fairchildsemi.com
IRLM220A — N-Channel A-FET
Mechanical Dimensions
Figure 16. SOT-223, Molded, 4-Lead
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TTE23-004
©1999 Fairchild Semiconductor Corporation
IRLM220A Rev. C0
7
www.fairchildsemi.com
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I66
©1999 Fairchild Semiconductor Corporation
IRLM220A Rev. C0
8
www.fairchildsemi.com
IRLM220A — N-Channel A-FET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
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