LV8740V-TLM-E

Ordering number : ENA1864A LV8740V Monolithic Linear IC PWM Current Control Stepper Motor Driver http://onsemi.com Overview The LV8740V is a 2-channel H-bridge driver IC that can switch a stepper motor driver, which is capable of micro-step drive and supports Quarter-step excitation, and two channels of a brushed DC motor driver, which supports forward, reverse, brake, and standby of a motor. It is ideally suited for driving brushed DC motors and stepper motors used in office equipment and amusement applications. Function • Single-channel PWM current control stepper motor driver (selectable with DC motor driver channel 2) incorporated. • On resistance (upper side : 0.3Ω ; lower side : 0.2Ω ; total of upper and lower : 0.5Ω ; Ta = 25°C, IO = 2.5A) • Excitation mode can be set to Full-step, Half-step full torque, Half-step , or Quarter-step • Excitation step proceeds only by step signal input • Motor current selectable in four steps • BiCDMOS process IC • Output short-circuit protection circuit (selectable from latch-type or auto reset-type) incorporated • Unusual condition warning output pins • No control supply required Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage 1 VM max VM , VM1 , VM2 38 V Output peak current IO peak tw ≤ 10ms, duty 20%, Each 1ch 3.0 A Output current IO max Logic input voltage VIN Each 1ch ST , OE , DM , MD1/DC11 , MD2/DC12 , 2.5 A -0.3 to +6.0 V FR/DC21 , STP/DC22 , RST , EMM , ATT1 , ATT2 MONI/EMO input voltage VMONI/VEMO Allowable power dissipation Pd max * -0.3 to +6.0 V 3.45 W Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +150 °C * Specified circuit board : 90×90×1.6mm3 : 2-Layer glass epoxy printed circuit board with back mounting. Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ORDERING INFORMATION See detailed ordering and shipping information on page 25 of this data sheet. Semiconductor Components Industries, LLC, 2013 April, 2013 42413NK 20130225-S00006 No.A1864-1/25 LV8740V Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage range VM VM , VM1 , VM2 9 to 35 V Logic input voltage VIN ST , OE , DM , MD1/DC11 , MD2/DC12 , 0 to 5.5 V 0 to 3.0 V FR/DC21 , STP/DC22 , RST , EMM , ATT1 , ATT2 VREF input voltage range VREF Electrical Characteristics at Ta = 25°C, VM = 24V, VREF = 1.5V Parameter Symbol Standby mode current drain Current drain IMstn IM Conditions Ratings min typ ST = ”L” , I(VM)+I(VM1)+I(VM2) ST = ”H”, OE = ”L”, no load Unit max 180 250 μA 3 5 mA I(VM)+I(VM1)+I(VM2) VREG5 output voltage Vreg5 Thermal shutdown temperature Thermal hysteresis width IO=-1mA 4.7 5.0 5.3 V TSD Design guarantee 150 180 210 °C ΔTSD Design guarantee °C 40 Motor Driver Output on-resistance Output leakage current Diode forward voltage ST pin input current Logic pin input current IO = 2.5A, Upper-side on resistance 0.3 0.4 Rond IO = 2.5A, Lower-side on resistance 0.2 0.25 Ω IOleak VM=35V 50 μA VD ID = -2.5A ISTL VIN = 0.8V ISTH VIN = 5V IINL (other ST pin) Logic input voltage Ω Ronu OE , DM , MD1/DC11 , MD2/DC12 , 1.1 1.3 V 3 8 15 μA 48 80 112 μA 3 8 15 μA 50 FR/DC21 , STP/DC22 , RST , EMM , ATT1 , High Low Current setting Quarter comparator step threshold voltage resolution (Current step switch) Half step IINH ATT2 , VIN = 0.8V VIN = 5V 30 70 μA VINh ST , OE , DM , MD1/DC11 , MD2/DC12 , 2.0 5.5 V VINl FR/DC21 , STP/DC22 , RST , EMM , ATT1 , 0 0.8 V Vtdac0_W Full step 0.290 0.300 0.310 V Vtdac1_W Step 1 (Initial state+1) 0.260 0.270 0.280 V Vtdac2_W Step 2 (Initial state+2) 0.200 0.210 0.220 V Vtdac3_W Step 3 (Initial state+3) 0.095 0.105 0.115 V Vtdac0_H Step 0 (When initialized: channel 1 0.290 0.300 0.310 V Vtdac2_H Step 2 (Initial state+1) 0.200 0.210 0.220 V Step 0 (Initial state, channel 1 comparator 0.290 0.300 0.310 V comparator level) Vtdac0_HF resolution (full torque) Step 0(When initialized : channel 1 comparator level) resolution Half step ATT2 level) Vtdac2_HF Vtdac2_F Step 2 (Initial state+1) 0.290 0.300 0.310 V Step 2 0.290 0.300 0.310 V resolution Current setting comparator Vtatt00 ATT1=L, ATT2=L 0.290 0.300 0.310 V threshold voltage Vtatt01 ATT1=H, ATT2=L 0.190 0.200 0.210 V Vtatt10 ATT1=L, ATT2=H 0.140 0.150 0.160 V Vtatt11 ATT1=H, ATT2=H 0.090 0.100 0.110 Fchop RCHOP = 20kΩ 45 62.5 75 (Current attenuation rate switch) Chopping frequency VREF pin input current MONI pin saturation voltage Iref VREF = 1.5V Vsatmon IMONI=1mA V kHz μA -0.5 50 100 mV 28.7 29.8 V 0.5 ms 150 kHz Charge pump VG output voltage VG 28 Rise time tONG VG = 0.1μF , Between CP1-CP2 0.1uF Oscillator frequency Fosc RCHOP = 20kΩ ST=”H” → VG=VM+4V 90 125 Continued on next page. No.A1864-2/25 LV8740V Continued from preceding page. Parameter Symbol Ratings Conditions min typ Unit max Output short-circuit protection EMO pin saturation voltage CEM pin charge current CEM pin threshold voltage Vsatemo Icem Iemo = 1mA Vcem=0V Vtcem 50 100 mV 7 10 13 μA 0.8 1.0 1.2 V Pin Assignment VG 1 44 OUT1A VM 2 43 OUT1A CP2 3 42 PGND1 CP1 4 41 NC VREG5 5 40 NC ATT2 6 39 VM1 ATT1 7 38 VM1 EMO 8 37 RF1 CEM 9 36 RF1 EMM 10 35 OUT1B RCHOP 11 MONI 12 34 OUT1B LV8740V RST 13 33 OUT2A 32 OUT2A STP/DC22 14 31 RF2 FR/DC21 15 30 RF2 MD2/DC12 16 29 VM2 MD1/DC11 17 28 VM2 DM 18 27 NC OE 19 26 NC ST 20 25 PGND2 VREF 21 24 OUT2B GND 22 23 OUT2B Top view No.A1864-3/25 LV8740V Package Dimensions unit : mm (typ) 3285B TOP VIEW SIDE VIEW BOTTOM VIEW 15.0 44 0.5 (3.6) 7.6 5.6 (7.8) 1 2 0.65 0.2 0.22 1.7 MAX (0.68) 0.05 (1.5) SIDE VIEW SSOP44J(275mil) Pd max - Ta 6.0 Four-layer circuit board 1*1 5.50 Allowable power dissipation, Pdmax - W 5.0 4.0 Four-layer circuit board 2*2 3.45 3.0 3.80 Two-layer circuit board 1*1 2.86 2.65 Two-layer circuit board 2*2 1.98 2.0 1.79 1.38 1.0 *1 With components mounted on the exposed die-pad board *2 With no components mounted on the exposed die-pad board 0 10 30 50 70 90 Ambient temperature, Ta - C No.A1864-4/25 LV8740V Substrate Specifications (Substrate recommended for operation of LV8740V) Size : 90mm × 90mm × 1.6mm Material : Glass epoxy Copper wiring density : L1 = 85% / L2 = 90% L1 : Copper wiring pattern diagram L2 : Copper wiring pattern diagram Cautions 1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 90% or more of the Exposed Die-Pad is wet. 2) For the set design, employ the derating design with sufficient margin. Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical stresses such as vibration, impact, and tension. Accordingly, the design must ensure these stresses to be as low or small as possible. The guideline for ordinary derating is shown below : (1)Maximum value 80% or less for the voltage rating (2)Maximum value 80% or less for the current rating (3)Maximum value 80% or less for the temperature rating 3) After the set design, be sure to verify the design with the actual product. Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc. Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal conduction, possibly resulting in thermal destruction of IC. No.A1864-5/25 MONI PGND GND VREF VREG5 + - VM LVS TSD + - RCHOP Oscillation circuit Regulator ATT2 Attenuator (4 levels selectable) ST ATT1 Charge pump Output preamplifier stage RF1 OUT1B VM1 VM2 OUT2A RF2 DM EMM Current selection (W1-2/1-2/ 1-2Full/2) Current selection (W1-2/1-2/ 1-2Full/2) MD1/ DC11 + MD2/ FR/ STP/ RST OE DC12 DC21 DC22 Output control logic OUT2B + OUT1A Output preamplifier stage VG Output preamplifier stage CP1 Output preamplifier stage CP2 CEM EMO LV8740V Block Diagram No.A1864-6/25 LV8740V Pin Functions Pin No. Pin name Description 1 VG 2 VM Charge pump capacitor connection pin Motor power supply connection pin 3 CP2 Charge pump capacitor connection pin 4 CP1 Charge pump capacitor connection pin 5 VREG5 Internal power supply capacitor connection pin 6 ATT2 Motor holding current switching pin 7 ATT1 Motor holding current switching pin 8 EMO Output short-circuit state warning output pin 9 CEM Pin to connect the output short-circuit state detection time setting capacitor 10 EMM Over current mode switching pin 11 RCHOP Chopping frequency setting resistor connection pin 12 MONI Position detection monitor pin 13 RST Reset signal input pin 14 STP/DC22 STM STEP signal input pin/DCM2 output control input pin 15 FR/DC21 STM forward/reverse rotation signal input pin/DCM2 output control input pin 16 MD2/DC12 STM excitation mode switching pin/DCM1 output control input pin 17 MD1/DC11 STM excitation mode switching pin/DCM1 output control input pin 18 DM Drive mode (STM/DCM) switching pin 19 OE Output enable signal input pin 20 ST Chip enable pin 21 VREF Constant current control reference voltage input pin 22 GND Signal system ground 23, 24 OUT2B Channel 2 OUTB output pin 25 PGND2 Channel 2 Power system ground VM2 Channel 2 motor power supply connection pin 28, 29 30, 31 RF2 Channel 2 current-sense resistor connection pin 32, 33 OUT2A Channel 2 OUTA output pin 34, 35 OUT1B Channel 1 OUTB output pin 36, 37 RF1 Channel 1 current-sense resistor connection pin 38, 39 VM1 Channel 1 motor power supply pin 42 PGND1 Channel 1 Power system ground 43, 44 OUT1A Channel 1 OUTA output pin 26, 27 NC 40, 41 No Connection (No internal connection to the IC) No.A1864-7/25 LV8740V Equivalent Circuits Pin No. Pin 6 ATT2 7 ATT1 10 EMM 13 RST 14 STP/DC22 15 FR/DC21 16 MD2/DC12 17 MD1/DC11 18 DM 19 OE Equivalent Circuit VREG5 GND 20 ST VREG5 GND 23, 24 OUT2B 25 PGND2 28, 29 VM2 30, 31 RF2 32, 33 OUT2A 34, 35 OUT1B 36, 37 RF1 38, 39 VM1 42 PGND1 43, 44 OUT1A 38 39 28 29 43 44 34 35 32 33 23 24 25 42 36 37 30 31 GND Continued on next page. No.A1864-8/25 LV8740V Continued from preceding page. Pin No. Pin 1 VG 2 VM 3 CP2 4 CP1 Equivalent Circuit 4 VREG5 2 3 1 GND 21 VREF 5 VREG5 8 EMO 12 MONI VREG5 GND VM GND VREG5 GND Continued on next page. No.A1864-9/25 LV8740V Continued from preceding page. Pin No. 9 Pin CEM Equivalent Circuit VREG5 GND 11 RCHOP VREG5 GND No.A1864-10/25 LV8740V Description of operation 1. Input Pin Function 1-1) Chip enable function This IC is switched between standby and operating mode by setting the ST pin. In standby mode, the IC is set to power-save mode and all logic is reset. In addition, the internal regulator circuit and charge pump circuit do not operate in standby mode. ST Mode Internal regulator Low or Open Standby mode Standby Charge pump Standby High Operating mode Operating Operating 1-2) Drive mode switching pin function The IC drive mode is switched by setting the DM pin. In STM mode, stepper motor channel 1 can be controlled by the CLK-IN input. In DCM mode, DC motor channel 2 or stepper motor channel 1 can be controlled by parallel input. Stepper motor control using parallel input is Full-step or Half-step full torque. DM Drive mode Application Low or Open STM mode Stepper motor channel 1 (CLK-IN) High DCM mode DC motor channel 2 or stepper motor channel 1 (parallel) 2. STM mode (DM = Low or Open) 2-1) STEP pin function The excitation step progresses by inputting the step signal to the STP pin. Input Operating mode ST STP Low * Standby mode High Excitation step proceeds High Excitation step is kept 2-2) Excitation mode setting function The excitation mode of the stepper motor can be set as follows by setting the MD1 pin and the MD2 pin. MD1 MD2 Micro-step resolution (Excitation mode) Low Low High Low Initial position Channel 1 Channel 2 Full step (2 phase excitation) 100% -100% Half step (1-2 phase excitation) 100% 0% Half step (1-2 phase excitation) 100% 0% Quarter step 100% 0% full torque Low High High High (W1-2 phase excitation) This is the initial position of each excitation mode in the initial state after power-on and when the counter is reset. 2-3) Positional detection monitor function The MONI position detection monitoring pin is of an open drain type. When the excitation position is in the initial position, the MONI output is placed in the ON state. (Refer to "2-12.Examples of current waveforms in each micro-step mode.") No.A1864-11/25 LV8740V 2-4)Constant-current control reference voltage setting function This IC does the PWM fixed current chopping control of the current of the motor by the automatic operation in setting the output current. The output current in which a fixed current is controlled by the following calculation type is set by the resistance connected between the voltage and RF-GND being input to the VREF pin. IOUT=(VREF/5)/RF resistance *The above-mentioned, set value is an output current of each excitation mode at 100% time. VREF input voltage attenuation function ATT1 ATT2 Current setting reference voltage attenuation ratio Low Low 100% High Low 66.7% Low High 50% High High 33.3% The output ammeter calculation type when the attenuation function of the VREF input voltage is used is as follows. IOUT=(VREF/5)×(Attenuation ratio)/RF resistance (Example) When VREF = 1.5V, setting current ratio = 100% [(ATT1, ATT2) = (Low, Low)] and RF resistor = 0.22Ω, the following output current flows : IOUT = 1.5V/5×100%/0.22Ω=1.36A Under such a condition, when assuming (ATT1, ATT2) = (High, High). IOUT = 1.36A×33.3%=453mA The power saving can be done, and attenuating the output current when the motor energizes maintenance. 2-5) Input Timing TstepH TstepL STEP Tdh Tds (md1 step) (step md1) MD1 Tdh Tds (md2 step) (step md2) MD2 Tdh Tds (fr step) (step fr) FR TstepH/TstepL : Clock H/L pulse width (min 500ns) Tds : Data set-up time (min 500ns) Tdh : Data hold time (min 500ns) 2-6) Blanking period If, when exercising PWM constant-current chopping control over the motor current, the mode is switched from decay to charge, the recovery current of the parasitic diode may flow to the current sensing resistance, causing noise to be carried on the current sensing resistance pin, and this may result in erroneous detection. To prevent this erroneous detection, a blanking period is provided to prevent the noise occurring during mode switching from being received. During this period, the mode is not switched from charge to decay even if noise is carried on the current sensing resistance pin. This IC's blanking period is fixed at about 1 µs in STM mode (2 µs in DCM mode). No.A1864-12/25 LV8740V 2-7) Reset function RST Operating mode Low Normal operation High Reset state RST RESET STEP MONI 1ch output 0% 2ch output Initial state When the RST pin is set High, the output excitation position is forced to the initial state, and the MONI output enters ON a state. When RST is set Low after that, the excitation position proceeds to the next STEP input. 2-8) Output enable function OE Operating mode High Output OFF Low Output ON OE Power save mode STEP MONI 1ch output 0% 2ch output Output is high-impedance When the OE pin is set High, the output is forced OFF and goes to high impedance. However, the internal logic circuits are operating, so the excitation position proceeds when the STEP signal is input to the STP pin. Therefore, when OE is returned to Low, the output level conforms to the excitation position proceeded by the STEP input. No.A1864-13/25 LV8740V 2-9) Forward/reverse switching function FR Operating mode Low Clockwise (CW) High Counter-clockwise (CCW) FR CW mode CCW mode CW mode STEP Excitation position (1) (2) (3) (4) (5) (6) (5) (4) (3) (4) (5) 1ch output 2ch output The internal D/A converter proceeds by one bit at the rising edge of the input STEP pulse. In addition, CW and CCW mode are switched by setting the FR pin. In CW mode, the channel 2 current phase is delayed by 90° relative to the channel 1 current. In CCW mode, the channel 2 current phase is advanced by 90° relative to the channel 1 current. 2-10) Setting the chopping frequency For constant-current control, chopping operation is made with the frequency determined by the external resistor (connected to the RCHOP pin). The chopping frequency to be set with the resistance connected to the RCHOP pin (pin 11) is as shown below. Chopping frequency settings (reference data) 100 Fchop – kHz 80 60 40 20 0 0 10 20 30 RCHOP – kΩ 40 50 60 PCA01883 No.A1864-14/25 LV8740V 2-11) Output current vector locus (one step is normalized to 90 degrees) 100 Channel 1 phase current ratio (%) 80 60 40 20 0.0 0.0 40 20 80 60 100 Channel 2 current ratio (%) Setting current ration in each micro-step mode STEP Quarter-step (%) Channel 1 Half-step (%) Channel 2 Channel 1 θ0 0 100 θ1 35 90 θ2 70 70 θ3 90 35 θ4 100 0 Half-step full torque (%) Channel 2 Channel 1 Full-step (%) Channel 2 Channel 1 0 100 0 100 70 70 100 100 100 0 100 0 100 Channel 2 100 No.A1864-15/25 LV8740V 2-12) Examples of current waveforms in each micro-step mode Full step (CW mode) STEP MONI (%) 100 l1 0 -100 (%) 100 I2 0 -100 Half step full torque (CW mode) STEP MONI (%) 100 I1 0 -100 (%) 100 I2 0 -100 No.A1864-16/25 LV8740V Half step (CW mode) STEP MONI (%) 100 I1 0 -100 (%) 100 I2 0 -100 Quarter step (CW mode) STEP MONI (%) 100 I1 0 -100 (%) 100 I2 0 -100 No.A1864-17/25 LV8740V 2-13) Current control operation specification (Sine wave increasing direction) STEP Set current Set current Coil current Forced CHARGE section fchop Current mode CHARGE SLOW FAST CHARGE SLOW FAST (Sine wave decreasing direction) STEP Set current Coil current Forced CHARGE section Set current fchop Current mode CHARGE SLOW FAST Forced CHARGE section FAST CHARGE SLOW In each current mode, the operation sequence is as described below : • At rise of chopping frequency, the CHARGE mode begins.(The section in which the CHARGE mode is forced regardless of the magnitude of the coil current (ICOIL) and set current (IREF) exists for 1/16 of one chopping cycle.) • The coil current (ICOIL) and set current (IREF) are compared in this forced CHARGE section. When (ICOIL