MAC12HCDG

MAC12HCDG, MAC12HCMG, MAC12HCNG Triacs Silicon Bidirectional Thyristors Designed primarily for full-wave ac control applications, such as motor controls, heating controls or dimmers; or wherever full−wave, silicon gate−controlled devices are needed. www.onsemi.com TRIACS 12 AMPERES RMS 400 thru 800 VOLTS Features • • • • • • • • • Uniform Gate Trigger Currents in Three Quadrants, Q1, Q2, and Q3 High Commutating di/dt and High Immunity to dv/dt @ 125°C Minimizes Snubber Networks for Protection Blocking Voltage to 800 Volts On-State Current Rating of 12 Amperes RMS at 80°C High Surge Current Capability − 100 Amperes Industry Standard TO-220AB Package for Ease of Design Glass Passivated Junctions for Reliability and Uniformity These Devices are Pb−Free and are RoHS Compliant* MT2 MT1 G MARKING DIAGRAM MAC12HCxG AYWW MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Peak Repetitive Off-State Voltage (Note 1) (TJ = − 40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) MAC12HCDG MAC12HCMG MAC12HCNG VDRM, VRRM On-State RMS Current (All Conduction Angles; TC = 80°C) IT(RMS) 12 A Peak Non-Repetitive Surge Current (One Full Cycle, 60 Hz, TJ = 125°C) ITSM 100 A I2t 41 A2sec PGM 16 W PG(AV) 0.35 W TJ −40 to +125 °C 1 Main Terminal 1 −40 to +150 °C 2 Main Terminal 2 3 Gate 4 Main Terminal 2 Circuit Fusing Consideration (t = 8.33 ms) Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 80°C) Average Gate Power (t = 8.3 ms, TC = 80°C) Operating Junction Temperature Range Storage Temperature Range Value Unit V 1 400 600 800 Tstg *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. November, 2014 − Rev. 5 3 x A Y WW G = D, M, or N = Assembly Location (Optional)* = Year = Work Week = Pb−Free Package * The Assembly Location code (A) is optional. In cases where the Assembly Location is stamped on the package the assembly code may be blank. PIN ASSIGNMENT Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. © Semiconductor Components Industries, LLC, 2014 2 TO−220 CASE 221A STYLE 4 1 ORDERING INFORMATION Device Package Shipping MAC12HCDG TO−220 (Pb−Free) 50 Units / Rail MAC12HCMG TO−220 (Pb−Free) 50 Units / Rail MAC12HCNG TO−220 (Pb−Free) 50 Units / Rail Publication Order Number: MAC12HC/D MAC12HCDG, MAC12HCMG, MAC12HCNG THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction−to−Case Junction−to−Ambient Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds Symbol Value Unit RqJC RqJA 2.2 62.5 °C/W TL 260 °C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions) Symbol Min Typ Max − − − − 0.01 2.0 − − 1.85 10 10 10 − − − 50 50 50 − − 60 − − − − − − 60 80 60 0.5 0.5 0.5 − − − 1.5 1.5 1.5 (di/dt)c 15 − − A/ms Critical Rate of Rise of Off-State Voltage (VD = Rated VDRM, Exponential Waveform, Gate Open, TJ = 125°C) dv/dt 600 − − V/ms Repetitive Critical Rate of Rise of On-State Current IPK = 50 A; PW = 40 msec; diG/dt = 200 mA/msec; f = 60 Hz di/dt − − 10 A/ms Characteristic Unit OFF CHARACTERISTICS IDRM, IRRM Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM, Gate Open) TJ = 25°C TJ = 125°C mA ON CHARACTERISTICS Peak On-State Voltage (Note 2) (ITM = ± 17 A) VTM Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IGT Holding Current (VD = 12 V, Gate Open, Initiating Current = ±150 mA) IH Latch Current (VD = 12 V, IG = 50 mA) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IL Gate Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) V mA mA mA VGT V DYNAMIC CHARACTERISTICS Rate of Change of Commutating Current (VD = 400 V, ITM = 4.4 A, Commutating dv/dt = 18 V/ms, Gate Open, TJ = 125°C, f = 250 Hz, CL = 10 mF, LL = 40 mH, with Snubber) Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%. www.onsemi.com 2 MAC12HCDG, MAC12HCMG, MAC12HCNG Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Symbol Parameter VTM VDRM Peak Repetitive Forward Off State Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Reverse Off State Voltage IRRM Peak Reverse Blocking Current VTM Maximum On State Voltage IH Holding Current on state IH IRRM at VRRM off state IH Quadrant 3 MainTerminal 2 − VTM Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 Quadrant II (+) MT2 Quadrant I (+) IGT GATE (−) IGT GATE MT1 MT1 REF REF IGT − + IGT (−) MT2 (−) MT2 Quadrant III Quadrant 1 MainTerminal 2 + Quadrant IV (+) IGT GATE (−) IGT GATE MT1 MT1 REF REF − MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used. www.onsemi.com 3 + Voltage IDRM at VDRM MAC12HCDG, MAC12HCMG, MAC12HCNG 1.20 VGT, GATE TRIGGER VOLTAGE (VOLT) IGT, GATE TRIGGER CURRENT (mA) 100 Q3 Q2 Q1 10 1 -40 -25 -10 5 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (°C) 110 1.10 Q3 1.00 0.90 Q1 0.80 Q2 0.70 0.60 0.50 0.40 -40 -25 -10 125 100 LATCHING CURRENT (mA) HOLDING CURRENT (mA) 110 125 100 MT2 NEGATIVE MT2 POSITIVE 10 1 -40 -25 -10 5 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (°C) 110 Q2 Q3 Q1 10 1 -40 -25 -10 125 P(AV), AVERAGE POWER DISSIPATION (WATTS) 125 120°, 90°, 60°, 30° 110 95 180° 80 DC 0 2 5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (°C) 95 110 125 Figure 4. Typical Latching Current versus Junction Temperature Figure 3. Typical Holding Current versus Junction Temperature TC, CASE TEMPERATURE (°C) 95 Figure 2. Typical Gate Trigger Voltage versus Junction Temperature Figure 1. Typical Gate Trigger Current versus Junction Temperature 65 5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (°C) 4 6 8 10 IT(RMS), RMS ON‐STATE CURRENT (AMP) 12 20 DC 18 180° 16 120° 14 12 10 8 90° 60° 6 30° 4 2 0 0 Figure 5. Typical RMS Current Derating 2 4 6 8 10 IT(AV), AVERAGE ON‐STATE CURRENT (AMP) Figure 6. On-State Power Dissipation www.onsemi.com 4 12 MAC12HCDG, MAC12HCMG, MAC12HCNG 1 r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) I T, INSTANTANEOUS ON‐STATE CURRENT (AMP) 100 TYPICAL @ TJ = 25°C MAXIMUM @ TJ = 125°C 10 MAXIMUM @ TJ = 25°C 1 0.1 0.01 0.1 1 10 100 t, TIME (ms) 1000 Figure 8. Typical Thermal Response 0.1 0 4 4.5 0.5 1 1.5 2 2.5 3 3.5 VT, INSTANTANEOUS ON‐STATE VOLTAGE (VOLTS) 5 Figure 7. Typical On-State Characteristics www.onsemi.com 5 10000 MAC12HCDG, MAC12HCMG, MAC12HCNG PACKAGE DIMENSIONS TO−220 CASE 221A−09 ISSUE AH −T− B SEATING PLANE C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D INCHES MIN MAX 0.570 0.620 0.380 0.415 0.160 0.190 0.025 0.038 0.142 0.161 0.095 0.105 0.110 0.161 0.014 0.024 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.53 4.07 4.83 0.64 0.96 3.61 4.09 2.42 2.66 2.80 4.10 0.36 0.61 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 N STYLE 4: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE MAIN TERMINAL 2 ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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