MC100EP40
3.3V / 5V ECL Differential
Phase-Frequency Detector
Description
The MC100EP40 is a three−state phase−frequency detector
intended for phase−locked loop applications which require a minimum
amount of phase and frequency difference at lock. Advanced design
significantly reduces the dead zone of the detector. For proper
operation, the input edge rate of the R and V inputs should be less than
5 ns. The device is designed to work with a 3.3 V / 5 V power supply.
When Reference (R) and Feedback (FB) inputs are unequal in
frequency and/or phase the differential UP (U) and DOWN (D)
outputs will provide pulse streams which when subtracted and
integrated provide an error voltage for control of a VCO.
When Reference (R) and Feedback (FB) inputs are 80 ps or less in
phase difference, the Phase Lock Detect pin will indicate lock by a
high state (VOH). The VTX (VTR, VTR, VTFB, VTFB) pins offer an
internal termination network for 50 W line impedance environment
shown in Figure 2. An external sinking supply of VCC−2 V is required
on VTX pin(s). If you short the two differential pins VTR and VTR (or
VTFB and VTFB) together, you provide a 100 W termination resistance.
For more information on termination of logic devices, see AND8020.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
For more information on Phase Lock Loop operation, refer to
AND8040.
Special considerations are required for differential inputs under No
Signal conditions to prevent instability.
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MARKING
DIAGRAM*
20
20
100
EP40
ALYW G
G
1
TSSOP−20
DT SUFFIX
CASE 948E
A
L
Y
W
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Features
•
•
•
•
•
•
•
•
•
•
Maximum Frequency > 2 GHz Typical
Fully Differential
Advanced High Band Output Swing of 400 mV
Theoretical Gain = 1.11
Trise 97 ps Typical, Ffall 70 ps Typical
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −5.5 V
50 W Internal Termination Resistor
These are Pb−Free Devices
© Semiconductor Components Industries, LLC, 2014
April, 2014 − Rev. 13
1
Publication Order Number:
MC100EP40/D
MC100EP40
VCC PLD
20
1
19
2
VCC
D
D
U
U
VCC
NC
VEE
18
17
16
15
14
13
12
11
3
4
VEE VTFB VTFB FB
5
6
7
FB
R
R
9
8
Table 1. PIN DESCRIPTION
10
VTR VTR VBB
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 1. 20−Lead Pinout (Top View)
PIN
FUNCTION
U, U
ECL Up Differential Outputs
D, D
ECL Down Differential Outputs
FB, FB
ECL Feedback Differential Inputs
R, R
ECL Reference Differential Inputs
PLD
ECL Phase Lock Detect Function
VTR
ECL Internal Termination for R
VTR
ECL Internal Termination for R
VTFB
ECL Internal Termination for FB
VTFB
ECL Internal Termination for FB
VBB
Reference Voltage Output
VCC
Positive Supply
VEE
Negative Supply
NC
No Connect
VTR
50 W
U
C
A
A
R
R
U
U
A
C
S
50 W
U
FF
Reset
A
R
VTR
C
Reset
D
B
D
VTFB
Reset
50 W
(V) FB
FB
R
B
D
FF
S
B
D
B
50 W
Reset
D
VTFB
VBB
Figure 2. Logic Diagram
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2
D
D
MC100EP40
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
N/A
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
TSSOP−20
Flammability Rating
Oxygen Index: 28 to 34
Pb Pkg
Pb−Free Pkg
Level 1
Level 3
UL 94 V−0 @ 0.125 in
Transistor Count
699 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE = 0 V
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
IBB
VBB Sink/Source
± 0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
TSSOP−20
TSSOP−20
140
100
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
TSSOP−20
23 to 41
°C/W
Tsol
Wave Solder
265
265
°C
Pb
Pb−Free
VI v VCC
VI w VEE
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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3
MC100EP40
Table 4. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
Symbol
Characteristic
85°C
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
100
128
160
100
130
160
110
140
170
mA
2225
2350
2475
2275
2400
2525
2300
2425
2550
mV
1775
1305
1900
1480
2025
1605
1800
1305
1925
1480
2050
1605
1825
1305
1950
1480
2075
1605
mV
2420
2075
2420
2075
2420
mV
1675
1305
1675
1305
1675
mV
1975
1775
1975
1775
1975
mV
3.3
2.0
3.3
2.0
3.3
V
150
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 3)
VOL
Output LOW Voltage (Note 3)
VIH
Input HIGH Voltage (Single−Ended)
2075
U, U, B, B
PLD
25°C
Min
VIL
Input LOW Voltage (Single−Ended)
1305
VBB
Output Voltage Reference
1775
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration) (Note 4)
IIH
Input HIGH Current
IIL
Input LOW Current
1875
2.0
1875
150
−150
1875
150
−150
mA
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 W to VCC − 2.0 V.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 5. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
−40°C
Symbol
Min
Characteristic
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current (Note 6)
100
128
160
100
130
160
110
140
170
mA
VOH
Output HIGH Voltage (Note 7)
3925
4050
4175
3975
4100
4225
4000
4125
4250
mV
VOL
Output LOW Voltage (Note 7)
3475
3005
3600
3180
3725
3305
3500
3005
3625
3180
3750
3305
3525
3005
3650
3180
3775
3305
mV
VIH
Input HIGH Voltage (Single−Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single−Ended)
3005
3375
3005
3375
3005
3375
mV
VBB
Output Voltage Reference
3475
3675
3475
3675
3475
3675
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration) (Note 8)
5.0
2.0
5.0
2.0
5.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
U, U, B, B
PLD
3575
2.0
150
−150
3575
150
−150
−150
3575
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
6. For (VCC − VEE) > 3.3 V, 5 W to 10 W in line with VEE required for maximum thermal protection at elevated temperatures. Recommend
VCC−VEE operation at 3.3 V.
7. All loading with 50 W to VCC − 2.0 V.
8. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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4
MC100EP40
Table 6. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 9)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Power Supply Current (Note 10)
100
128
160
100
130
160
110
140
170
mA
VOH
Output HIGH Voltage (Note 11)
−1075
−950
−825
−1025
−900
−775
−1000
−875
−750
mV
VOL
Output LOW Voltage (Note 11)
U, U, B, B
PLD
−1525
−1995
−1400
−1820
−1275
−1695
−1500
−1995
−1375
−1820
−1250
−1695
−1475
−1995
−1350
−1820
−1225
−1695
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
VIL
Input LOW Voltage (Single−Ended)
−1995
−1625
−1995
−1625
−1995
VBB
Output Voltage Reference
−1525
−1325
−1525
−1325
−1525
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 12)
IIH
Input HIGH Current
IIL
Input LOW Current
mV
−1425
VEE + 2.0
0.0
−1425
VEE + 2.0
150
−150
0.0
−1425
VEE + 2.0
150
−150
−880
mV
−1625
mV
−1325
mV
0.0
V
150
mA
mA
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. Input and output parameters vary 1:1 with VCC.
10. For (VCC − VEE) > 3.3 V, 5 W to 10 W in line with VEE required for maximum thermal protection at elevated temperatures. Recommend
VCC−VEE operation at 3.3 V.
11. All loading with 50 W to VCC − 2.0 V.
12. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 7. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 13)
−40°C
Symbol
Characteristic
Min
Typ
400
25°C
Max
Min
Typ
525
700
410
0.2
2
85°C
Max
Min
Typ
550
750
450
575
775
ps
0.2
2
Max
GHz
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
13. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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5
MC100EP40
10
9
500
8
5V
7
450
6
3.3 V
400
5
ÏÏ
ÏÏ
4
350
300
JITTEROUT ps (RMS)
VOUTamplitude (mVpp)
550
3
2
ÏÏÏÏÏÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏÏÏÏÏÏ
1
(JITTER)
250
1.0
0
1.5
2.0
FREQUENCY (GHz)
2.5
Figure 3. Fmax/Jitter @ 255C
Q
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
Zo = 50 W
D
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 4. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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6
MC100EP40
ORDERING INFORMATION
Package
Shipping†
MC100EP40DTG
TSSOP−20*
75 Units / Rail
MC100EP40DTR2G
TSSOP−20*
2500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−20 WB
CASE 948E
ISSUE D
DATE 17 FEB 2016
SCALE 2:1
20X
0.15 (0.006) T U
2X
L
K REF
0.10 (0.004)
S
L/2
20
M
T U
S
V
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
K
K1
S
J J1
11
B
SECTION N−N
−U−
PIN 1
IDENT
0.25 (0.010)
N
1
10
M
0.15 (0.006) T U
S
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
N
F
DETAIL E
−W−
C
G
D
H
DETAIL E
0.100 (0.004)
−T− SEATING
PLANE
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
6.40
6.60
4.30
4.50
--1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.27
0.37
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.252
0.260
0.169
0.177
--0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.011
0.015
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0_
8_
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT
7.06
XXXX
XXXX
ALYWG
G
1
0.65
PITCH
16X
0.36
16X
1.26
DOCUMENT NUMBER:
98ASH70169A
DESCRIPTION:
TSSOP−20 WB
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DIMENSIONS: MILLIMETERS
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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