Revised May 2002
MM74C48
BCD-to-7 Segment Decoder
General Description
Features
The MM74C48 BCD-to-7 segment decoder is a monolithic
complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors.
Seven NAND gates and one driver are connected in pairs
to make binary-coded decimal (BCD) data and its complement available to the seven decoding AND-OR-INVERT
gates. The remaining NAND gate and three input buffers
provide test-blanking input/ripple-blanking output, and ripple-blanking inputs.
■ Wide supply voltage range:
3.0V to 15V
■ Guaranteed noise margin: 1.0V
■ High noise immunity: 0.45 VCC (typ.)
■ Low power TTL compatibility:
fan out of 2 driving 74L
■ High current sourcing output (up to 50 mA)
■ Ripple blanking for leading or trailing zeros (optional)
■ Lamp test provision
Ordering Code:
Order Number
MM74C48N
Package Number
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Connection Diagrams
Segment Identification
Numerical Designations
and Resultant Displays
Top View
© 2002 Fairchild Semiconductor Corporation
DS005883
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MM74C48 BCD-to-7 Segment Decoder
October 1987
MM74C48
Truth Table
Decimal
Inputs
Outputs
or
BI/RBO
Function
LT
RBI
D
C
B
0
H
H
L
L
1
H
X
L
L
2
H
X
L
L
3
H
X
L
L
4
H
X
L
5
H
X
6
H
7
Note
A
(Note 1)
a
b
c
d
e
f
g
L
L
H
H
H
H
H
H
H
L
(Note 2)
L
H
H
L
H
H
L
L
L
L
(Note 2)
H
L
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
L
L
H
H
L
L
H
L
H
H
L
L
H
H
L
H
L
H
H
H
L
H
H
L
H
H
X
L
H
H
L
H
L
L
H
H
H
H
H
H
X
L
H
H
H
H
H
H
H
L
L
L
L
8
H
X
H
L
L
L
H
H
H
H
H
H
H
H
H
9
H
X
H
L
L
H
H
H
H
H
L
L
H
10
H
X
H
L
H
L
H
L
L
L
H
H
L
H
11
H
X
H
L
H
H
H
L
L
H
H
L
L
H
12
H
X
H
H
L
L
H
L
H
L
L
L
H
H
13
H
X
H
H
L
H
H
H
L
L
H
L
H
H
14
H
X
H
H
H
L
H
L
L
L
H
H
H
H
15
H
X
H
H
H
H
H
L
L
L
L
L
L
L
BI
X
X
X
X
X
X
L
L
L
L
L
L
L
L
(Note 3)
RBI
H
L
L
L
L
L
L
L
L
L
L
L
L
L
(Note 4)
LT
L
X
X
X
X
X
H
H
H
H
H
H
H
H
(Note 5)
H = HIGH Level
L = LOW Level
X = Irrelevant
Note 1: One BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO).
Note 2: The blanking input (BI) must be open when output functions 0–15 are desired. The ripple-blanking input (RBI) must be HIGH, if blanking of a decimal
zero is not desired.
Note 3: When a LOW logic level is applied directly to the blanking input (BI), all segment outputs are LOW regardless of the level of any other input.
Note 4: When ripple-blanking input (RBI) and inputs A, B, C, and D are at a LOW level with the lamp-test input HIGH, all segment outputs go LOW and the
ripple-blanking output (RBO) goes to a LOW level (response condition).
Note 5: When the blanking input/ripple-blanking output (BI/RBO) is open and a LOW is applied to the lamp-test input, all segment outputs are HIGH.
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2
MM74C48
Absolute Maximum Ratings(Note 6)
−0.3V to VCC + 0.3V
Voltage at Any Pin
Operating Temperature Range
−55°C to +125°C
Storage Temperature Range
−65°C to +150°C
Power Dissipation
Dual-In-Line
700 mW
Small Outline
500 mW
Operating VCC Range
Note 6: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics table provides conditions
for actual device operation.
3.0V to 15V
Absolute Maximum VCC
18V
Lead Temperature
260°C
(Soldering, 10 seconds)
DC Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS to CMOS
VIN(1)
VIN(0)
VOUT(1)
VOUT(0)
Logical “1” Input Voltage
Logical “0” Input Voltage
VCC = 5.0V
3.5
VCC = 10V
8.0
VCC = 5.0V
1.5
VCC = 10V
2.0
Logical “1” Output Voltage
VCC = 5.0V, IO = −10 µA
4.5
(RB Output Only)
VCC = 10V, IO = −10 µA
9.0
Logical “0” Output Voltage
V
V
VCC = 5.0V, IO = 10 µA
0.5
VCC = 10V, IO = 10 µA
1.0
IIN(1)
Logical “1” Input Current
VCC = 15.0V, VIN = 15V
IIN(0)
Logical “0” Input Current
VCC = 15.0V, VIN = 0V
ICC
Supply Current
VCC = 15V
0.005
−1.0
V
1.0
−0.005
0.05
V
µA
µA
300
µA
0.8
V
CMOS/LPTTL INTERFACE
VIN(1)
Logical “1” Input Voltage
VCC = 4.75V
VIN(0)
Logical “0” Input Voltage
VCC = 4.75V
Logical “1” Output Voltage
VCC = 4.75V, IO = −50 µA
VOUT(1)
VCC − 1.5
V
2.4
V
(RB Output Only)
VOUT(0)
Logical “0” Output Voltage
VCC = 4.75V, IO = 360 µA
0.4
V
OUTPUT DRIVE (See Family Characteristics Data Sheet)
ISOURCE
ISINK
ISINK
ISOURCE
Output Source Current
VCC = 4.75V, VOUT = 0.4V
−0.80
(P-Channel) (RB Output Only)
VCC = 10V, VOUT = 0.5V
−4.0
Output Sink Current
VCC = 5.0V, VOUT = VCC
(N-Channel)
TA = 25°C
Output Sink Current
VCC = 10V, VOUT = VCC
(N-Channel)
TA = 25°C
Output Source Current
VCC = 5.0V, VOUT = 3.4V
(NPN Bipolar)
VCC = 5.0V, VOUT = 3.0V
VCC = 10V, VOUT = 8.4V
VCC = 10V, VOUT = 8.0V
3
mA
1.75
3.6
mA
8.0
16
mA
−20
−50
−20
−50
−65
mA
−65
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MM74C48
AC Electrical Characteristics
(Note 7)
TA = 25°C, CL = 50 pF, unless otherwise specified
Symbol
tpd0, tpd1
tpd0
tpd0
tpd1
tpd1
tpd0
Typ
Max
Propagation Delay to a “1” or “0” on
Parameter
VCC = 5.0V
Conditions
Min
450
1500
Segment Outputs from Data Inputs
VCC = 10V
160
500
Propagation Delay to a “0” on
VCC = 5.0V
500
1600
Segment Outputs from RB Input
VCC = 10V
180
550
Propagation Delay to a “0” on
VCC = 5.0V
350
1200
Segment Outputs from Blanking Input
VCC = 10V
140
450
Propagation Delay to a “1” on
VCC = 5.0V
450
1500
Segment Outputs from Lamp Test
VCC = 10V
160
500
Propagation Delay to a “1” on RB
VCC = 5.0V
600
2000
Output from RB Input
VCC = 10V
250
800
Propagation Delay to a “0” on RB
VCC = 5.0V
140
450
Output from RB Input
VCC = 10V
50
150
Note 7: AC Parameters are guaranteed by DC correlated testing.
Typical Applications
Typical Connection Utilizing
the Ripple-Blanking Feature
First three stages will blank leading zeros, the fourth stage will not blank zeros.
Blanking Input Connection Diagram
When RBO/BI is forced LOW, all segment outputs are off regardless of the state of any other input condition.
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4
Units
ns
ns
ns
ns
ns
ns
MM74C48
Light Emitting Diode (LED) Readout
Fluorescent Readout
Incandescent Readout
**A filament pre-warm resistor is recommended to reduce filament thermal
shock and increase the effective cold resistance of the filament.
Gas Discharge Readout
Liquid Crystal (LC) Readout
Direct DC drive of LC’s not recommended for life of LC readouts.
5
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MM74C48 BCD-to-7 Segment Decoder
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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