MM74HC4066N

Revised January 2005 MM74HC4066 Quad Analog Switch General Description Features The MM74HC4066 devices are digitally controlled analog switches utilizing advanced silicon-gate CMOS technology. These switches have low “ON” resistance and low “OFF” leakages. They are bidirectional switches, thus any analog input may be used as an output and visa-versa. Also the MM74HC4066 switches contain linearization circuitry which lowers the “ON” resistance and increases switch linearity. The MM74HC4066 devices allow control of up to 12V (peak) analog signals with digital control signals of the same range. Each switch has its own control input which disables each switch when LOW. All analog inputs and outputs and digital inputs are protected from electrostatic damage by diodes to VCC and ground. ■ Typical switch enable time: 15 ns ■ Wide analog input voltage range: 0–12V ■ Low “ON” resistance: 30 typ. (MM74HC4066) ■ Low quiescent current: 80 µA maximum (74HC) ■ Matched switch characteristics ■ Individual switch controls Ordering Code: Package Order Number Package Description Number MM74HC4066M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HC4066MX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC4066SJ MM74HC4066MTC MM74HC4066N MTC14 N14A 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Schematic Diagram Connection Diagram Truth Table Input Switch CTL I/O–O/I L “OFF” H “ON” © 2005 Fairchild Semiconductor Corporation Top View DS005355 www.fairchildsemi.com MM74HC4066 Quad Analog Switch August 1984 MM74HC4066 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 2) −0.5 to +15V Supply Voltage (VCC) −1.5 to VCC +1.5V DC Control Input Voltage (VIN) Supply Voltage (VCC) VEE−0.5 to VCC +0.5V DC Switch I/O Voltage (VIO) Clamp Diode Current (IIK, IOK) ±20 mA DC Output Current, per pin (IOUT) ±25 mA (VIN, VOUT) Operating Temperature Range (TA) 600 mW S.O. Package only 500 mW Symbol VIH VIL Parameter IIN IIZ IIZ ICC °C 1000 ns 500 ns VCC = 9.0V 400 ns Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C. (Note 4) Conditions VCC TA = 25°C Typ TA = −40 to 85°C TA = −55 to 125°C Guaranteed Limits Units Minimum HIGH Level 2.0V 1.5 1.5 1.5 V Input Voltage 4.5V 3.15 3.15 3.15 V 9.0V 6.3 5.3 6.3 V 12.0V 8.4 8.4 8.4 V V Maximum LOW Level 2.0V 0.5 0.5 0.5 Input Voltage 4.5V 1.35 1.35 1.35 V 9.0V 2.7 2.7 2.7 V Maximum “ON” Resistance VCTL = VIH, IS = 2.0 mA 4.5V (Note 5) VIS = VCC to GND 9.0V (Figure 1) 12.0 2.0V 4.5V VCTL = VIH, IS = 2.0 mA RON V +85 VCC = 4.5V 12.0V RON VCC Note 2: Unless otherwise specified all voltages are referenced to ground. 260°C DC Electrical Characteristics 0 −40 Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Lead Temperature (TL) (Soldering 10 seconds) V (tr, tf) VCC = 2.0V Power Dissipation (PD) (Note 3) Units 12 Input Rise or Fall Times −65°C to +150°C Storage Temperature Range (TSTG) Max 2 DC Input or Output Voltage ±50 mA DC VCC or GND Current, per pin (ICC ) Min 3.6 3.6 3.6 V 170 200 220 Ω 50 85 105 110 Ω 30 70 85 90 Ω 120 180 215 240 Ω 50 80 100 120 Ω Ω 100 VIS = VCCor GND 9.0V 35 60 75 80 (Figure 1) 12.0V 20 40 60 70 Ω Maximum “ON” Resistance VCTL = VIH 4.5V 10 15 20 20 Ω Matching VIS = VCC to GND Ω Maximum Control VIN = VCC or GND Input Current VCC = 2−6V 9.0V 5 10 15 15 12.0V 5 10 15 15 Ω ±0.1 ±1.0 ±1.0 µA Maximum Switch “OFF” VOS = VCC or GND 6.0V 10 ±60 ±600 ±600 nA Leakage Current VIS = GND or VCC 9.0V 15 ±80 ±800 ±800 nA VCTL = VIL (Figure 3) 12.0V 20 ±100 ±1000 ±1000 nA Maximum Switch “ON” VIS = VCC to GND 6.0V 10 ±40 ±150 ±150 nA Leakage Current VCTL = VIH 9.0V 15 ±50 ±200 ±200 nA VOS = OPEN (Figure 2) 12.0V 20 ±60 ±300 ±300 nA Maximum Quiescent VIN = VCC or GND 6.0V 2.0 20 40 µA Supply Current IOUT = 0 µA 9.0V 4.0 40 80 µA 12.0V 8.0 80 160 µA Note 4: For a power supply of 5V ±10% the worst case on resistance (RON) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current occurs for CMOS at the higher voltage and so the 5.5V values should be used. Note 5: At supply voltages (VCC–GND) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital only when using these supply voltages. www.fairchildsemi.com 2 VCC = 2.0V−6.0V VEE = 0V−12V, CL = 50 pF (unless otherwise specified) Symbol Parameter Conditions VCC TA = 25°C Typ TA = −40 to 85°C TA = −55 to 125°C Units Guaranteed Limits tPHL, tPLH Maximum Propagation 2.0V 25 50 30 75 Delay Switch In to Out 4.5V 5 10 13 15 ns 9.0V 4 8 10 12 ns tPZL, tPZH Maximum Switch Turn RL = 1 kΩ “ON” Delay tPHZ, tPLZ Maximum Switch Turn RL = 1 kΩ “OFF” Delay fMAX 3 7 11 13 ns 2.0V 30 100 125 150 ns 4.5V 12 20 25 30 ns 9.0V 6 12 15 18 ns 12.0V 5 10 13 15 ns 2.0V 60 168 210 252 ns 4.5V 25 36 45 54 ns 9.0V 20 32 40 48 ns 12.0V 15 30 38 45 RL = 600Ω 4.5V 40 MHz Response (Figure 7) VIS = 2 VPP at (VCC/2) 9.0V 100 MHz 20 log (VO/VI) = −3 dB (Note 6) (Note 7) Crosstalk Between RL = 600Ω, F = 1 MHz any Two Switches (Note 7) (Note 8) dB 4.5V −52 9.0V −50 dB Peak Control to Switch RL = 600Ω, F = 1 MHz 4.5V 100 mV 9.0V 250 mV Feedthrough Noise (Figure 9) CL = 50 pF Switch OFF Signal RL = 600Ω, F = 1 MHz Feedthrough V(CT)VIL Isolation (Note 7) (Note 8) (Figure 10) CIN 12.0V Minimum Frequency (Figure 8) THD ns Total Harmonic 4.5V −42 dB 9.0V −44 dB % RL = 10 kΩ, CL = 50 pF, Distortion F = 1 kHz (Figure 11) VIS = 4 VPP 4.5V .013 VIS = 8 VPP 9.0V .008 Maximum Control 5 % 10 10 10 pF Input Capacitance CIN Maximum Switch 20 pF 0.5 pF 15 pF Input Capacitance CIN Maximum Feedthrough VCTL = GND Capacitance CPD Power Dissipation Capacitance Note 6: Adjust 0 dBm for F = 1 kHz (Null RL/RON Attenuation). Note 7: VIS is centered at VCC/2. Note 8: Adjust input for 0 dBm. 3 www.fairchildsemi.com MM74HC4066 AC Electrical Characteristics MM74HC4066 AC Test Circuits and Switching Time Waveforms FIGURE 1. “ON” Resistance FIGURE 2. “ON” Channel Leakage Current FIGURE 3. “OFF” Channel Leakage Current FIGURE 4. tPHL, tPLH Propagation Delay Time Signal Input to Signal Output FIGURE 5. tPZL, tPLZ Propagation Delay Time Control to Signal Output FIGURE 6. tPZH, tPHZ Propagation Delay Time Control to Signal Output www.fairchildsemi.com 4 MM74HC4066 AC Test Circuits and Switching Time Waveforms (Continued) FIGURE 7. Frequency Response FIGURE 8. Crosstalk: Control Input to Signal Output FIGURE 9. Crosstalk Between Any Two Switches FIGURE 10. Switch OFF Signal Feedthrough Isolation FIGURE 11. Sinewave Distortion 5 www.fairchildsemi.com MM74HC4066 Typical Performance Characteristics Typical “ON” Resistance Typical Crosstalk Between Any Two Switches Typical Frequency Response Special Considerations In certain applications the external load-resistor current may include both VCC and signal line components. To avoid drawing VCC current when switch current flows into www.fairchildsemi.com the analog switch input pins, the voltage drop across the switch must not exceed 0.6V (calculated from the ON resistance). 6 MM74HC4066 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 7 www.fairchildsemi.com MM74HC4066 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D www.fairchildsemi.com 8 MM74HC4066 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 9 www.fairchildsemi.com MM74HC4066 Quad Analog Switch Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 10