DATA SHEET
www.onsemi.com
TinyLogic UHS Three-Input
AND Gate
MARKING
DIAGRAMS
NC7SZ11
Description
The NC7SZ11 is a single three−input AND Gate from onsemi’s
Ultra−High Speed Series of TinyLogic. The device is fabricated with
advanced CMOS technology to achieve ultra−high speed with high
output drive while maintaining low static power dissipation over a
broad VCC operating range. The device is specified to operate over the
1.65 V to 5.5 V VCC operating range. The inputs and output are high
impedance when VCC is 0 V. Inputs tolerate voltages up to 5.5 V
independent of VCC operating voltage.
Features
•
•
•
•
•
•
•
•
•
E7KK
XYZ
SIP6 1.45x1.0
CASE 127EB
Ultra−High Speed: tPD = 2.9 ns (Typical) into 50 pF at 5 V VCC
High Output Drive: ±24 mA at 3 V VCC
Broad VCC Operating Range: 1.65 V to 5.5 V
Power Down High Impedance Inputs / Outputs
Over−Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation
Proprietary Noise / EMI Reduction Circuitry
Ultra−Small MicroPak™ Packages
Space−Saving SC70 Package
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Pin 1
6
SC−88
CASE 419B−02
Z11M G
G
1
E7, Z11
KK
XY
Z
M
G
= Specific Device Code
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code Format
= Assembly Plant Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
IEEC / IEC
A
B
&
Y
C
Figure 1. Logic Symbol
© Semiconductor Components Industries, LLC, 2001
March, 2022 − Rev. 4
1
Publication Order Number:
NC7SZ11/D
NC7SZ11
Pin Configurations
A 1
A 1
6
C
GND 2
5
VCC
B 3
4
Y
GND 2
5 VCC
B 3
Figure 2. SC70 (Top View)
(Top View)
6C
4Y
Figure 4. MicroPak (Top Through View)
AAA
Pin One
AAA represents Product Code Top Mark − see ordering code.
NOTE:
Orientation of Top Mark determines Pin One location.
Read the Top Product Code Mark left to right, Pin One
is the lower left pin (see diagram).
Figure 3. Pin 1 Orientation
FUNCTION TABLE (Y = ABC)
PIN DEFINITIONS
Pin # SC70
Pin # MicroPak
Name
1
1
A
2
2
GND
3
3
4
Description
Output
Inputs
Input
A
B
C
Y
Ground
X
X
L
L
B
Input
X
L
X
L
4
Y
Output
L
X
X
L
5
5
VCC
Supply Voltage
H
H
H
H
6
6
C
Input
H = HIGH Logic Level
L = LOW Logic Level
X = Either LOW or HIGH Logic Level
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2
NC7SZ11
ABSOLUTE MAXIMUM RATINGS
Symbol
Min
Max
Unit
VCC
Supply Voltage
−0.5
6.5
V
VIN
DC Input Voltage
−0.5
6.5
V
DC Output Voltage
−0.5
6.5
V
VOUT
Parameter
IIK
DC Input Diode Current
VIN < 0 V
−
−50
mA
IOK
DC Output Diode Current
VOUT < 0 V
−
−50
mA
IOUT
DC Output Current
−
±50
mA
DC VCC or Ground Current
−
±50
mA
−65
+150
°C
ICC or IGND
TSTG
Storage Temperature Range
TJ
Junction Temperature Under Bias
−
+150
°C
TL
Junction Lead Temperature (Soldering, 10 Seconds)
−
+260
°C
PD
Power Dissipation in Still Air
SC−88A
−
332
mW
MicroPak−6
ESD
−
812
Human Body Model, JESD22−A114
−
4000
Charge Device Model, JESD22−C101
−
2000
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VIN
VOUT
Parameter
Min
Max
Unit
Supply Voltage Operating
1.65
5.50
V
Supply Voltage Data Retention
1.50
5.50
Input Voltage
0
5.5
V
Output Voltage
0
VCC
V
TA
Operating Temperature
tr, tf
Input Rise and Fall Times
qJA
Thermal Resistance
Conditions
−40
+85
°C
VCC at 1.8 V, 2.5 V ±0.2 V
0
20
ns/V
VCC at 3.3 V ±0.3 V
0
10
VCC at 5.0 V ±0.5 V
0
5
SC−88A
−
377
MicroPak−6
−
154
°C/W
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Unused inputs must be held HIGH or LOW. They may not float.
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3
NC7SZ11
DC ELECTICAL CHARACTERISTICS
TA = 25°C
Symbol
VIH
VIL
VOH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
Typ
Max
Min
Max
Unit
1.65 to 1.95
0.65 VCC
−
−
0.65 VCC
−
V
2.30 to 5.50
0.70 VCC
−
−
0.70 VCC
−
1.65 to 1.95
−
−
0.35 VCC
−
0.35 VCC
2.30 to 5.50
−
−
0.30 VCC
−
0.30 VCC
1.55
1.65
−
1.55
−
2.20
2.30
−
2.20
−
3.00
2.90
3.00
−
2.90
−
4.50
4.40
4.50
−
4.40
−
VCC (V)
1.65
2.30
VOL
LOW Level Output Voltage
Conditions
VIN = VIH or VIL,
IOH = −100 mA
1.65
IOH = −4 mA
1.29
1.52
−
1.29
−
2.30
IOH = −8 mA
1.90
2.15
−
1.90
−
3.00
IOH = −16 mA
2.50
2.80
−
2.40
−
3.00
IOH = −24 mA
2.40
2.68
−
2.30
−
4.50
IOH = −32 mA
3.90
4.20
−
3.80
−
1.65
VIN = VIH or VIL,
IOL = 100 mA
−
0.00
0.10
−
0.10
−
0.00
0.10
−
0.10
−
0.00
0.10
−
0.10
2.30
3.00
4.50
IIN
Input Leakage Current
IOFF
Power Off Leakage Current
ICC
Quiescent Supply Current
TA = −40 to +85°C
Min
V
V
V
−
0.00
0.10
−
0.10
1.65
IOL = 4 mA
−
0.80
0.24
−
0.24
2.30
IOL = 8 mA
−
0.10
0.30
−
0.30
3.00
IOL = 16 mA
−
0.15
0.40
−
0.40
3.00
IOL = 24 mA
−
0.22
0.55
−
0.55
4.50
IOL = 32 mA
−
0.22
0.55
−
0.55
VIN = 5.5 V, GND
−
−
±1
−
±10
mA
VIN or VOUT = 5.5 V
−
−
1
−
10
mA
VIN = 5.5 V, GND
−
−
2
−
20
mA
1.65 to 5.5
0
1.65 to 5.50
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4
NC7SZ11
AC ELECTRICAL CHARACTERISTICS
TA = 25°C
Symbol
Parameter
tPLH, tPHL
Propagation Delay
(Figure 5, 6)
TA = −40 to +85°C
VCC (V)
Conditions
Min
Typ
Max
Min
Max
Unit
1.80 ±0.15
CL = 15 pF,
RL = 1 MW
−
9.0
18.5
−
19.0
ns
−
4.9
10.5
−
11.0
3.30 ±0.30
−
3.5
8.5
−
9.0
5.00 ±0.50
−
2.5
6.5
−
7.0
−
4.1
8.5
−
9.0
−
2.9
7.5
−
8.0
2.50 ±0.20
3.30 ±0.30
5.00 ±0.50
CL = 50 pF,
RL = 500 W
CIN
Input Capacitance
0.00
−
4
−
−
−
pF
CPD
Power Dissipation Capacitance
(Note 2) (Figure 7)
3.30
−
20
−
−
−
pF
5.00
−
25
−
−
−
2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at
no output loading and operating at 50% duty cycle.(See Figure 7) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD) (VCC) (fIN) + (ICCstatic).
AC Loading and Waveforms
VCC
tf = 3 ns
VCC
tr = 3 ns
90%
90%
OUTPUT
INPUT
CL *
50%
INPUT
10%
RL
50%
tW
tPLH
NOTES:
3. CL includes load and stray capacitance
4. Input PRR = 1.0 MHz, tW = 500 ns.
Figure 5. AC Test Circuit
GND
tPHL
50%
OUTPUT
10%
VOH
50%
VOL
Figure 6. AC Waveforms
VCC
A
INPUT
NOTE:
5. Input = AC Waveform; tr = tf = 1.8 ns; PRR = 10 MHz;
Duty Cycle = 50%.
Figure 7. ICCD Test Circuit
DEVICE ORDERING INFORMATION
Top Mark
Packages
Shipping†
NC7SZ11P6X
Z11
6−Lead SC70, EIAJ SC−88, 1.25 mm Wide
3000 / Tape & Reel
NC7SZ11P6X−L22347
Z11
6−Lead SC70, EIAJ SC−88, 1.25 mm Wide
3000 / Tape & Reel
NC7SZ11L6X
E7
6−Lead MicroPak, 1.00 mm Wide
5000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13590G
SIP6 1.45X1.0
DATE 31 AUG 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88 (SC−70 6 Lead), 1.25x2
CASE 419AD
ISSUE A
DATE 07 JUL 2010
1
D
e
e
E1 E
SYMBOL
MIN
A
0.80
MAX
1.10
A1
0.00
0.10
A2
0.80
1.00
b
0.15
0.30
0.18
c
0.10
D
1.80
2.00
2.20
E
1.80
2.10
2.40
E1
1.15
1.25
1.35
0.65 BSC
e
L
0.26
L1
0.36
0.46
0.42 REF
0.15 BSC
L2
TOP VIEW
NOM
θ
0º
8º
θ1
4º
10º
q1
A2 A
q
b
q1
L
L1
A1
SIDE VIEW
c
L2
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34266E
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SC−88 (SC−70 6 LEAD), 1.25X2
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
1
SCALE 2:1
DATE 11 DEC 2012
2X
aaa H D
D
H
A
D
6
5
GAGE
PLANE
4
1
2
L
L2
E1
E
DETAIL A
3
aaa C
2X
bbb H D
2X 3 TIPS
e
B
6X
b
ddd
TOP VIEW
C A-B D
M
A2
DETAIL A
A
6X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
ccc C
A1
SIDE VIEW
C
SEATING
PLANE
END VIEW
c
RECOMMENDED
SOLDERING FOOTPRINT*
6X
DIM
A
A1
A2
b
C
D
E
E1
e
L
L2
aaa
bbb
ccc
ddd
MILLIMETERS
MIN
NOM MAX
−−−
−−−
1.10
0.00
−−−
0.10
0.70
0.90
1.00
0.15
0.20
0.25
0.08
0.15
0.22
1.80
2.00
2.20
2.00
2.10
2.20
1.15
1.25
1.35
0.65 BSC
0.26
0.36
0.46
0.15 BSC
0.15
0.30
0.10
0.10
GENERIC
MARKING DIAGRAM*
6
XXXMG
G
6X
0.30
INCHES
NOM MAX
−−− 0.043
−−− 0.004
0.035 0.039
0.008 0.010
0.006 0.009
0.078 0.086
0.082 0.086
0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.006 BSC
0.006
0.012
0.004
0.004
MIN
−−−
0.000
0.027
0.006
0.003
0.070
0.078
0.045
0.66
1
2.50
0.65
PITCH
XXX = Specific Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 8:
CANCELLED
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
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