DATA SHEET
www.onsemi.com
TinyLogic UHS 2-Input
NAND Gate, Open Drain
Output
NC7SZ38
MARKING
DIAGRAMS
Pin 1
Description
UDFN6
1.0X1.0, 0.35P
CASE 517DP
The NC7SZ38 is a single 2−Input NAND gate with open drain
output stage from onsemi’s Ultra−High Speed Series of TinyLogic.
The device is fabricated with advanced CMOS technology to achieve
ultra−high speed with high output drive while maintaining low static
power dissipation over a very broad VCC operating range. The device
is specified to operate over the 1.65 V to 5.5 V VCC range. The inputs
and output are high impedance when VCC is 0 V. Inputs tolerate
voltages up to 5.5 V, independent of VCC when in the high impedance
state. The open drain output stage tolerates voltages up to 6 V
independent of VCC when in the high impedance state.
Ultra−High Speed: tPD = 2.2 ns (Typical) into 50 pF at 5 V VCC
Open Drain Output Stage for OR Tied Applications
High Output Sink Drive: ±24 mA at 3 V VCC
Broad VCC Operating Range: 1.65 V to 5.5 V
Matches Performance of LCX Operated at 3.3 V VCC
Power Down High−Impedance Inputs / Outputs
Over−Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation
Proprietary Noise / EMI Reduction Circuitry
Ultra−Small MicroPak™ Packages
Space−Saving SOT23−5, SC−74A and SC−88A Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
SC−74A
CASE 318BQ
&
June, 2022 − Rev. 5
SOT23−5
CASE 527AH
7Z38 M
SC−88A
CASE 419A−02
Z38MG
G
= Specific Device Code
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code Format
= Assembly Plant Code
= Data Code*
= Pb−Free Package
(Note: Microdot may be in either location)
Y
ORDERING INFORMATION
Figure 1. Logic Symbol
© Semiconductor Components Industries, LLC, 1996
A6, 7Z38, Z38
KK
XY
Z
M
G
7Z38 MG
G
*Date Code orientation and/or position may
vary depending upon manufacturing location.
IEEC / IEC
A
B
A6KK
XYZ
Pin 1
Features
•
•
•
•
•
•
•
•
•
•
•
A6KK
XYZ
SIP6 1.45x1.0
CASE 127EB
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
1
Publication Order Number:
NC7SZ38/D
NC7SZ38
Pin Configurations
A 1
5
VCC
B 2
GND 3
4
Y
6 VCC
B 2
5 NC
GND 3
Figure 2. SOT23−5, SC−88A and
SC−74A (Top View)
4 Y
Figure 3. MicroPak (Top Through View)
PIN DEFINITIONS
FUNCTION TABLE
Pin # SC−88A /
SC−74A/
SOT23−5
Pin # MicroPak
Inputs
Name
Description
1
1
A
Input
2
2
B
Input
3
3
GND
Ground
4
4
Y
Output
5
A 1
6
VCC
Supply Voltage
5
NC
No Connect
Output
A
B
Y
L
L
*H
L
H
*H
H
L
*H
H
H
L
H = HIGH Logic Level
L = LOW Logic Level
*H = High Impedance Output State, Open Drain
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2
NC7SZ38
ABSOLUTE MAXIMUM RATINGS
Symbol
Min
Max
Unit
VCC
Supply Voltage
−0.5
6.5
V
VIN
DC Input Voltage
−0.5
6.5
V
DC Output Voltage
−0.5
6.5
V
VOUT
Parameter
IIK
DC Input Diode Current
VIN < 0 V
−
−50
mA
IOK
DC Output Diode Current
VOUT < 0 V
−
−50
mA
IOUT
DC Output Current
−
±50
mA
DC VCC or Ground Current
−
±50
mA
−65
+150
°C
ICC or IGND
TSTG
Storage Temperature Range
TJ
Junction Temperature Under Bias
−
+150
°C
TL
Junction Lead Temperature (Soldering, 10 Seconds)
−
+260
°C
PD
Power Dissipation in Still Air
SC−74A / SOT23−5
−
390
mW
SC−88A
−
332
MicroPak−6
−
812
MicroPak2™−6
−
812
Human Body Model, JEDEC: JESD22−A114
−
4000
Charge Device Model, JEDEC: JESD22−C101
−
2000
ESD
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VIN
VOUT
Parameter
Min
Max
Unit
Supply Voltage Operating
1.65
5.5
V
Supply Voltage Data Retention
1.50
5.5
Input Voltage
0
5.5
V
Output Voltage
0
5.5
V
−40
+85
°C
VCC = 1.8 V, 2.5 V ±0.2 V
0
20
ns/V
VCC = 3.3 V ±0.3 V
0
10
VCC = 5.0 V ±0.5 V
0
5
SC−74A / SOT23−5
−
320
SC−88A
−
377
MicroPak−6
−
154
MicroPak2−6
−
154
TA
Operating Temperature
tr, tf
Input Rise and Fall Times
qJA
Thermal Resistance
Conditions
°C/W
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Unused inputs must be held HIGH or LOW. They may not float.
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3
NC7SZ38
DC ELECTICAL CHARACTERISTICS
TA = +25°C
Symbol
VIH
VIL
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
TA = −40 to +85°C
Min
Typ
Max
Min
Max
Unit
1.65 to 1.95
0.65 VCC
−
−
0.65 VCC
−
V
2.30 to 5.50
0.70 VCC
−
−
0.70 VCC
−
1.65 to 1.95
−
−
0.35 VCC
−
0.35 VCC
2.30 to 5.50
−
−
0.30 VCC
−
0.30 VCC
VCC (V)
Conditions
V
ILKG
HIGH Level Output Leakage
5.50
VIN = VIL,
VOUT = VCC or GND
−
−
±5
−
±10
mA
VOL
LOW Level Output Voltage
1.65
VIN = VIH or VIL,
IOL = 100 mA
−
0.00
0.10
−
0.10
V
1.80
IIN
Input Leakage Current
IOFF
Power Off Leakage Current
ICC
Quiescent Supply Current
−
0.00
0.10
−
0.10
2.30
−
0.00
0.10
−
0.10
3.00
−
0.00
0.10
−
0.10
4.50
−
0.00
0.10
−
0.10
1.65
IOL = 4 mA
−
0.80
0.24
−
0.24
2.30
IOL = 8 mA
−
0.10
0.30
−
0.30
3.00
IOL = 16 mA
−
0.15
0.40
−
0.40
3.00
IOL = 24 mA
−
0.22
0.55
−
0.55
4.50
IOL = 32 mA
−
0.22
0.55
−
0.55
5.50
VIN = 5.5 V, GND
−
−
±1
−
±10
mA
VIN or VOUT = 5.5 V
−
−
1
−
10
mA
VIN = 5.5 V, GND
−
−
2
−
20
mA
0
5.50
AC ELECTRICAL CHARACTERISTICS
TA = +25°C
Symbol
tPZL
Parameter
Propagation Delay
(Figure 4, 5)
TA = −40 to +85°C
VCC (V)
Conditions
Min
Typ
Max
Min
Max
Unit
1.65
CL = 50 pF,
RU = 500 W,
RD = 500 W,
VIN = 2 · VCC
−
6.5
12.7
−
13.2
ns
−
5.4
10.5
−
11.0
1.80
2.50 ±0.20
−
3.5
7.0
−
7.5
3.30 ±0.30
−
2.8
5.0
−
5.2
5.00 ±0.50
−
2.2
4.3
−
4.5
−
5.5
12.7
−
13.2
−
4.6
10.5
−
11.0
−
3.0
7.0
−
7.5
3.30 ±0.30
−
2.1
6.0
−
5.2
5.00 ±0.50
−
1.3
4.3
−
4.5
Input Capacitance
0.00
−
4.0
−
−
−
pF
COUT
Output Capacitance
0.00
−
5.0
−
−
−
pF
CPD
Power Dissipation Capacitance
(Note 2) (Figure 6)
3.30
−
5.1
−
−
−
pF
5.00
−
7.3
−
−
−
tPLZ
1.65
1.80
2.50 ±0.20
CIN
CL = 50 pF,
RU = 500 W,
RD = 500 W,
VIN = 2 · VCC
ns
2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at
no output loading and operating at 50% duty cycle. CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD) (VCC) (fIN) + (ICCstatic).
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4
NC7SZ38
VCC
RU
OUTPUT
INPUT
CL
RD
NOTE:
3. CL includes load and stray capacitance.
Input PRR = 10 MHz tw = 500 ns.
Figure 4. AC Test Circuit
Figure 5. AC Waveforms
VCC
A
INPUT
NOTE:
4. Input = AC Waveform; tr = tf = 1.8 ns;
PRR = 10 MHz; Duty Cycle = 50%.
Figure 6. Test Circuit
DEVICE ORDERING INFORMATION
Top Mark
Packages
Shipping†
NC7SZ38M5X
7Z38
SC−74A
3000 / Tape & Reel
NC7SZ38M5X−L22090
7Z38
SOT23−5
3000 / Tape & Reel
NC7SZ38P5X
Z38
SC−88A
3000 / Tape & Reel
NC7SZ38P5X−L22057
Z38
SC−88A
3000 / Tape & Reel
NC7SZ38L6X
A6
SIP6, MicroPak
5000 / Tape & Reel
NC7SZ38L6X−L22175
A6
SIP6, MicroPak
5000 / Tape & Reel
NC7SZ38FHX
A6
UDFN6, MicroPak2
5000 / Tape & Reel
NC7SZ38FHX−L22175
A6
UDFN6, MicroPak2
5000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13590G
SIP6 1.45X1.0
DATE 31 AUG 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−74A
CASE 318BQ
ISSUE B
5
1
SCALE 2:1
5X
DATE 18 JAN 2018
b
0.20 C A B
E1
5
M
4
1
2
E
3
B
0.05
A1
e
D
A
L
DETAIL A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE.
DIM
A
A1
b
c
D
E
E1
e
L
M
TOP VIEW
A
SIDE VIEW
DETAIL A
C
c
SEATING
PLANE
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
MILLIMETERS
MIN
MAX
0.90
1.10
0.01
0.10
0.25
0.50
0.10
0.26
2.85
3.15
2.50
3.00
1.35
1.65
0.95 BSC
0.20
0.60
0_
10 _
GENERIC
MARKING DIAGRAM*
0.95
PITCH
XXX MG
G
XXX
M
G
2.40
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
5X
1.00
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
5X
0.70
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON66279G
SC−74A
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
SCALE 2:1
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
DATE 17 JAN 2013
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
B
M
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
J
GENERIC MARKING
DIAGRAM*
C
K
H
XXXMG
G
SOLDER FOOTPRINT
0.50
0.0197
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
mm Ǔ
ǒinches
STYLE 1:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. EMITTER
3. BASE
4. COLLECTOR
5. CATHODE
STYLE 3:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. CATHODE 1
STYLE 4:
PIN 1. SOURCE 1
2. DRAIN 1/2
3. SOURCE 1
4. GATE 1
5. GATE 2
STYLE 6:
PIN 1. EMITTER 2
2. BASE 2
3. EMITTER 1
4. COLLECTOR
5. COLLECTOR 2/BASE 1
STYLE 7:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 8:
PIN 1. CATHODE
2. COLLECTOR
3. N/C
4. BASE
5. EMITTER
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. ANODE
5. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42984B
STYLE 5:
PIN 1. CATHODE
2. COMMON ANODE
3. CATHODE 2
4. CATHODE 3
5. CATHODE 4
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SC−88A (SC−70−5/SOT−353)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6 1.0X1.0, 0.35P
CASE 517DP
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13593G
UDFN6 1.0X1.0, 0.35P
DATE 31 AUG 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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