NCP1339FDR2G

NCP1339 High-Voltage, QuasiResonant Controller featuring Valley Lock-Out and Power Saving Mode The NCP1339 is a highly integrated quasi−resonant flyback controller capable of controlling rugged and high−performance off−line power supplies as required by adapter applications. With an integrated active X−cap discharge feature and power savings mode, the NCP1339 can enable no−load power consumption below 10 mW for 45 W notebook adapters. The quasi−resonant current−mode flyback stage features a proprietary valley−lockout circuitry, ensuring stable valley switching. This system works down to the 6th valley and toggles to a frequency foldback mode to eliminate switching losses. When the loop tends to force below 25−kHz frequencies, the NCP1339 skips cycles to contain the power delivery. To help build rugged converters, the controller features several key protective features: an internal brown−out, a non−dissipative Over Power Protection for a constant maximum output current regardless of the input voltage, a latched over−voltage protection through a dedicated pin. Features • • • • • • • • • • • • • • • • • • • High−voltage Current Source for Lossless Start−up Sequence X2 Capacitors Discharge Capability Power Savings Mode (PSM) for Extremely Low No−Load Power: Wide VCC Range from 10 V to 28 V Latching−off 28−V VCC Over−Voltage Protection Abnormal Overcurrent Fault Protection for Winding Short Circuit or Inductor Saturation Detection Integrated High−Voltage Startup Circuit with Brown−Out Detection Fault Input for Severe Fault Conditions, NTC Compatible for OTP Circuit Latching Off In Severe Fault Detection (OVP or OTP) Internal Temperature Shutdown Valley Switching Operation with Valley−Lockout for Noise−Free Operation Frequency Fold−back for Highest Performance in Standby Mode 25−kHz Clamp and Skip Mode Timer−Based Overload Protection (Latched or Auto−Recovery Options) Adjustable Overpower Protection 4−ms Soft−Start Timer ZCD Blanking Time to Ignore Leakage Ringing at Turn−Off: 3 ms for C, D and E versions and 0.7 ms for F, G, H, I and J versions Ready for High−Density QR design (F, G, H, I and J versions) These Devices are Pb−Free and are RoHS Compliant www.onsemi.com 14 1 SOIC−14 NB (LESS PIN 13) D SUFFIX CASE 751AN MARKING DIAGRAM 14 NCP1339xG AWLYWW 1 NCP1339 = Specific Device Code x = C, D, E, F, G, H, I or J A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb−Free Package PIN CONNECTIONS X2 REM OPP ZCD Fault FB CS HV NC NC VCC DRV GND (For C, D, E, F, G, and H versions) X2 REM OPP ZCD Fault FB CS HV NC IFF VCC DRV GND (For I and J versions) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 31 of this data sheet. © Semiconductor Components Industries, LLC, 2017 February, 2017 − Rev. 6 1 Publication Order Number: NCP1339/D NCP1339 PART NUMBER MATRIX Abnormal Overcurrent Fault ZCD Blanking Time Jittering Function Adjustable Frozen Peak Current (IFF pin) Device Version Overload Protection NCP1339CDR2G NCP1339C Auto−recovery Auto−recovery 3 ms Disabled Disabled NCP1339DDR2G NCP1339D Latching−off Latching−off 3 ms Disabled Disabled NCP1339EDR2G NCP1339E Latching−off Latching−off 3 ms Enabled Disabled NCP1339FDR2G NCP1339F Latching−off Latching−off 0.7 ms Enabled Disabled NCP1339GDR2G NCP1339G Auto−recovery Auto−recovery 0.7 ms Enabled Disabled NCP1339HDR2G NCP1339H Auto−recovery Auto−recovery 0.7 ms Disabled Disabled NCP1339IDR2G NCP1339I Latching−off Latching−off 0.7 ms Enabled Enabled NCP1339JDR2G NCP1339J Auto−recovery Auto−recovery 0.7 ms Enabled Enabled Vout Vaux GND PSM_OFF NCP1339 X2 1 14 REM 2 13 3 12 4 11 5 10 6 9 7 8 N EMI Filter L1 FB Vcc GND CS Rsense Figure 1. NCP1339 Typical Application Circuit (without IFF pin) www.onsemi.com 2 NCP1339 Vout Vaux GND PSM_OFF NCP1339 X2 1 14 REM 2 13 3 12 4 11 5 10 6 9 7 8 N EMI Filter IFF Vcc FB L1 GND CS Rsense Figure 2. NCP1339 Typical Application Circuit (with IFF pin) PIN FUNCTION DESCRIPTION Pin Number Pin Name 1 X2 2 REM The part operates when the REM pin is forced lower than a certain level and enters the Power Savings Mode (PSM) otherwise. 3 OPP A resistive divider from the auxiliary winding to this pin sets the OPP compensation level. 4 ZCD Input to the demagnetization detection comparator for the QR Flyback controller. 5 Fault The controller enters fault mode if the voltage of this pin is pulled above or below the fault thresholds. A precise pull up current source allows direct interface with an NTC thermistor. Fault detection triggers a latch. 6 FB Feedback input for the QR Flyback controller. Allows direct connection to an optocoupler. 7 CS Input to the cycle−by−cycle current limit comparator for the QR Flyback section. 8 GND Ground reference. 9 DRV This is the drive pin of the circuit. The DRV high−current capability (−0.5 /+0.8 A) makes it suitable to effectively drive high gate charge power MOSFETs. 10 VCC This pin is the positive supply of the IC. The circuit starts to operate when VCC exceeds 15 V and turns off when VCC goes below 9 V (typical values). After start−up, the operating range is 10 V up to 28 V. An OVP comparator monitors this pin and offers a means to latch the converter in fault conditions. 11 NC or IFF The external resistor connected to this pin adjusts the frozen peak current during frequency foldback mode and the power gap between different valley lockouts. 12 NC 13 14 Function When the voltage on this pin disappears, the controller ensures the X2−capacitors discharge. Removed for creepage distance. HV This pin provides a charging current during start−up and auto−recovery faults but also a means to efficiently discharge the input X2 capacitors. www.onsemi.com 3 NCP1339 ZCD + DEMAG QR Logic QR clock − VFB Vzcd(th) Clock_25 kHz VCC charge X2 Capacitor discharge BONOK detection Line monitoring PSM control HV HV(stop) Blanking Time Tzcd(blank) VFB Fault or PSM REM Timeout DRV (internal) Latch X2 FB BO_buf Skip VCC QR Clock Vskip Clamp Skip Comparator HV(stop) S VCC Management and internal Reference VCC UVLO VCC(OVP) Q Frequency Clamp R Circuit reset When VCC