NCP151AAMX280180TCG

NCP151 LDO Regulator - Dual, High PSRR 300mA The NCP151 is a dual linear regulator capable of supplying 300 mA output current from 1.7 V input voltage. The device provides wide output voltage range from 0.8 V up to 3.6 V. In order to optimize performance for battery operated portable applications, the NCP151 employs the dynamic quiescent current adjustment for very low IQ consumption at no−load. www.onsemi.com 1 Features • • • • • • • • • • Operating Input Voltage Range 1.7 V to 5.5 V Available in Fixed Voltage Option: 0.8 V to 3.6 V ±2% Accuracy Over Load/Temperature Low Quiescent Current Typ. 100 mA Low Dropout: 210 mV for 300 mA @ 2.8 V Low Dropout: 370 mV for 300 mA @ 1.8 V High PSRR: Typ. 70 dB at 1 kHz @ OUT1, OUT2 Stable with a 1 mF Small Case Size Ceramic Capacitors Available in XDFN4, 1 mm × 1 mm × 0.4 mm These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Typical Applications • • • • • PDAs, Mobile Phones, GPS, Smartphones Wireless Handsets, Wireless LAN Devices, Bluetooth®, Zigbee® Bitcoin Miners Portable Medical Equipment Other Battery Powered Equipment VIN1 XDFN4 CASE 711AJ MARKING DIAGRAM XX M 1 XX M = Specific Device Code = Date Code PIN CONNECTIONS IN OUT2 4 3 EPAD 1 2 OUT1 GND (Top View) NCP151 IN OUT2 GND OUT1 CIN1 1 mF ORDERING INFORMATION VOUT2 VOUT1 COUT1 1 mF See detailed ordering and shipping information on page 2 of this data sheet. COUT2 1 mF Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2017 September, 2019 − Rev. 4 1 Publication Order Number: NCP151/D NCP151 IN Thermal shutdown Bandgap reference − Integrated soft−start + MOSFET driver with current limit OUT1 GND OUT2 − Bandgap reference Integrated soft−start + MOSFET driver with current limit Thermal shutdown Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. XDFN4 Pin Name 4 IN 1 OUT1 Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor. 3 OUT2 Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor. 2 GND Common ground connection. EPAD EPAD Expose pad can be tied to ground plane for better power dissipation. Description Input voltage supply pin. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 V to 6 V V VOUT1, VOUT2 −0.3 to VIN + 0.3, max 6 V V Output Short Circuit Duration tSC unlimited s Maximum Junction Temperature TJ 150 °C TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Input Voltage (Note 1) Output Voltage Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per EIA/JESD22−A114. ESD Machine Model tested per EIA/JESD22−A115. Latchup Current Maximum Rating tested per JEDEC standard: JESD78. www.onsemi.com 2 NCP151 THERMAL CHARACTERISTICS Rating Symbol Value Unit RqJA 170 °C/W Thermal Characteristics, XDFN4 (Note 3), Thermal Resistance, Junction−to−Air 3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7. ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VIN = VOUT(NOM) + 1 V for VOUT options greater than 1.5 V. Otherwise VIN = 2.5 V , whichever is greater, IOUT = 1 mA; CIN = COUT = 1 mF, unless otherwise noted. Typical values are at TJ = +25°C. Parameter Symbol Operating Input Voltage VIN Output Voltage Accuracy VOUT Test Conditions Min Typ Max Unit 1.7 5.5 V VOUT(NOM) ≤ 2 V −40 +40 mV VOUT(NOM) > 2 V −2 +2 % Line Regulation LineReg VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.5 V, (VIN ≥ 1.7 V) 0.01 0.1 %/V Load Regulation LoadReg IOUT = 1 mA to 300 mA 12 30 mV mV Dropout Voltage (Note 5) VDO1 OUT1 VOUT(NOM) = 2.8 V IOUT = 300 mA 210 370 VDO2 OUT2 VOUT(NOM) = 1.8 V IOUT = 300 mA 370 560 Current Limit ICL OUT1, OUT2, VOUT = 90% VOUT(NOM) Short Circuit Current ISC OUT1, OUT2, VOUT = 0 V 600 Quiescent Current IQ IOUT1 = 0 mA, IOUT2 = 0 mA 100 VOUT Slew Rate (Note 6) Power Supply Rejection Ratio Output Voltage Noise Thermal Shutdown Threshold VOUT_SR PSSR VOUT = 1.8 V, IOUT = 10 mA 325 mA 600 200 mA Normal (Version A) 100 Slow (Version C) 30 f = 1 kHz 70 dB VIN = 3.8 V, VOUT1 = 2.8 V, IOUT = 10 mA mV/ms VN f = 10 Hz to 100 kHz, IOUT1 = 10 mA 70 mVRMS TSDH Temperature rising 160 °C TSDL Temperature failing 140 °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. 5. Dropout voltage is characterized when VOUT falls 100 mV below VOUT(NOM). 6. Please refer OPN to determine slew rate. NCP151A − normal speed. NCP151C − slower speed. www.onsemi.com 3 NCP151 TYPICAL CHARACTERISTICS 2.802 1.800 VOUT, OUTPUT VOLTAGE (V) 1.798 VOUT, OUTPUT VOLTAGE (V) 1 mA 1.796 1.794 1.792 1.790 300 mA 1.788 1.786 1.784 −20 0 20 40 60 80 100 2.796 2.794 2.792 2.788 2.786 2.784 −40 20 40 60 80 Figure 4. Output Voltage vs. Temperature 8 6 4 VIN = VOUT,NOM + 1 V IOUT = 1 mA to 300 mA 2 −20 0 20 40 60 80 100 100 1.0 0.8 0.6 0.4 0.2 0 −40 −20 0 20 40 60 80 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 5. Load Regulation vs. Temperature Figure 6. Line Regulation vs. Temperature 600 100 1.2 IGND, GROUND CURRENT (mA) IGND, GROUND CURRENT (mA) 0 Figure 3. Output Voltage vs. Temperature 10 500 400 300 TJ = 25°C 200 0 −20 TJ, JUNCTION TEMPERATURE (°C) 12 100 300 mA 2.790 TJ, JUNCTION TEMPERATURE (°C) 14 0 −40 2.798 LINEREG, LINE REGULATION (mV/V) LOADREG, LOAD REGULATION (mV) 1.782 −40 1 mA 2.800 TJ = −40°C TJ = 85°C 1u 10u 100u 1m 10m 100m 1.0 0.8 0.6 0.4 0.2 0 1 IOUT1 = IOUT2 IOUT1−LOAD, IOUT2 = 0 A 1u 10u 100u 1m 10m 100m IOUT, OUTPUT CURRENT (A) IOUT, OUTPUT CURRENT (A) Figure 7. Ground Current vs. Output Current VOUT,NOM = 1.8 V − One Output Load Figure 8. Ground Current vs. Output Current − Different Load Combinations www.onsemi.com 4 1 NCP151 TYPICAL CHARACTERISTICS 450 350 TJ = 25°C 300 250 TJ = −40°C 200 150 100 50 0 30 60 90 200 IOUT = 100 mA 150 100 IOUT = 20 mA 50 −20 0 20 40 60 80 100 Figure 10. Dropout Voltage vs. Temperature − VOUT,NOM = 1.8 V 250 TJ = 25°C 150 TJ = −40°C 100 50 0 30 60 90 IOUT = 300 mA 200 150 100 IOUT = 100 mA 50 IOUT = 20 mA 0 −40 120 150 180 210 240 270 300 −20 0 20 40 60 80 100 IOUT, OUTPUT CURRENT (mA) TJ, JUNCTION TEMPERATURE (°C) Figure 11. Dropout Voltage vs. Output Current − VOUT,NOM = 2.8 V Figure 12. Dropout Voltage vs. Temperature − VOUT,NOM = 2.8 V 800 750 ICL, CURRENT LIMIT, ISC, SHORT−CIRCUIT CURRENT 250 Figure 9. Dropout Voltage vs. Output Current − VOUT,NOM = 1.8 V 200 650 300 TJ, JUNCTION TEMPERATURE (°C) TJ = 85°C 700 350 IOUT, OUTPUT CURRENT (mA) 250 0 IOUT = 300 mA 400 0 −40 120 150 180 210 240 270 300 VDO, DROPOUT VOLTAGE (mV) 0 VDO, DROPOUT VOLTAGE (mV) VDO, DROPOUT VOLTAGE (mV) TJ = 85°C 400 ISC 600 ICL 550 500 VIN = 2.8 V VOUT = 1.8 V CIN = COUT = 1 mF ICL: VOUT = 90% VOUT,NOM ISC: VOUT = 0 V 450 400 350 300 −40 −20 0 20 40 60 80 100 EQUIVALENT SERIES RESISTANCE (W) VDO, DROPOUT VOLTAGE (mV) 450 100 Stable Region 10 1 Unstable Region 0.1 0.01 VOUT = 1.8 V CIN = COUT = 1 mF 0 50 100 150 200 250 TJ, JUNCTION TEMPERATURE (°C) IOUT, OUTPUT CURRENT (mA) Figure 13. Short−circuit Current, Current Limit vs. Temperature Figure 14. Maximum COUT ESR Value vs. Output Current www.onsemi.com 5 300 NCP151 SPECTRAL NOISE DENSITY (mV/sqrtHz) TYPICAL CHARACTERISTICS 10 IOUT = 300 mA 1 RMS Output Noise (mV) IOUT 0.1 IOUT = 10 mA 0.01 0.001 VIN = 2.8 V VOUT = 1.8 V CIN = COUT = 1 mF 10 100 10 Hz − 100 kHz 100 Hz − 100 kHz 69.2 1 mA 72.7 10 mA 71.5 67.9 300 mA 78.7 76.1 IOUT = 1 mA 1K 100K 10K 1M FREQUENCY (kHz) SPECTRAL NOISE DENSITY (mV/sqrtHz) Figure 15. Spectral Noise Density vs. Frequency, VOUT = 1.8 V 10 IOUT = 300 mA 1 RMS Output Noise (mV) IOUT 0.1 IOUT = 10 mA 0.01 0.001 VIN = 3.8 V VOUT = 2.8 V CIN = COUT = 1 mF 10 100 10 Hz − 100 kHz 100 Hz − 100 kHz 88.5 1 mA 93.8 10 mA 92.3 86.9 300 mA 111.1 106.2 IOUT = 1 mA 1K 10K 100K 1M FREQUENCY (kHz) 90 80 IOUT = 1 mA 70 60 50 40 30 20 10 0 VIN = 2.8 V + 100 mVPP VOUT = 1.8 V CIN = COUT = 1 mF 10 100 1K IOUT = 10 mA IOUT = 300 mA 10K 100K 1M PSRR, POWER SUPPLY REJECTION RATIO (dB) PSRR, POWER SUPPLY REJECTION RATIO (dB) Figure 16. Spectral Noise Density vs. Frequency, VOUT = 2.8 V 10M 90 80 IOUT = 1 mA 70 60 50 40 30 VIN = 3.8 V + 100 mVPP VOUT = 2.8 V CIN = COUT = 1 mF 20 10 0 10 100 1K IOUT = 10 mA IOUT = 300 mA 10K 100K 1M 10M f, FREQUENCY (Hz) f, FREQUENCY (Hz) Figure 17. PSRR vs. Frequency, VOUT = 1.8 V Figure 18. PSRR vs. Frequency, VOUT = 2.8 V www.onsemi.com 6 NCP151 1 V/div 1 V/div TYPICAL CHARACTERISTICS 4.8 V 3.8 V tEDGE = 1 ms 3.8 V 3.8 V 20 mV/div VOUT1 = 2.8 V VOUT2 = 1.8 V IOUT1 = 300 mA IOUT2 = 1 mA 20 mV/div 20 mV/div VOUT1 VOUT2 VOUT1 1 mA 1 mA tEDGE = 1 ms VOUT1 10 mV/div VIN = 3.8 V VOUT1 = 2.8 V VOUT2 = 1.8 V IOUT2 = 0 A VOUT2 300 mA 1 mA IOUT2 VOUT1 tEDGE = 1 ms 1 mA VIN = 3.8 V VOUT1 = 2.8 V VOUT2 = 1.8 V IOUT1 = 0 A VOUT2 Figure 21. Load Transient Response, IOUT1 = 1 mA to 300 mA to 1 mA 100 mA/div 400 mV/div VOUT1 = 2.8 V VOUT2 = 1.8 V IOUT1 = 1 mA IOUT2 = 300 mA Figure 20. Line Transient Response, VIN = 3.8 V to 4.8 V to 3.8 V 10 mV/div 300 mA/div 300 mA 500 mV/div 10 mV/div 300 mA/div 10 mV/div 3.8 V VOUT2 Figure 19. Line Transient Response, VIN = 3.8 V to 4.8 V to 3.8 V IOUT1 tEDGE = 1 ms VIN VIN 20 mV/div 4.8 V Figure 22. Load Transient Response, IOUT2 = 1 mA to 300 mA to 1 mA VOUT1 IOUT2 VOUT2 VIN = 5.5 V VOUT1 = 2.8 V VOUT2 = 1.8 V IOUT1 = 0 A CIN = COUT = 1 mF Figure 23. Thermal Shutdown www.onsemi.com 7 NCP151 APPLICATIONS INFORMATION General Larger output capacitors and lower ESR could improve the load transient response or high frequency PSRR. It is not recommended to use tantalum capacitors on the output due to their large ESR. The equivalent series resistance of tantalum capacitors is also strongly dependent on the temperature, increasing at low temperature. The NCP151 is a dual output 300 mA Low Dropout Linear Regulator. This device delivers high PSRR (70 dB at 1 kHz) and very good dynamic performance as load/line transients. In connection with low quiescent current this device is very suitable for various battery powered applications such as tablets, cellular phones, wireless and many others. Each output is fully protected in case of output overload, output short circuit condition and overheating, assuring a very robust design. The NCP151 device is housed in DFN−4 1 mm x 1 mm package which is useful for space constrains application. Output Current Limit Output Current is internally limited within the IC to a typical 600 mA. The NCP151 will source this amount of current measured with a voltage drops on the 90% of the nominal VOUT. If the Output Voltage is directly shorted to ground (VOUT = 0 V), the short circuit protection will limit the output current to 600 mA (typ). The current limit and short circuit protection will work properly over whole temperature range and also input voltage range. There is no limitation for the short circuit duration. Input Capacitor Selection (CIN) Input capacitor connected as close as possible is necessary for ensure device stability. The X7R or X5R capacitor should be used for reliable performance over temperature range. The value of the input capacitor should be 1 mF or greater to ensure the best dynamic performance. This capacitor will provide a low impedance path for unwanted AC signals or noise modulated onto constant input voltage. There is no requirement for the ESR of the input capacitor but it is recommended to use ceramic capacitors for their low ESR and ESL. A good input capacitor will limit the influence of input trace inductance and source resistance during sudden load current changes. Thermal Shutdown When the die temperature exceeds the Thermal Shutdown threshold (TSD − 160°C typical), Thermal Shutdown event is detected and the affected channel is turn−off. Second channel still working. The channel which is overheated will remain in this state until the die temperature decreases below the Thermal Shutdown Reset threshold (TSDU − 140°C typical). The channel which is overheated will remain in this state until the die temperature decreases below the Thermal Shutdown Reset threshold (TSDU − 140°C typical). Once the device temperature falls below the 140°C the appropriate channel is enabled again. The thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. This protection is not intended to be used as a substitute for proper heat sinking. The long duration of the short circuit condition to some output channel could cause turn−off other output when heat sinking is not enough and temperature of the other output reach TSD temperature. Output Decoupling The NCP151 requires an output capacitor connected as close as possible to the output pin of the regulator. The recommended capacitor value is 1 mF and X7R or X5R dielectric due to its low capacitance variations over the specified temperature range. The NCP151 is designed to remain stable with minimum effective capacitance of 0.68ĂmF to account for changes with temperature, DC bias and package size. Especially for small package size capacitors such as 0201 the effective capacitance drops rapidly with the applied DC bias. Please refer to Figure 24. There is no requirement for the minimum value of Equivalent Series Resistance (ESR) for the COUT but the maximum value of ESR should be less than 1.7 W. Power Dissipation As power dissipated in the NCP151 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. The maximum power dissipation the NCP151 can handle is given by: P D(MAX) + ƪ85° C * T Aƫ q JA (eq. 1) The power dissipated by the NCP151 for given application conditions can be calculated from the following equations: Figure 24. Capacity vs. DC Bias Voltage www.onsemi.com 8 NCP151 P D [ V IN I GND ) I OUT1ǒV IN * V OUT1Ǔ Turn−On Time The PMOS pass transistor has an inherent body diode which will be forward biased in the case that VOUT > VIN. Due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. The turn−on time is defined as the time period from EN assertion to the point in which VOUT will reach 98% of its nominal value. This time is dependent on various application conditions such as VOUT(NOM) COUT and TA. The NCP151 provides two options of VOUT ramp−up time. The NCP151A have normal slew rate, typical 100 mV/ms and NCP151C and provide slower option with typical value 30 mV/ms which is suitable for camera sensor and other sensitive devices. Power Supply Rejection Ratio PCB Layout Recommendations Reverse Current To obtain good transient performance and good regulation characteristics place CIN and COUT capacitors close to the device pins and make the PCB traces wide. In order to minimize the solution size, use 0402 capacitors. Larger copper area connected to the pins will also improve the device thermal resistance. The actual power dissipation can be calculated from the equation above (Equation 2). Expose pad should be tied the shortest path to the GND pin. The NCP151 features very good Power Supply Rejection ratio. If desired the PSRR at higher frequencies in the range 100 kHz − 10 MHz can be tuned by the selection of COUT capacitor and proper PCB layout. qJA, JUNCTION−TO−AMBIENT THERMAL RESISTANCE (°C/W) 200 PD(MAX), TA = 25°C, 2 oz Cu 0.35 195 qJA, 1 oz Cu 190 0.34 185 0.33 180 PD(MAX), TA = 25°C, 1 oz Cu 175 0.32 0.31 qJA, 2 oz Cu 170 165 0.36 0 100 200 300 400 500 0.30 600 PD(MAX), MAXIMUM POWER DISSIPATION (W) ) I OUT2ǒV IN * V OUT2Ǔ (eq. 2) 0.29 PCB COPPER AREA (mm2) Figure 25. qJA vs. Copper Area (XDFN4) ORDERING INFORMATION Marking Voltage option OUT1/OUT2 Vout Slew Rate OUT1/OUT2 NCP151AAMX180070TCG YE 1.8 V/0.70 V Normal/Normal NCP151AAMX180075TCG YA 1.8 V/0.75 V Normal/Normal NCP151AAMX280180TCG YC 2.8 V/1.8 V Normal/Normal NCP151AAMX330180TCG YD 3.3 V/1.8 V Normal/Normal NCP151CCMX280180TCG ZC 2.8 V/1.8 V Slow/Slow Device Package Shipping† XDFN4 CASE 711AJ (Pb−Free) 3000 Units/ Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 9 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS XDFN4 1.0x1.0, 0.65P CASE 711AJ ISSUE B 1 SCALE 4:1 GENERIC MARKING DIAGRAM* XX M 1 DOCUMENT NUMBER: DESCRIPTION: XX = Specific Device Code M = Date Code 98AON67179E XDFN4, 1.0X1.0, 0.65P DATE 25 JUN 2021 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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