NDD03N80ZT4G

NDD03N80Z N‐Channel Power MOSFET 800 V, 4.5 W Features • • • • ESD Diode−Protected Gate 100% Avalanche Tested 100% Rg Tested These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX 800 V 4.5 W @ 10 V ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit VDSS 800 V Continuous Drain Current RqJC ID 2.9 A Continuous Drain Current RqJC, TA = 100°C ID 1.9 A Pulsed Drain Current, VGS @ 10 V IDM 12 A Power Dissipation RqJC PD 96 W Gate−to−Source Voltage VGS ±30 V Single Pulse Avalanche Energy, ID = 2.5 A EAS 100 mJ ESD (HBM) (JESD22−A114) Vesd 2300 V RMS Isolation Voltage (t = 0.3 sec., R.H. ≤ 30%, TA = 25°C) VISO 4500 V Peak Diode Recovery (Note 1) dv/dt 4.5 V/ns IS 3.3 A Drain−to−Source Voltage Continuous Source Current (Body Diode) Maximum Temperature for Soldering Leads Operating Junction and Storage Temperature Range TL 260 °C TJ, Tstg −55 to 150 °C G (1) S (3) 4 4 1 2 2 3 NDD03N80Z−1G IPAK CASE 369D 3 NDD03N80ZT4G DPAK CASE 369AA MARKING AND ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. 1. IS = 3.3 A, di/dt ≤ 100 A/ms, VDD ≤ BVDSS, TJ = +150°C October, 2013 − Rev. 2 D (2) 1 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. © Semiconductor Components Industries, LLC, 2013 N-Channel 1 Publication Order Number: NDD03N80Z/D NDD03N80Z THERMAL RESISTANCE Parameter Symbol Value Unit NDD03N80Z RqJC 1.3 °C/W (Note 3) NDD03N80Z (Note 2) NDD03N80Z−1 RqJA 33 96 Junction−to−Case (Drain) Junction−to−Ambient Steady State 2. Insertion mounted 3. Surface mounted on FR4 board using 1” sq. pad size (Cu area = 1.127” sq [2 oz] including traces). ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Conditions Min Drain-to-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 1 mA 800 Drain-to-Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Reference to 25°C, ID = 1 mA Characteristic Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Leakage Current Gate-to-Source Leakage Current IDSS VDS = 800 V, VGS = 0 V IGSS V 870 mV/°C TJ = 25°C 1.0 TJ = 125°C 50 VGS = ±20 V ±10 mA mA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Negative Threshold Temperature Coefficient Static Drain-to-Source On Resistance Forward Transconductance VGS(TH) VDS = VGS, ID = 50 mA VGS(TH)/TJ Reference to 25°C, ID = 50 mA 3.0 4.1 11 4.5 V RDS(ON) VGS = 10 V, ID = 1.2 A 3.7 gFS VDS = 15 V, ID = 1.2 A 2.1 S 440 pF mV/°C 4.5 W DYNAMIC CHARACTERISTICS Input Capacitance (Note 5) Ciss Output Capacitance (Note 5) Coss Reverse Transfer Capacitance (Note 5) Crss Total Gate Charge (Note 5) Qg VDS = 25 V, VGS = 0 V, f = 1 MHz 52 9.0 nC 17 Gate-to-Source Charge (Note 5) Qgs Gate-to-Drain (“Miller”) Charge (Note 5) Qgd 3.5 Plateau Voltage VGP 6.5 V Gate Resistance Rg 5.5 W 9.0 ns VDS = 400 V, ID = 3.3 A, VGS = 10 V 9.1 RESISTIVE SWITCHING CHARACTERISTICS (Note 6) Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time td(on) tr td(off) VDD = 400 V, ID = 3.3 A, VGS = 10 V, RG = 0 W tf 7.0 17 9.0 SOURCE−DRAIN DIODE CHARACTERISTICS Diode Forward Voltage VSD Reverse Recovery Time trr Charge Time ta Discharge Time tb Reverse Recovery Charge Qrr IS = 3.0 A, VGS = 0 V TJ = 25°C TJ = 100°C 0.9 http://onsemi.com 2 ns 81 280 1.3 4. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%. 5. Guaranteed by design. 6. Switching characteristics are independent of operating junction temperatures. V 0.8 360 VGS = 0 V, VDD = 30 V IS = 3.3 A, di/dt = 100 A/ms 1.6 mC NDD03N80Z TYPICAL CHARACTERISTICS 3.0 VGS = 6.8 V to 10 V 2.5 VDS = 25 V 6.4 V 2.0 6.2 V 1.5 6.0 V 1.0 5.8 V 5.0 V 0.5 0.0 0 5.2 V 5.6 V 5.4 V 5 10 15 20 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ = −55°C 3.0 TJ = 150°C 2.0 1.0 0.0 25 1 ID = 1.2 A TJ = 25°C 11 10 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 7.0 6.5 VGS = 10 V TJ = 25°C 5.5 5.0 4.5 4.0 3.5 3.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 ID, DRAIN CURRENT (A) 1.15 BVDSS, NORMALIZED BREAKDOWN VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 10 Figure 4. On−Resistance versus Drain Current and Gate Voltage 2.75 2.25 3 4 5 6 7 8 9 VGS, GATE−TO−SOURCE VOLTAGE (V) 6.0 Figure 3. On−Region versus Gate−to−Source Voltage 2.50 2 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics 12 TJ = 25°C 4.0 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 5.0 6.6 V ID = 1.2 A VGS = 10 V 1.10 2.00 1.05 1.75 1.50 1.00 1.25 1.00 0.95 0.75 0.50 0.25 −50 ID = 1 mA −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 0.90 −50 Figure 5. On−Resistance Variation with Temperature −25 0 25 50 75 100 TJ, JUNCTION TEMPERATURE (°C) 125 150 Figure 6. BVDSS Variation with Temperature http://onsemi.com 3 NDD03N80Z TYPICAL CHARACTERISTICS 10000 C, CAPACITANCE (pF) TJ = 150°C 1.0 TJ = 125°C 0.1 0 50 1000 Ciss Coss 100 Crss 10 1 100 150 200 250 300 350 400 450 500 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ = 25°C VGS = 0 V f = 1 MHz 1 Figure 7. Drain−to−Source Leakage Current versus Voltage VGS, GATE−TO−SOURCE VOLTAGE (V) 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 100 Figure 8. Capacitance Variation 450 QT VDS, DRAIN−TO−SOURCE VOLTAGE (V) IDSS, LEAKAGE (mA) 10.0 400 VDS 350 VGS QGS QGD 300 250 200 150 VDS = 400 V ID = 3.3 A TJ = 25°C 0 2 4 6 8 10 12 14 16 Qg, TOTAL GATE CHARGE (nC) 18 100 50 0 20 Figure 9. Gate−to−Source Voltage and Drain−to−Source Voltage versus Total Charge 100 VDD = 400 V ID = 3 A VGS = 10 V 100 IS, SOURCE CURRENT (A) t, TIME (ns) 1000 td(off) tr tf td(on) 10 1.0 1 10 RG, GATE RESISTANCE (W) 10 1.0 0.1 0.3 100 Figure 10. Resistive Switching Time Variation versus Gate Resistance TJ = 150°C 125°C 25°C −55°C 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 11. Diode Forward Voltage versus Current http://onsemi.com 4 1.2 NDD03N80Z TYPICAL CHARACTERISTICS ID, DRAIN CURRENT (A) 100 10 VGS ≤ 30 V SINGLE PULSE TC = 25°C 100 ms 10 ms 1 ms 10 ms dc 1 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.01 0.1 1 10 100 1000 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 12. Maximum Rated Forward Biased Safe Operating Area 10 R(t) (C/W) 1 50% (DUTY CYCLE) 20% 10% 0.1 5.0% 2.0% RqJC = 1.3°C/W Steady State 1.0% 0.01 0.000001 SINGLE PULSE 0.00001 0.0001 0.001 0.01 0.1 1 PULSE TIME (s) Figure 13. Thermal Impedance (Junction−to−Case) http://onsemi.com 5 10 100 1000 NDD03N80Z Table 1. ORDERING INFORMATION Package Shipping† NDD03N80Z−1G IPAK (Pb-Free, Halogen-Free) 75 Units / Rail NDD03N80ZT4G DPAK (Pb-Free, Halogen-Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MARKING DIAGRAMS 4 Drain YWW 3N 80ZG YWW 3N 80ZG 4 Drain 2 1 Drain 3 Gate Source 1 2 3 Gate Drain Source IPAK A Y WW G, H DPAK = Location Code = Year = Work Week = Pb−Free, Halogen−Free Package http://onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS IPAK CASE 369D−01 ISSUE C SCALE 1:1 C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 −T− SEATING PLANE K J F D G DATE 15 DEC 2010 H 3 PL 0.13 (0.005) M DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− T MARKING DIAGRAMS STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE Discrete YWW xxxxxxxx STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR xxxxxxxxx A lL Y WW DOCUMENT NUMBER: DESCRIPTION: 98AON10528D Integrated Circuits xxxxx ALYWW x = Device Code = Assembly Location = Wafer Lot = Year = Work Week Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. IPAK (DPAK INSERTION MOUNT) PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA−01 ISSUE B 4 1 2 DATE 03 JUN 2010 3 SCALE 1:1 A E b3 c2 B Z D 1 L4 A 4 L3 2 b2 H DETAIL A 3 c b 0.005 (0.13) e M H C L2 GAUGE PLANE C L L1 DETAIL A A1 ROTATED 905 CW STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE SOLDERING FOOTPRINT* 6.20 0.244 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− GENERIC MARKING DIAGRAM* XXXXXXG ALYWW YWW XXX XXXXXG IC Discrete XXXXXX A L Y WW G 6.17 0.243 SCALE 3:1 SEATING PLANE DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON13126D DPAK (SINGLE GAUGE) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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