NE5517

NE5517, NE5517A, AU5517 Dual Operational Transconductance Amplifier The AU5517 and NE5517 contain two current-controlled transconductance amplifiers, each with a differential input and push-pull output. The AU5517/NE5517 offers significant design and performance advantages over similar devices for all types of programmable gain applications. Circuit performance is enhanced through the use of linearizing diodes at the inputs which enable a 10 dB signal-to-noise improvement referenced to 0.5% THD. The AU5517/NE5517 is suited for a wide variety of industrial and consumer applications. Constant impedance of the buffers on the chip allow general use of the AU5517/NE5517. These buffers are made of Darlington transistors and a biasing network that virtually eliminate the change of offset voltage due to a burst in the bias current IABC, hence eliminating the audible noise that could otherwise be heard in high quality audio applications. Features http://onsemi.com MARKING DIAGRAMS 1 SOIC−16 D SUFFIX CASE 751B 1 xx5517DG AWLYWW • • • • • • • • • • • • Constant Impedance Buffers DVBE of Buffer is Constant with Amplifier IBIAS Change Excellent Matching Between Amplifiers Linearizing Diodes High Output Signal-to-Noise Ratio Pb−Free Packages are Available* 1 PDIP−16 N SUFFIX CASE 648 1 NE5517yy AWLYYWWG Applications Multiplexers Timers Electronic Music Synthesizers Dolby® HX Systems Current-Controlled Amplifiers, Filters Current-Controlled Oscillators, Impedances xx yy A WL YY, Y WW G = AU or NE = AN or N = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PIN CONNECTIONS N, D Packages IABCa 1 Da 2 +INa 3 −INa 4 VOa 5 V− 6 INBUFFERa 7 16 15 14 13 12 11 10 9 IABCb Db +INb −INb VOb V+ INBUFFERb VOBUFFERb VOBUFFERa 8 (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 1 April, 2006 − Rev. 3 Publication Order Number: NE5517/D NE5517, NE5517A, AU5517 PIN DESCRIPTION Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol IABCa Da +INa −INa VOa V− INBUFFERa VOBUFFERa VOBUFFERb INBUFFERb V+ VOb −INb +INb Db IABCb Amplifier Bias Input A Diode Bias A Non-inverted Input A Inverted Input A Output A Negative Supply Buffer Input A Buffer Output A Buffer Output B Buffer Input B Positive Supply Output B Inverted Input B Non-inverted Input B Diode Bias B Amplifier Bias Input B Description V+ 11 D4 Q6 D6 Q14 Q10 Q12 7,10 Q13 8,9 Q7 Q11 2,15 D2 −INPUT 4,13 1,16 AMP BIAS INPUT Q4 Q5 D3 +INPUT 3,14 VOUTPUT 5,12 Q15 Q2 Q9 R1 Q1 D1 D5 Q8 Q16 D7 Q3 D8 V− 6 Figure 1. Circuit Schematic http://onsemi.com 2 NE5517, NE5517A, AU5517 B AMP BIAS INPUT 16 B DIODE BIAS 15 B INPUT (+) 14 B INPUT (−) 13 B OUTPUT 12 B BUFFER INPUT 10 B BUFFER OUTPUT 9 V+ (1) 11 − B + + A − 1 AMP BIAS INPUT A 2 DIODE BIAS A 3 INPUT (+) A 4 INPUT (−) A 5 OUTPUT A 6 V− 7 BUFFER INPUT A 8 BUFFER OUTPUT A NOTE: V+ of output buffers and amplifiers are internally connected. Figure 2. Connection Diagram MAXIMUM RATINGS Rating Supply Voltage (Note 1) Power Dissipation, Tamb = 25 °C (Still Air) (Note 2) NE5517N, NE5517AN NE5517D, AU5517D Thermal Resistance, Junction−to−Ambient D Package N Package Differential Input Voltage Diode Bias Current Amplifier Bias Current Output Short-Circuit Duration Buffer Output Current (Note 3) Operating Temperature Range NE5517N, NE5517AN AU5517T Operating Junction Temperature DC Input Voltage Storage Temperature Range Lead Soldering Temperature (10 sec max) Symbol VS PD 1500 1125 RqJA °C/W 140 94 ±5.0 2.0 2.0 Indefinite 20 0 °C to +70 °C −40 °C to +125 °C 150 +VS to −VS −65 °C to +150 °C 230 °C °C mA °C V mA mA Value 44 VDC or ±22 Unit V mW VIN ID IABC ISC IOUT Tamb TJ VDC Tstg Tsld °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. For selections to a supply voltage above ±22 V, contact factory. 2. The following derating factors should be applied above 25 °C N package at 10.6 mW/°C D package at 7.1 mW/°C. 3. Buffer output current should be limited so as to not exceed package dissipation. http://onsemi.com 3 NE5517, NE5517A, AU5517 ELECTRICAL CHARACTERISTICS (Note 4) AU5517/NE5517 Characteristic Input Offset Voltage Overtemperature Range IABC 5.0 mA DVOS/DT VOS Including Diodes Input Offset Change Input Offset Current DIOS/DT Input Bias Current Overtemperature Range DIB/DT Forward Transconductance Overtemperature Range gM Tracking Peak Output Current RL = 0, IABC = 5.0 mA RL = 0, IABC = 500 mA RL = 0, Overtemperature Range RL = ∞, 5.0 mA ≤ IABC ≤ 500 mA RL = ∞, 5.0 mA ≤ IABC ≤ 500 mA IABC = 500 mA, both channels D VOS/D V+ D VOS/D V− CMRR 80 ±12 Referred to Input (Note 5) 20 Hz < f < 20 kHz IABC = 0, Input = ±4.0 V IABC = 0 (Refer to Test Circuit) RIN BW Unity Gain Compensated 5 5 Refer to Buffer VBE Test Circuit (Note 6) SR INBUFFER VOBUFFER 10 0.5 5.0 10 IIN IOUT 350 300 VOUT +12 −12 ICC +14.2 −14.4 2.6 20 20 110 ±13.5 100 0.02 0.2 26 2.0 50 0.4 5.0 10 0.5 5.0 100 100 10 4.0 150 150 80 ±12 +12 −12 +14.2 −14.4 2.6 20 20 110 ±13.5 100 0.02 0.2 26 2.0 50 0.4 5.0 10 5.0 4.0 150 150 dB V dB nA nA kW MHz V/ms mA V mV mA mV/V Avg. TC of Input Current gM 6700 5400 Avg. TC of Input Offset Current IBIAS Avg. TC of Input Offset Voltage Diode Bias Current (ID) = 500 mA 5.0 mA ≤ IABC ≤ 500 mA VOS IOS Test Conditions Symbol VOS Min Typ 0.4 0.3 7.0 0.5 0.1 0.1 0.001 0.4 1.0 0.01 9600 0.3 5.0 500 650 3.0 350 300 13000 7700 4000 5.0 8.0 0.6 5 Max 5.0 5.0 Min NE5517A Typ 0.4 0.3 7.0 0.5 0.1 0.1 0.001 0.4 1.0 0.01 9600 0.3 5.0 500 V 7.0 650 12000 5.0 7.0 2.0 3.0 0.6 Max 2.0 5.0 2.0 Unit mV mV/°C mV mV mA mA/°C mA mA/°C mmho dB mA Peak Output Voltage Positive Negative Supply Current VOS Sensitivity Positive Negative Common-mode Rejection Ration Common-mode Range Crosstalk Differential Input Current Leakage Current Input Resistance Open-loop Bandwidth Slew Rate Buffer Input Current Peak Buffer Output Voltage DVBE of Buffer 4. These specifications apply for VS = ±15 V, Tamb = 25°C, amplifier bias current (IABC) = 500 mA, Pins 2 and 15 open unless otherwise specified. The inputs to the buffers are grounded and outputs are open. 5. These specifications apply for VS = ±15 V, IABC = 500 mA, ROUT = 5.0 kW connected from the buffer output to −VS and the input of the buffer is connected to the transconductance amplifier output. 6. VS = ±15, ROUT = 5.0 kW connected from Buffer output to −VS and 5.0 mA ≤ IABC ≤ 500 mA. http://onsemi.com 4 NE5517, NE5517A, AU5517 TYPICAL PERFORMANCE CHARACTERISTICS 10 3 INPUT OFFSET CURRENT (nA) VS = ±15V +125°C -55°C +25°C 5 4 INPUT OFFSET VOLTAGE (mV) 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 0.1mA +125°C 10 4 VS = ±15V VS = ±15V INPUT BIAS CURRENT (nA) 10 3 10 2 -55°C 10 +25°C +125°C 10 2 -55°C 1 10 +25°C +125°C 0.1 1 mA 10mA 100mA 1000mA 0.1mA 1 mA 10mA 100mA 1000mA AMPLIFIER BIAS CURRENT (IABC) 1 0.1mA 1 mA 10mA 100mA 1000mA AMPLIFIER BIAS CURRENT (IABC) AMPLIFIER BIAS CURRENT (IABC) Figure 3. Input Offset Voltage 10 4 PEAK OUTPUT CURRENT ( μ A) VS = ±15V PEAK OUTPUT VOLTAGE AND COMMON-MODE RANGE (V) +125°C Figure 4. Input Bias Current 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 VOUT VCMR 10 5 VOUT LEAKAGE CURRENT (pA) VCMR VS = ±15V RLOAD = ∞ Tamb = 25°C Figure 5. Input Bias Current (+)VIN = (−)VIN = VOUT = 36V 10 4 10 3 +25°C 10 2 -55°C 10 3 0V 10 2 10 1 0.1mA 1 mA 10mA 100mA 1000mA 0.1mA 1 mA 10mA 100mA 1000mA 10 -50°C -25°C 0°C 25°C 50°C 75°C100°C125°C AMPLIFIER BIAS CURRENT (IABC) AMPLIFIER BIAS CURRENT (IABC) AMBIENT TEMPERATURE (TA) Figure 6. Peak Output Current Figure 7. Peak Output Voltage and Common-Mode Range 10 2 INPUT RESISTANCE (MEG Ω ) Figure 8. Leakage Current TRANSCONDUCTANCE (gM) — ( μ ohm) 10 4 INPUT LEAKAGE CURRENT (pA) +125°C 10 5 gM 10 4 mq m M PINS 2, 15 OPEN VS = ±15V PINS 2, 15 OPEN 10 1 10 3 10 2 +25°C 10 3 -55°C +125°C 1 10 10 2 +25°C 0.1 1 0 1 2 3 4 5 6 INPUT DIFFERENTIAL VOLTAGE 7 10 0.1mA 1 mA 10mA 100mA 1000mA 0.01 0.1mA 1 mA 10mA 100mA 1000mA AMPLIFIER BIAS CURRENT (IABC) AMPLIFIER BIAS CURRENT (IABC) Figure 9. Input Leakage Figure 10. Transconductance Figure 11. Input Resistance http://onsemi.com 5 NE5517, NE5517A, AU5517 TYPICAL PERFORMANCE CHARACTERISTICS (continued) 2000 AMPLIFIER BIAS VOLTAGE (mV) 1800 1600 1400 1200 1000 800 600 400 1 200 0 0.1mA 1 mA 10mA 100mA 1000mA 0 0.01 0.1mA 1 mA 10mA 100mA 1000mA 1 10 100 1000 DIFFERENTIAL INPUT VOLTAGE (mVP-P) +125°C -55°C CAPACITANCE (pF) 7 VS = ±15V 6 5 4 COUT CIN 100 Tamb = +25°C OUTPUT DISTORTION (%) 10 RL = 10kW IABC = 1mA +25°C 1 3 2 0.1 AMPLIFIER BIAS CURRENT (IABC) AMPLIFIER BIAS CURRENT (IABC) Figure 12. Amplifier Bias Voltage vs. Amplifier Bias Current 20 OUTPUT VOLTAGE RELATIVE TO 1 VOLT RMS (dB) 0 -20 VS = ±15V RL = 10kW VIN = 80mVP-P Figure 13. Input and Output Capacitance 600 OUTPUT NOISE CURRENT (pA/Hz) 500 400 300 200 100 0 10 Figure 14. Distortion vs. Differential Input Voltage VIN = 40mVP-P -40 -60 -80 -100 OUTPUT NOISE 20kHz BW IABC = 1mA IABC = 100mA 0.1mA 1mA 10mA 100mA 1000mA IABC AMPLIFIER BIAS CURRENT (mA) 100 1k 10k FREQUENCY (Hz) 100k Figure 15. Voltage vs. Amplifier Bias Current Figure 16. Noise vs. Frequency +36V +15V A 4, 13 4V − 11 5, 12 NE5517 1, 15 8, 9 7, 10 A 4, 13 − 11 5, 12 NE5517 1, 10 2, 15 2, 15 3, 14 + 6 3, 14 + 6 −15V Figure 17. Leakage Current Test Circuit V+ Figure 18. Differential Input Current Test Circuit V 50kW V− Figure 19. Buffer VBE Test Circuit http://onsemi.com 6 NE5517, NE5517A, AU5517 APPLICATIONS +15V 0.01mF INPUT 10kW 3, 14 − 390pF 2, 15 NE5517 1.3kW 4, 13 + 6 0.01mF 11 1, 16 62kW 51W 7, 10 5, 12 8, 9 OUTPUT 5kW −15V 10kW −15V 0.001mF Figure 20. Unity Gain Follower CIRCUIT DESCRIPTION The circuit schematic diagram of one-half of the AU5517/NE5517, a dual operational transconductance amplifier with linearizing diodes and impedance buffers, is shown in Figure 21. Transconductance Amplifier If VIN is small, the ratio of I5 and I4 will approach unity and the Taylor series of In function can be approximated as KT In I 5 [ KT I 5 * I 4 q q I4 I4 and I 4 ^ I 5 ^ I B KT In I 5 [ KT I 5 * I 4 + 2KT I 5 * I 4 + V IN q q 1 2I B q I4 IB I 5 * I 4 + V IN IB q (eq. 3) The transistor pair, Q4 and Q5, forms a transconductance stage. The ratio of their collector currents (I4 and I5, respectively) is defined by the differential input voltage, VIN, which is shown in Equation 1. V IN I5 KT + q In I4 (eq. 1) (eq. 4) 2KT Where VIN is the difference of the two input voltages KT ≅ 26 mV at room temperature (300°k). Transistors Q1, Q2 and diode D1 form a current mirror which focuses the sum of current I4 and I5 to be equal to amplifier bias current IB: I4 ) I5 + IB V+ 11 D4 Q6 Q10 The remaining transistors (Q6 to Q11) and diodes (D4 to D6) form three current mirrors that produce an output current equal to I5 minus I4. Thus: V IN I B q 2KT + IO (eq. 5) The term IB q 2KT is then the transconductance of the amplifier (eq. 2) and is proportional to IB. D6 Q14 Q12 7,10 Q13 8,9 Q7 Q11 2,15 D2 −INPUT 4,13 1,16 AMP BIAS INPUT Q1 D1 V− 6 Q4 Q5 D3 +INPUT 3,14 V OUTPUT 5,12 Q15 Q2 Q9 R1 Q8 D5 D8 D7 Q16 Q3 Figure 21. Circuit Diagram of NE5517 http://onsemi.com 7 NE5517, NE5517A, AU5517 Linearizing Diodes Impedance Buffer For VIN greater than a few millivolts, Equation 3 becomes invalid and the transconductance increases non-linearly. Figure 22 shows how the internal diodes can linearize the transfer function of the operational amplifier. Assume D2 and D3 are biased with current sources and the input signal current is IS. Since I4 + I5 = IB and I5 − I4 = I0, that is: I4 = (IB − I0), I5 = (IB + I0) +VS The upper limit of transconductance is defined by the maximum value of IB (2.0 mA). The lowest value of IB for which the amplifier will function therefore determines the overall dynamic range. At low values of IB, a buffer with very low input bias current is desired. A Darlington amplifier with constant-current source (Q14, Q15, Q16, D7, D8, and R1) suits the need. APPLICATIONS Voltage-Controlled Amplifier ID I ID 2 ID S 2 I0 + 2 I )I S I0 + I5 * I4 I4 D3 1/2ID Q4 IS IS 1/2ID IB −VS I5 D2 I5 S I B D *I In Figure 23, the voltage divider R2, R3 divides the input-voltage into small values (mV range) so the amplifier operates in a linear manner. It is: I OUT + *V IN @ R3 @ g M; R2 ) R3 V OUT + I OUT @ R L; A+ V OUT R3 + @ gM @ RL V IN R2 ) R3 (3) gM = 19.2 IABC (gM in mmhos for IABC in mA) Figure 22. Linearizing Diode For the diodes and the input transistors that have identical geometries and are subject to similar voltages and temperatures, the following equation is true: T In q ID 2 I D 2 Since gM is directly proportional to IABC, the amplification is controlled by the voltage VC in a simple way. When VC is taken relative to −VCC the following formula is valid: I ABC + (V C * 1.2V) R1 ) IS 1 2(I B ) I O) + KT In q 1 2(I B * I O) * IS (eq. 6) I I I O + I S 2 B for |I S| t D 2 ID The 1.2 V is the voltage across two base-emitter baths in the current mirrors. This circuit is the base for many applications of the AU5517/NE5517. The only limitation is that the signal current should not exceed ID. VC +VCC R1 R4 = R2/ /R3 3 + 11 NE5517 R2 VIN 4 R3 − 6 IOUT RL RS INT −VCC TYPICAL VALUES: R1 = 47kW R2 = 10kW R3 = 200W R4 = 200W RL = 100kW RS = 47kW 8 VOUT 1 5 7 IABC INT +VCC Figure 23. http://onsemi.com 8 NE5517, NE5517A, AU5517 Stereo Amplifier With Gain Control Modulators Figure 24 shows a stereo amplifier with variable gain via a control input. Excellent tracking of typical 0.3 dB is easy to achieve. With the potentiometer, RP, the offset can be adjusted. For AC-coupled amplifiers, the potentiometer may be replaced with two 510 W resistors. Because the transconductance of an OTA (Operational Transconductance Amplifier) is directly proportional to IABC, the amplification of a signal can be controlled easily. The output current is the product from transconductance×input voltage. The circuit is effective up to approximately 200 kHz. Modulation of 99% is easy to achieve. +VCC 10kW VIN1 RIN 1k RP +VCC 15kW 3 + 11 NE5517/A RD − 4 IABC 1 RL 10kW 5.1kW 8 INT +VCC VOUT1 30kW VC VIN2 RC 10kW RIN 1k RP +VCC 15kW RD − 13 14 15 NE5517/A 12 6 + IABC 16 −VCC 10 9 RL 10kW RS −VCC INT VOUT2 +VCC Figure 24. Gain-Controlled Stereo Amplifier VIN2 SIGNAL RC 30kW 1 IABC +VCC 11 3 2 NE5517/A − 10kW 4 RL 10kW 6 −VCC RS −VCC INT + 5 7 ID 15kW VOS VIN1 CARRIER 1kW INT +VCC 8 VOUT Figure 25. Amplitude Modulator http://onsemi.com 9 NE5517, NE5517A, AU5517 Voltage-Controlled Resistor (VCR) Voltage-Controlled Oscillators Because an OTA is capable of producing an output current proportional to the input voltage, a voltage variable resistor can be made. Figure 26 shows how this is done. A voltage presented at the RX terminals forces a voltage at the input. This voltage is multiplied by gM and thereby forces a current through the RX terminals: Rx + R ) RA gM ) RA Figure 32 shows a voltage-controlled triangle-square wave generator. With the indicated values a range from 2.0 Hz to 200 kHz is possible by varying IABC from 1.0 mA to 10 mA. The output amplitude is determined by IOUT × ROUT. Please notice the differential input voltage is not allowed to be above 5.0 V. With a slight modification of this circuit you can get the sawtooth pulse generator, as shown in Figure 33. APPLICATION HINTS where gM is approximately 19.21 mMHOs at room temperature. Figure 27 shows a Voltage Controlled Resistor using linearizing diodes. This improves the noise performance of the resistor. Voltage-Controlled Filters Figure 28 shows a Voltage Controlled Low-Pass Filter. The circuit is a unity gain buffer until XC/gM is equal to R/RA. Then, the frequency response rolls off at a 6dB per octave with the −3 dB point being defined by the given equations. Operating in the same manner, a Voltage Controlled High-Pass Filter is shown in Figure 29. Higher order filters can be made using additional amplifiers as shown in Figures 30 and 31. To hold the transconductance gM within the linear range, IABC should be chosen not greater than 1.0 mA. The current mirror ratio should be as accurate as possible over the entire current range. A current mirror with only two transistors is not recommended. A suitable current mirror can be built with a PNP transistor array which causes excellent matching and thermal coupling among the transistors. The output current range of the DAC normally reaches from 0 to −2.0 mA. In this application, however, the current range is set through RREF (10 kW) to 0 to −1.0 mA. I DACMAX + 2 @ V REF + 2 @ 5V + 1mA R REF 10kW + R ) RA gM @ RA +VCC 3 2 NE5517/A 5 − 4 200W 200W −VCC RX + 11 IO 30kW R VC INT +VCC X 7 C 8 R 100kW 10kW −VCC INT VOUT Figure 26. VCR +VCC +VCC 3 VOS RP 1kW 4 −VCC 2 NE5517/A 11 1 30kW VC ID INT +VCC 5 6 RX C 7 8 R 100kW 10kW −VCC INT Figure 27. VCR with Linearizing Diodes http://onsemi.com 10 NE5517, NE5517A, AU5517 1 +VCC VIN 100kW 2 NE5517/A 5 − 4 200W RA 200W −VCC 6 150pF 7 C 3 + 11 30kW VC INT +VCC IABC 8 VOUT R 100kW 10kW −VCC INT NOTE: f O + R A gM g(R ) RA) 2pC Figure 28. Voltage-Controlled Low-Pass Filter 1 +VCC 100kW 2 NE5517/A -VCC 4 1kW RA 1kW −VCC 5 − 6 0.005mF 7 C +VCC 3 + 11 30kW VC INT +VCC IABC VOS NULL 8 VOUT R 100kW 10kW −VCC INT NOTE: f O + R A gM g(R ) RA) 2pC Figure 29. Voltage-Controlled High-Pass Filter 15kW +VCC +VCC VIN + NE5517/A − C 100pF 200W RA 200 -VCC NOTE: f O + RA gM (R ) R A) 2p C −VCC R 100kW 200W 10kW RA 100 kW 100kW + NE5517/A − RA 200W C2 200pF VC INT +VCC VOUT 10kW −VCC INT Figure 30. Butterworth Filter − 2nd Order http://onsemi.com 11 NE5517, NE5517A, AU5517 1 +VCC 10kW +VCC 3 2 NE5517/A − 6 800pF 20kW 5.1kW −VCC BANDPASS OUT −VCC INT + 14 11 5 7 20kW 15 NE5517/A − 13 1kW 20kW 5.1kW 800pF + 12 10 LOW PASS VOUT 9 INT +VCC 16 15kW VC 1kW −VCC Figure 31. State Variable Filter 30kW VC +VCC 4 − 11 1 NE5517/A 3 + 6 C 0.1mF 20kW 8 5 7 NE5517/A + 14 16 INT +VCC 13 − +VCC INT +VCC 10 47kW 12 9 10kW VOUT2 −VCC −VCC VOUT1 −VCC INT GAIN CONTROL Figure 32. Triangle−Square Wave Generator (VCO) IC 470kW VC +VCC 4 + 11 1 IB +VCC INT +VCC 13 − 5 7 NE5517/A C 0.1mF 20kW 8 + 14 R2 30kW −VCC 12 10 16 47kW INT +VCC 30kW 2 3 NE5517/A − 6 R1 30kW −VCC NOTE: (V V PK + C R1 ) R2 * 0.8) R 1 T H + 2V PK x C IB T L + 2V PKxC I C I f −VCC VOUT1 I ttI B OSC 2V xC C PK C VOUT2 INT Figure 33. Sawtooth Pulse VCO http://onsemi.com 12 NE5517, NE5517A, AU5517 ORDERING INFORMATION Device AU5517DR2 AU5517DR2G −40 to +125 °C Temperature Range Package SOIC−16 SOIC−16 (Pb−Free) SOIC−16 SOIC−16 (Pb−Free) SOIC−16 SOIC−16 (Pb−Free) 0 to +70 °C PDIP−16 PDIP−16 (Pb−Free) PDIP−16 PDIP−16 (Pb−Free) 25 Units/Rail 2500 Tape & Reel 48 Units/Rail 2500 Tape & Reel Shipping† NE5517D NE5517DG NE5517DR2 NE5517DR2G NE5517N NE5517NG NE5517AN NE5517ANG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 13 NE5517, NE5517A, AU5517 PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE J −A− 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 −B− 1 8 P 8 PL 0.25 (0.010) M B S G F K C −T− SEATING PLANE R X 45 _ M D 16 PL M J 0.25 (0.010) TB S A S PDIP−16 CASE 648−08 ISSUE T −A− 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B 1 8 F S C L −T− H G D 16 PL SEATING PLANE K J TA M M 0.25 (0.010) M DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 Dolby is a registered trademark of Dolby Laboratories Inc., San Francisco, Calif. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 14 NE5517/D