NL27WZ00

NL27WZ00 Dual 2−Input NAND Gate The NL27WZ00 is a high performance dual 2−input NAND Gate operating from a 1.65 V to 5.5 V supply. Features • • • • • • • • • • Extremely High Speed: tPD 2.4 ns (typical) at VCC = 5.0 V Designed for 1.65 V to 5.5 V VCC Operation Over Voltage Tolerant Inputs LVTTL Compatible − Interface Capability With 5.0 V TTL Logic with VCC = 3.0 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements Replacement for NC7WZ00 Chip Complexity: FET = 112 Pb−Free Package is Available http://onsemi.com MARKING DIAGRAM 8 1 US8 US SUFFIX CASE 493 8 L1 M G G 1 L1 = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. PIN ASSIGNMENT A1 1 8 VCC Pin 1 B1 2 7 Y1 2 3 4 Y2 3 6 B2 5 6 GND 4 5 A2 7 8 A2 B2 Y1 VCC Function A1 B1 Y2 GND Figure 1. Pinout FUNCTION TABLE Y = AB Inputs A B L H L H Y1 Y2 Output Y H H H L IEEE/IEC A1 B1 A2 B2 & L L H Figure 2. Logic Symbol H H = HIGH Logic Level L = LOW Logic Level ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2006 1 May, 2006 − Rev. 6 Publication Order Number: NL27WZ00/D NL27WZ00 MAXIMUM RATINGS Parameter DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance (Note 1) Power Dissipation in Still Air at 85°C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 28 to 34 Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 85°C (Note 5) VI < GND VO < GND Symbol VCC VI VO IIK IOK IO ICC IGND TSTG TL TJ qJA PD MSL FR VESD Value *0.5 to )7.0 *0.5 to )7.0 *0.5 to )7.0 *50 *50 $50 $100 $100 *65 to )150 260 )150 250 250 Level 1 UL 94 V−0 @ 0.125 in > 2000 > 200 N/A $500 V Unit V V V mA mA mA mA mA °C °C °C °C/W mW Latchup Performance ILatchup mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage Input Voltage (Note 6) Output Voltage Operating Free−Air Temperature Input Transition Rise or Fall Rate VCC = 2.5 V $0.2 V VCC = 3.0 V $0.3 V VCC = 5.0 V $0.5 V (HIGH or LOW State) Operating Data Retention Only Symbol VCC VI VO TA Dt/DV Min 1.65 1.5 0 0 *40 0 0 0 Max 5.5 5.5 5.5 VCC )85 20 10 5 Unit V V V °C ns/V 6. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level. http://onsemi.com 2 NL27WZ00 DC ELECTRICAL CHARACTERISTICS VCC (V) 1.65 2.3 to 5.5 1.65 2.3 to 5.5 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 0 to 5.5 5.5 VCC − 0.1 1.29 1.9 2.2 2.4 2.3 3.8 VCC 1.5 2.1 2.4 2.7 2.5 4.0 0.0 0.08 0.20 0.22 0.28 0.38 0.42 0.1 0.24 0.3 0.4 0.4 0.55 0.55 $0.1 1.0 TA = 255C Min 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC VCC − 0.1 1.29 1.9 2.2 2.4 2.3 3.8 0.1 0.24 0.3 0.4 0.4 0.55 0.55 $1.0 10 Typ Max *405C v TA v 855C Min 0.75 VCC 0.7 VCC 0.25 0.3 VCC Max Unit V V V Parameter High−Level Input Voltage Low−Level Input Voltage High−Level Output Voltage VIN = VIL or VIH Condition Symbol VIH VIL IOH = −100 mA IOH = −4 mA IOH = −8 mA IOH = −12 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA IOL = 100 mA IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA VIN = VCC or GND VIN = VCC or GND VOH Low−Level Output Voltage VIN = VIH or VOH VOL V Input Leakage Current Quiescent Supply Current IIN ICC mA mA AC ELECTRICAL CHARACTERISTICS tR = tF = 3.0 ns VCC Parameter Propagation Delay (Figure 3 and 4) Condition RL = 1 MW, CL = 15 pF Symbol tPLH tPHL (V) 1.8 $ 0.15 2.5 $ 0.2 3.3 $ 0.3 Min 2.0 1.2 0.8 1.2 5.0 $ 0.5 0.5 0.8 TA = 255C Typ 5.7 3.2 2.4 3.0 1.9 2.4 Max 10.5 5.3 3.7 4.6 2.9 3.6 *405C v TA v 855C Min 2.0 1.2 0.8 1.2 0.5 0.8 Max 11.0 5.7 4.0 4.9 3.2 3.9 Unit ns RL = 1 MW, CL = 15 pF RL = 500 W, CL = 50 pF RL = 1 MW, CL = 15 pF RL = 500 W, CL = 50 pF CAPACITIVE CHARACTERISTICS Parameter Input Capacitance Power Dissipation Capacitance (Note 7) Condition VCC = 5.5 V, VI = 0 V or VCC 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 10 MHz, VCC = 5.5 V, VI = 0 V or VCC Symbol CIN CPD Typical 2.5 9 11 Unit pF pF 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC. http://onsemi.com 3 NL27WZ00 tf = 3 ns 90% 90% 50% 10% tf = 3 ns VCC VCC OUTPUT INPUT GND CL * INPUT A and B 50% 10% tPHL tPLH VOH *CL includes all probe and jig capacitances. A 1−MHz square input wave is recommended for propagation delay tests. OUTPUT Y 50% 50% VOL Figure 3. Switching Waveform Figure 4. Test Circuit CAVITY TAPE TOP TAPE TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS 160 mm MIN COMPONENTS DIRECTION OF FEED TAPE LEADER NO COMPONENTS 400 mm MIN Figure 5. Tape Ends for Finished Goods TAPE DIMENSIONS mm 2.00 4.00 4.00 1.50 TYP 1.75 8.00 + 0.30 − 0.10 3.50 $ 0.25 1 1.00 ± 0.25 TYP DIRECTION OF FEED Figure 6. US8 Reel Configuration/Orientation http://onsemi.com 4 NL27WZ00 t MAX 1.5 mm MIN (0.06 in) 20.2 mm MIN (0.795 in) 13.0 mm $0.2 mm (0.512 in $0.008 in) A 50 mm MIN (1.969 in) FULL RADIUS G Figure 7. Reel Dimensions REEL DIMENSIONS Tape Size 8 mm T and R Suffix US A Max 178 mm (7 in) G 8.4 mm, + 1.5 mm, −0.0 (0.33 in + 0.059 in, −0.00) t Max 14.4 mm (0.56 in) DIRECTION OF FEED BARCODE LABEL POCKET HOLE Figure 8. Reel Winding Direction ORDERING INFORMATION Device Nomenclature Device NL27WZ00US NL27WZ00USG NL 2 7 WZ 00 US US8 Logic Circuit Indicator No. of Gates per Package Temp Range Identifier Technology Device Function Package Suffix Package Shipping† 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NL27WZ00 PACKAGE DIMENSIONS US8 CASE 493−02 ISSUE B −X− A 8 5 −Y− J DETAIL E B L NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION “A” DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055”) PER SIDE. 4. DIMENSION “B” DOES NOT INCLUDE INTER−LEAD FLASH OR PROTRUSION. INTER−LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055”) PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076−0.0203 MM. (300−800 “). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED ±0.0508 (0.0002 “). MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0_ 6_ 5_ 10 _ 0.23 0.34 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0_ 6_ 5_ 10 _ 0.010 0.013 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC 1 4 R S U C DIM A B C D F G H J K L M N P R S U V P G −T− SEATING PLANE D 0.10 (0.004) K M 0.10 (0.004) T N TXY V H R 0.10 TYP M F DETAIL E SOLDERING FOOTPRINT* 3.8 0.15 0.50 0.0197 1.8 0.07 0.30 0.012 1.0 0.0394 SCALE 8:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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