NLAST4599

NLAST4599 Low Voltage Single Supply SPDT Analog Switch The NLAST4599 is an advanced high speed CMOS single pole − double throw analog switch fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and low ON resistances while maintaining low power dissipation. This switch controls analog and digital voltages that may vary across the full power−supply range (from VCC to GND). The device has been designed so the ON resistance (RON) is much lower and more linear over input voltage than RON of typical CMOS analog switches. The channel select input structure provides protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. This input structure helps prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc. Features http://onsemi.com MARKING DIAGRAMS TSOP−6 DT SUFFIX CASE 318G 1 A1AYWG G • • • • • • • • • • • Select Pin Compatible with TTL Levels Channel Select Input Over−Voltage Tolerant to 5.5 V Fast Switching and Propagation Speeds Break−Before−Make Circuitry Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C Diode Protection Provided on Channel Select Input Improved Linearity and Lower ON Resistance over Input Voltage Latch−up Performance Exceeds 300 mA ESD Performance: HBM > 2000 V; MM > 200 V Chip Complexity: 38 FETs Pb−Free Packages are Available SC−88/SC−70/SOT−363 DF SUFFIX CASE 419B 1 A1 M G G A1 A Y W M G = Specific Device Code = Assembly Location = Year = Work Week = Date Code* = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position and underbar may vary depending upon manufacturing location. SELECT 1 V+ 2 GND 3 6 5 4 FUNCTION TABLE NO Select COM NC L H ON Channel NC NO Figure 1. Pin Assignment ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. 2X1 COM U Figure 2. Logic Symbol © Semiconductor Components Industries, LLC, 2006 May, 2006 − Rev. 8 U U CHANNEL SELECT 2X0 NO NC 1 Publication Order Number: NLAST4599/D NLAST4599 MAXIMUM RATINGS (Note 1) Parameter Positive DC Supply Voltage Analog Input Voltage (VNO or VCOM) Digital Select Input Voltage DC Current, Into or Out of Any Pin Power Dissipation in Still Air Storage Temperature Range Lead Temperature, 1mm from Case for 10 seconds Junction Temperature Under Bias ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 125°C (Note 5) SC−88 TSOP6 SC−88 TSOP6 Symbol VCC VIS VIN IIK PD TSTG TL TJ VESD Value −0.5 to +7.0 −0.5 ≤ VIS ≤ VCC )0.5 −0.5 ≤ VI ≤ + 7.0 $50 200 200 −65 to +150 260 150 2000 200 N/A $300 333 333 Unit V V V mA mW °C °C °C V Latchup Performance Thermal Resistance ILATCHUP qJA mA °C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. 2. Tested to EIA/JESD22−A114−A 3. Tested to EIA/JESD22−A115−A 4. Tested to JESD22−C101−A 5. Tested to EIA/JESD78 RECOMMENDED OPERATING CONDITIONS Characteristics DC Supply Voltage Digital Select Input Voltage Analog Input Voltage (NC, NO, COM) Operating Temperature Range Input Rise or Fall Time SELECT VCC = 3.3 V + 0.3 V VCC = 5.0 V + 0.5 V Symbol VCC VIN VIS TA tr, tf 0 0 100 20 Min 2.0 GND GND −55 Max 5.5 5.5 VCC +125 Unit V V V °C ns/V NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature 5C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130°C TJ = 120°C TJ = 100°C TJ = 110°C TJ = 90°C TJ = 80°C 100 TIME, YEARS 1 1 10 1000 Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NLAST4599 DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND) Guaranteed Limit Parameter Minimum High−Level Input Voltage, Select Input Maximum Low−Level Input Voltage, Select Input Maximum Input Leakage Current, Select Input Power Off Leakage Current Maximum Quiescent Supply Current VIN = 5.5 V or GND VIN = 5.5 V or GND Select and VIS = VCC or GND Condition Symbol VIH VCC 3.0 4.5 5.5 3.0 4.5 5.5 5.5 0 5.5 −55 to 255C 2.0 2.0 2.0 0.5 0.8 0.8 +0.1 +10 1.0