NTD4815NHT4G

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Other names and brands may be claimed as the property of others. NTD4815NH Power MOSFET 30 V, 35 A, Single N--Channel, DPAK/IPAK Features Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Low RG These are Pb--Free Devices http://onsemi.com V(BR)DSS RDS(ON) MAX 15 mΩ @ 10 V 30 V Applications D MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) G Symbol Value Unit Drain--to--Source Voltage VDSS 30 V Gate--to--Source Voltage VGS ±20 V ID 8.5 A S N--CHANNEL MOSFET Continuous Drain Current RθJA (Note 1) TA = 25°C Power Dissipation RθJA (Note 1) TA = 25°C PD 1.92 W Continuous Drain Current RθJA (Note 2) TA = 25°C ID 6.9 A 3 DPAK CASE 369AA (Bent Lead) STYLE 2 TA = 85°C 4 1 2 TA = 85°C 5.3 TA = 25°C PD 1.26 W Continuous Drain Current RθJC (Note 1) TC = 25°C ID 35 A Power Dissipation RθJC (Note 1) TC = 25°C PD 32.6 W TA = 25°C IDM 87 A TA = 25°C IDmaxPkg 35 A TJ, TSTG --55 to +175 °C IS 27 A Drain to Source dV/dt dV/dt 6 V/ns Single Pulse Drain--to--Source Avalanche Energy (VDD = 24 V, VGS = 10 V, IL = 15.4 Apk, L = 0.3 mH, RG = 25 Ω) EAS 35.6 mJ Lead Temperature for Soldering Purposes (1/8” from case for 10 s) TL 260 °C tp=10ms Current Limited by Package Operating Junction and Storage Temperature Source Current (Body Diode) 27 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. © Semiconductor Components Industries, LLC, 2010 June, 2010 -- Rev. 3 1 1 2 3 1 2 3 3 IPAK IPAK CASE 369AC CASE 369D (Straight Lead) (Straight Lead DPAK) MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain YWW 48 15NHG Pulsed Drain Current TC = 85°C 4 4 6.5 4 Drain 4 Drain YWW 48 15NHG Parameter Power Dissipation RθJA (Note 2) 35 A 27.7 mΩ @ 4.5 V • CPU Power Delivery • DC--DC Converters • High Side Switching Steady State ID MAX YWW 48 15NHG • • • • • 2 1 2 3 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source Y = Year WW = Work Week 4815NH= Device Code G = Pb--Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Publication Order Number: NTD4815NH/D NTD4815NH THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction--to--Case (Drain) Parameter RθJC 4.6 °C/W Junction--to--TAB (Drain) RθJC--TAB 3.5 Junction--to--Ambient – Steady State (Note 1) RθJA 78 Junction--to--Ambient – Steady State (Note 2) RθJA 119 1. Surface--mounted on FR4 board using 1 sq--in pad, 1 oz Cu. 2. Surface--mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Symbol Test Condition Min Drain--to--Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain--to--Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate--to--Source Leakage Current IDSS V 25 VGS = 0 V, VDS = 24 V mV/°C TJ = 25 °C 1 TJ = 125°C 10 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA mA ±100 nA 2.5 V ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain--to--Source On Resistance RDS(on) Forward Transconductance 1.5 5.6 VGS = 10 V to 11.5 V ID = 30 A 12 ID = 15 A 11.5 VGS = 4.5 V ID = 20 A 21.5 ID = 15 A 20.1 gFS VDS = 15 V, ID = 10 A mV/°C 15 27.7 6.0 mΩ S CHARGES AND CAPACITANCES Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 103 Total Gate Charge QG(TOT) 6.4 Threshold Gate Charge QG(TH) Gate--to--Source Charge QGS Gate--to--Drain Charge QGD Total Gate Charge QG(TOT) 845 VGS = 0 V, f = 1.0 MHz, VDS = 12 V VGS = 4.5 V, VDS = 15 V; ID = 30 A 183 1.5 2.9 pF 6.8 nC 2.7 VGS = 11.5 V, VDS = 15 V; ID = 30 A 15.2 nC SWITCHING CHARACTERISTICS (Note 4) Turn--On Delay Time Rise Time Turn--Off Delay Time Fall Time td(ON) tr td(OFF) 11.3 VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 Ω tf 17.6 11 2.8 3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 ns NTD4815NH ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit SWITCHING CHARACTERISTICS (Note 4) Turn--On Delay Time Rise Time Turn--Off Delay Time Fall Time td(ON) tr td(OFF) 6.7 VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 Ω tf 14.7 17.6 17.8 18.4 1.8 2.3 ns DRAIN--SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.98 TJ = 125°C 0.92 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 30 A 1.2 V 18.1 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A 11.3 ns 6.8 QRR 8.2 nC Source Inductance LS 2.49 nH Drain Inductance, DPAK LD 0.0164 Drain Inductance, IPAK LD Gate Inductance LG 3.46 Gate Resistance RG 0.6 PACKAGE PARASITIC VALUES TA = 25°C 3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 1.88 Ω NTD4815NH TYPICAL PERFORMANCE CURVES 60 VDS ≥ 10 V TJ = 25°C 50 5V 40 4.5 V 30 4.2 V 4V 20 3.8 V 10 0 2 8 6 4 3.5 V 3.2 V 10 TJ = 125°C TJ = 25°C 10 TJ = --55°C 0 1 2 4 3 0.01 3 4 7 6 5 8 9 10 11 12 0.05 6 5 Figure 2. Transfer Characteristics 0.02 TJ = 25°C 0.04 VGS = 4.5 V 0.03 0.02 0.01 VGS = 11.5 V 0 10 20 30 50 40 60 70 80 VGS, GATE--TO--SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 3. On--Resistance vs. Gate--to--Source Voltage Figure 4. On--Resistance vs. Drain Current and Gate Voltage 10,000 1.8 VGS = 0 V ID = 30 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN--TO--SOURCE RESISTANCE (NORMALIZED) 20 Figure 1. On--Region Characteristics 0.03 1.6 30 VGS, GATE--TO--SOURCE VOLTAGE (VOLTS) ID = 30 A TJ = 25°C 2 40 VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) 0.04 0 50 0 RDS(on), DRAIN--TO--SOURCE RESISTANCE (Ω) ID, DRAIN CURRENT (AMPS) 70 0 RDS(on), DRAIN--TO--SOURCE RESISTANCE (Ω) 60 10 V 8V 6V ID, DRAIN CURRENT (AMPS) 80 1.4 1.2 1.0 TJ = 150°C 1000 TJ = 100°C 0.8 0.6 --50 --25 0 25 50 75 100 125 150 175 100 0 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) Figure 5. On--Resistance Variation with Temperature Figure 6. Drain--to--Source Leakage Current vs. Drain Voltage http://onsemi.com 4 30 NTD4815NH TYPICAL PERFORMANCE CURVES 12 Ciss 800 600 400 Coss 200 0 Crss 0 VGS , GATE--TO--SOURCE VOLTAGE (VOLTS) C, CAPACITANCE (pF) 1000 10 5 15 20 25 30 DRAIN--TO--SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 100 tr 10 td(on) tf 10 RG, GATE RESISTANCE (OHMS) 2 0.1 I D, DRAIN CURRENT (AMPS) 6 8 10 12 14 16 QG, TOTAL GATE CHARGE (nC) 0 20 18 VGS = 0 V 30 TJ = 25°C 25 20 15 10 5 0 0.3 100 ms 1 ms 10 ms dc 1 10 VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS) 100 EAS, SINGLE PULSE DRAIN--TO--SOURCE AVALANCHE ENERGY (mJ) 0.1 4 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.2 1.1 Figure 10. Diode Forward Voltage vs. Current 10 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 5 VSD, SOURCE--TO--DRAIN VOLTAGE (VOLTS) 100 1 10 ID = 30 A TJ = 25°C 0 0 100 1000 VGS = 20 V SINGLE PULSE TC = 25°C 15 Q2 Q1 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 10 VGS 3 IS, SOURCE CURRENT (AMPS) t, TIME (ns) 6 VDS 35 VDD = 15 V ID = 30 A VGS = 11.5 V 1 9 20 QT Figure 8. Gate--To--Source and Drain--To--Source Voltage vs. Total Charge td(off) 1 25 15 TJ = 25°C VGS = 0 V VDS , DRAIN--TO--SOURCE VOLTAGE (VOLTS) 1200 40 35 ID = 15.4 A 30 25 20 15 10 5 0 25 Figure 11. Maximum Rated Forward Biased Safe Operating Area 100 125 50 75 150 TJ, JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 175 NTD4815NH TYPICAL PERFORMANCE CURVES I D, DRAIN CURRENT (AMPS) 100 10 25°C 100°C 125°C 1 0.1 10 100 PULSE WIDTH (ms) 1 1000 r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) Figure 13. Avalanche Characteristics 1.0 D = 0.5 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 SINGLE PULSE 0.01 1.0E--05 1.0E--04 t1 t2 DUTY CYCLE, D = t1/t2 1.0E--03 1.0E--02 t, TIME (ms) RθJC(t) = r(t) RθJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) -- TC = P(pk) RθJC(t) 1.0E--01 1.0E+00 1.0E+01 Figure 14. Thermal Response ORDERING INFORMATION Package Shipping† NTD4815NHT4G DPAK (Pb--Free) 2500 / Tape & Reel NTD4815NH--1G IPAK (Pb--Free) 75 Units / Rail NTD4815NH--35G IPAK Trimmed Lead (3.5  0.15 mm) (Pb--Free) 75 Units / Rail Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 NTD4815NH PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA--01 ISSUE B A E b3 c2 B Z D 1 L4 A 4 L3 b2 e 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C H DETAIL A 3 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z c b 0.005 (0.13) M C H L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 90° CW STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 ------ 0.040 0.155 ------ 6.17 0.243 SCALE 3:1 mm  inches *For additional information on our Pb--Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 -----1.01 3.93 ------ NTD4815NH PACKAGE DIMENSIONS 3 IPAK, STRAIGHT LEAD CASE 369AC--01 ISSUE O B V NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. C E R DIM A B C D E F G H J K R V W A SEATING PLANE K W F J G D H 3 PL 0.13 (0.005) W INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25 IPAK (STRAIGHT LEAD DPAK) CASE 369D--01 ISSUE B C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 --T-SEATING PLANE K J F D G H 3 PL 0.13 (0.005) M DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 ------ MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 ------ STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN T ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303--675--2175 or 800--344--3860 Toll Free USA/Canada Fax: 303--675--2176 or 800--344--3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800--282--9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81--3--5773--3850 http://onsemi.com 8 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NTD4815NH/D