NTLUS4195PZTBG

NTLUS4195PZ Power MOSFET Features −30 V, −4.0 A, mCoolt Single P−Channel, ESD, 1.6x1.6x0.55 mm UDFN Package • UDFN Package with Exposed Drain Pads for Excellent Thermal • • • • • Conduction Low Profile UDFN 1.6 x 1.6 x 0.55 mm for Board Space Saving Lowest RDS(on) in 1.6x1.6 Package ESD Protected This is a Halide Free Device This is a Pb−Free Device http://onsemi.com MOSFET V(BR)DSS −30 V RDS(on) MAX 90 mW @ −10 V 155 mW @ −4.5 V ID MAX −3.0 A −2.0 A Applications • High Side Load Switch • PA Switch and Battery Switch • Optimized for Power Management Applications for Portable Products, such as Cell Phones, PMP, DSC, GPS, and others Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current (Note 1) Steady State t≤5s Power Dissipation (Note 1) Steady State t≤5s Continuous Drain Current (Note 2) Steady State TA = 25°C TA = 85°C TA = 25°C TA = 25°C TA = 25°C TA = 25°C TA = 85°C TA = 25°C tp = 10 ms PD IDM TJ, TSTG IS TL ESD ID PD Symbol VDSS VGS ID Value −30 ±20 −3.0 −2.3 −4.0 1.5 2.3 −2.0 −1.5 0.6 −17 -55 to 150 −1.0 260 W A °C A °C A W 1 6 UDFN6 CASE 517AU mCOOLt G Units V V A D S MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) P−Channel MOSFET MARKING DIAGRAM 1 AC MG G AC = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) Power Dissipation (Note 2) Pulsed Drain Current Operating Junction and Storage Temperature Source Current (Body Diode) (Note 2) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) Gate-to-Source ESD Rating (HBM) per JESD22−A114F Class 1B Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm2, 2 oz. Cu. (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2009 June, 2009 − Rev. 0 1 Publication Order Number: NTLUS4195PZ/D NTLUS4195PZ THERMAL RESISTANCE RATINGS Parameter Junction-to-Ambient – Steady State (Note 3) Junction-to-Ambient – t ≤ 5 s (Note 3) Junction-to-Ambient – Steady State min Pad (Note 4) Symbol RθJA RθJA RθJA Max 85 55 200 Units °C/W ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temp. Coefficient Drain-to-Source On Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge VGS(TH) VGS(TH)/TJ RDS(on) gFS CISS COSS CRSS QG(TOT) QG(TH) QGS QGD td(ON) tr td(OFF) tf VSD tRR ta tb QRR VGS = 0 V, dISD/dt = 100 A/ms, IS = −1.0 A TJ = 25°C TJ = 85°C VGS = −4.5 V, VDD = −15 V, ID = −3.0 A, RG = 1 W VGS = −4.5 V, VDS = −15 V; ID = −3.0 A VGS = −10 V, ID = −3.0 A VGS = −4.5 V, ID = −2.0 A VDS = −5.0 V, ID = −0.2 A CHARGES, CAPACITANCES & GATE RESISTANCE 250 VGS = 0 V, f = 1 MHz, VDS = −15 V 60 40 3.2 0.2 1.0 1.5 ns 5.0 nC pF VGS = VDS, ID = −250 mA −1.0 3.8 75 120 1.3 90 155 S −3.0 V mV/°C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, ID = −250 mA ID = −250 mA, ref to 25°C VGS = 0 V, VDS = −30 V TJ = 25°C TJ = 85°C −30 28 −1.0 −10 10 mA V mV/°C mA Symbol Test Condition Min Typ Max Units VDS = 0 V, VGS = ±20 V SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge 3. 4. 5. 6. VGS = 0 V, IS = −1.0 A 0.8 0.7 11 7.5 3.5 5.0 nC ns 1.2 V 30 95 50 70 Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm2, 1 oz. Cu. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTLUS4195PZ TYPICAL CHARACTERISTICS 20 18 −ID, DRAIN CURRENT (A) 16 14 12 10 8 6 4 2 0 VGS = −10 V −9.0 V −8.0 V 10 −7.0 V −6.0 V −5.0 V −4.5 V −4.0 V −3.5 V −3.0 V −2.5 V 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) −ID, DRAIN CURRENT (A) 9 8 7 6 5 4 3 2 1 0 TJ = 25°C TJ = 125°C 1 1.5 2 2.5 VDS ≤ −10 V TJ = −55°C 3 3.5 4 4.5 5 −VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0.250 0.225 0.200 0.175 0.150 0.125 0.100 0.075 0.050 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 ID = −3.0 A 0.250 0.225 0.200 0.175 0.150 0.125 0.100 0.075 0.050 0.025 0 Figure 2. Transfer Characteristics TJ = 25°C TJ = 25°C VGS = −4.5 V VGS = −10 V 0 2 4 6 8 10 12 14 16 18 20 −VGS, GATE VOLTAGE (V) −ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.6 RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE (W) 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 −50 −25 0 25 50 75 100 125 150 1 VGS = −10 V ID = −3.0 A 1000 Figure 4. On−Resistance vs. Drain Current and Gate Voltage −IDSS, LEAKAGE (nA) TJ = 150°C 100 TJ = 125°C 10 TJ = 85°C 0 5 10 15 20 25 30 VGS = −4.5 V ID = −2.0 A TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 NTLUS4195PZ TYPICAL CHARACTERISTICS QT VDS QGS 3 9 2 1 0 VDS = −15 V ID = −3.0 A TJ = 25°C 0 0.5 1 1.5 2 2.5 3 6 3 0 3.5 QGD VGS −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1.2 −VGS, GATE−TO−SOURCE VOLTAGE (V) 400 350 C, CAPACITANCE (pF) 300 250 200 150 100 50 0 0 Coss Crss 5 10 15 20 25 30 Ciss VGS = 0 V TJ = 25°C f = 1 MHz 5 4 18 15 12 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation 1000 −IS, SOURCE CURRENT (A) VGS = −4.5 V VDD = −15 V ID = −3.0 A t, TIME (ns) 10 Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 100 tr tf td(off) td(on) 1 TJ = 150°C TJ = 25°C 10 1 10 RG, GATE RESISTANCE (W) 100 0.1 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 −VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance 2.0 1.9 1.8 POWER (W) −VGS(th) (V) 1.7 1.6 1.5 1.4 1.3 1.2 −50 −25 0 25 50 75 100 125 150 ID = −250 mA Figure 10. Diode Forward Voltage vs. Current 65 60 55 50 45 40 35 30 25 20 15 10 5 0 1.E−04 1.E−03 1.E−02 1.E−01 1.E+00 1.E+01 1.E+02 1.E+03 SINGLE PULSE TIME (s) TJ, JUNCTION TEMPERATURE (°C) Figure 11. Threshold Voltage Figure 12. Single Pulse Maximum Power Dissipation http://onsemi.com 4 NTLUS4195PZ TYPICAL CHARACTERISTICS 100 −ID, DRAIN CURRENT (A) 10 10 ms 100 ms 1 VGS > 4.5 V Single Pulse TC = 25°C RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 1 ms 10 ms dc 0.1 0.01 100 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE Figure 13. Maximum Rated Forward Biased Safe Operating Area 90 80 70 60 50 40 30 20 0.2 10 0.1 0 1E−06 1E−05 1E−04 0.05 0.02 0.01 Duty Cycle = 0.5 RqJA = 85°C/W Single Pulse 1E−03 1E−02 t, TIME (s) 1E−01 1E+00 1E+01 1E+02 1E+03 Figure 14. FET Thermal Response DEVICE ORDERING INFORMATION Device NTLUS4195PZTAG NTLUS4195PZTBG Package UDFN6 (Pb−Free) UDFN6 (Pb−Free) Shipping† 3000 / Tape & Reel 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NTLUS4195PZ PACKAGE DIMENSIONS UDFN6 1.6x1.6, 0.5P CASE 517AU−01 ISSUE O D 2X A B 0.10 C PIN ONE REFERENCE 2X L L1 E OPTIONAL CONSTRUCTION EXPOSED Cu MOLD CMPD DETAIL A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D E e D1 D2 E2 F G L L1 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.20 0.30 1.60 BSC 1.60 BSC 0.50 BSC 0.62 0.72 0.15 0.25 0.57 0.67 0.55 BSC 0.25 BSC 0.20 0.30 −−− 0.15 0.10 C DETAIL B A 0.05 C 0.05 C NOTE 4 (A3) A1 A1 SEATING PLANE DETAIL B OPTIONAL CONSTRUCTION SIDE VIEW e 3 C 0.10 C A B F 1 D2 G E2 0.10 C A B 6X L 6 4 6X DETAIL A b 0.10 C A B 0.05 C NOTE 3 D1 BOTTOM VIEW mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 6 ÉÉ ÉÉ ÉÉ ÉÉ ÉÉ TOP VIEW A3 SOLDERMASK DEFINED MOUNTING FOOTPRINT* 0.82 0.16 0.43 0.68 0.35 1.90 0.28 1 0.32 6X 2X 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NTLUS4195PZ/D