NTMSD3P102R2

NTMSD3P102R2 FETKY™ P−Channel Enhancement−Mode Power MOSFET and Schottky Diode Dual SO−8 Package Features • High Efficiency Components in a Single SO−8 Package • High Density Power MOSFET with Low RDS(on), • Independent Pin−Outs for MOSFET and Schottky Die • Less Component Placement for Board Space Savings • SO−8 Surface Mount Package, Mounting Information for SO−8 Package Provided Applications http://onsemi.com Schottky Diode with Low VF Allowing for Flexibility in Application Use MOSFET −3.05 AMPERES −20 VOLTS 0.085 W @ VGS = −10 V SCHOTTKY DIODE 1.0 AMPERES 20 VOLTS 470 mV @ IF = 1.0 A A 8 A 1 SO−8 CASE 751 STYLE 18 S G 1 2 3 4 5 8 7 6 C C D D • DC−DC Converters • Low Voltage Motor Control • Power Management in Portable and Battery−Powered Products, i.e.: Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Drain−to−Source Voltage Gate−to−Source Voltage − Continuous Thermal Resistance − Junction−to−Ambient (Note 1.) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Pulsed Drain Current (Note 4.) Thermal Resistance − Junction−to−Ambient (Note 2.) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Pulsed Drain Current (Note 4.) Thermal Resistance − Junction−to−Ambient (Note 3.) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Pulsed Drain Current (Note 4.) Operating and Storage Temperature Range Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = −20 Vdc, VGS = −4.5 Vdc, Peak IL = −7.5 Apk, L = 5 mH, RG = 25 Ω) Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds Symbol VDSS VGS RθJA PD ID ID IDM RθJA PD ID ID IDM RθJA PD ID ID IDM TJ, Tstg EAS Value −20 "20 171 0.73 −2.34 −1.87 −8.0 100 1.25 −3.05 −2.44 −12 62.5 2.0 −3.86 −3.10 −15 −55 to +150 140 Unit V V °C/W W A A A °C/W W A A A °C/W W A A A °C mJ TOP VIEW MARKING DIAGRAM & PIN ASSIGNMENTS Anode Anode Source Gate 1 2 3 4 (Top View) E3P102 L Y WW = Device Code = Assembly Location = Year = Work Week E3P102 LYWW 8 7 6 5 Cathode Cathode Drain Drain TL 260 °C ORDERING INFORMATION Device NTMSD3P102R2 Package SO−8 Shipping† 2500/Tape & Reel 1. Minimum FR−4 or G−10 PCB, Steady State. 2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), Steady State. 3. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds. 4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2003 1 December, 2003 − Rev. 1 Publication Order Number: NTMSD3P102R2/D NTMSD3P102R2 SCHOTTKY MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Peak Repetitive Reverse Voltage DC Blocking Voltage Thermal Resistance − Junction−to−Ambient (Note 5.) Thermal Resistance − Junction−to−Ambient (Note 6.) Thermal Resistance − Junction−to−Ambient (Note 7.) Average Forward Current (Note 7.) (Rated VR, TA = 100°C) Peak Repetitive Forward Current (Note 7.) (Rated VR, Square Wave, 20 kHz, TA = 105°C) Non−Repetitive Peak Surge Current (Note 7.) (Surge Applied at Rated Load Conditions, Half−Wave, Single Phase, 60 Hz) Symbol VRRM VR RθJA RθJA RθJA IO IFRM IFSM Value 20 204 122 83 1.0 2.0 20 Unit V °C/W °C/W °C/W A A A ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 8.) Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (VGS = 0 Vdc, ID = −250 µAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = −20 Vdc, VGS = 0 Vdc, TJ = 25°C) (VDS = −20 Vdc, VGS = 0 Vdc, TJ = 125°C) Gate−Body Leakage Current (VGS = −20 Vdc, VDS = 0 Vdc) Gate−Body Leakage Current (VGS = +20 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = −250 µAdc) Temperature Coefficient (Negative) Static Drain−to−Source On−State Resistance (VGS = −10 Vdc, ID = −3.05 Adc) (VGS = −4.5 Vdc, ID = −1.5 Adc) Forward Transconductance (VDS = −15 Vdc, ID = −3.05 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 5. 6. 7. 8. (VDS = −16 Vdc, VGS = 0 Vdc, Vd Vd 1.0 MHz) f = 1.0 MHz) Ciss Coss Crss − − − 518 190 70 750 350 135 pF VGS(th) −1.0 − RDS(on) − − gFS − 5.0 − 0.063 0.090 0.085 0.125 Mhos −1.7 3.6 −2.5 − Ω Vdc V(BR)DSS −20 − IDSS − − IGSS − IGSS − − 100 − −100 nAdc − − −1.0 −25 nAdc − −30 − − Vdc mV/°C µAdc Symbol Min Typ Max Unit Minimum FR−4 or G−10 PCB, Steady State. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), Steady State. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds. Handling precautions to protect against electrostatic discharge is mandatory. http://onsemi.com 2 NTMSD3P102R2 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 9.) Characteristic SWITCHING CHARACTERISTICS (Notes 10. & 11.) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Total Gate Charge Gate−Source Charge Gate−Drain Charge BODY−DRAIN DIODE RATINGS (Note 10.) Diode Forward On−Voltage Reverse Recovery Time (IS = −3.05 Adc, VGS = 0 Vdc, 3 05 Ad Vd dIS/dt = 100 A/µs) 100 A/ s) Reverse Recovery Stored Charge (IS = −3.05 Adc, VGS = 0 Vdc) (IS = −3.05 Adc, VGS = 0 Vdc, TJ = 125°C) VSD trr ta tb QRR − − − − − − −0.96 −0.78 34 18 16 0.03 −1.25 − − − − − µC Vdc ns (VDS = −20 Vdc, Vdc, VGS = −10 Vdc, ID = −3.05 Adc) 3 05 Ad ) (VDD = −20 Vdc, ID = −1.5 Adc, VGS = −4 5 Vdc 4.5 Vdc, RG = 6.0 Ω) (VDD = −20 Vdc, ID = −3.05 Adc, VGS = −10 Vdc Vdc, RG = 6.0 Ω) td(on) tr td(off) tf td(on) tr td(off) tf Qtot Qgs Qgd − − − − − − − − − − − 12 16 45 45 16 42 32 35 16 2.0 4.5 22 30 80 80 − − − − 25 − − nC ns ns Symbol Min Typ Max Unit SCHOTTKY RECTIFIER ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 10.) g Maximum Instantaneous Forward Voltage IF = 1.0 Adc 0 Ad IF = 2.0 Adc Maximum Instantaneous Reverse Current VR = 20 Vdc 20 Vd Maximum Voltage Rate of Change VR = 20 Vdc dV/dt IR VF TJ = 25°C 0.47 0.58 TJ = 25°C 0.05 10,000 TJ = 125°C 0.39 0.53 TJ = 125°C 10 V/ms mA Volts 9. Handling precautions to protect against electrostatic discharge is mandatory. 10. Indicates Pulse Test: Pulse Width = 300 µs max, Duty Cycle = 2%. 11. Switching characteristics are independent of operating junction temperature. http://onsemi.com 3 NTMSD3P102R2 TYPICAL MOSFET ELECTRICAL CHARACTERISTICS 6 −ID, DRAIN CURRENT (AMPS) 5 4 TJ = 25°C 3 2 1 0 6 −ID, DRAIN CURRENT (AMPS) VGS = −4.4 V VGS = −4 V VGS = −4.6 V VGS = −4.8 V VGS = −3.6 V VGS = −2.8 V VGS = −3.2 V VGS = −5 V VGS = −2.6 V VGS = −3 V VDS > = −10 V 5 4 TJ = 100°C 3 TJ = 25°C 2 TJ = −55°C 1 0 VGS = −10 V VGS = −8 V VGS = −6 V 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 1 2 3 4 5 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω) RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω) Figure 2. Transfer Characteristics 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 3 4 5 6 7 8 ID = −3.05 A TJ = 25°C 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 2 3 4 5 6 7 ID = −1.5 A TJ = 25°C −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 3. On−Resistance vs. Gate−to−Source Voltage RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 0.25 TJ = 25°C 0.2 VGS = −4.5 V 1.6 Figure 4. On−Resistance vs. Gate−to−Source Voltage 1.4 ID = −3.05 A VGS = −10 V 1.2 0.15 VGS = −10 V 0.1 1 0.8 0.05 1 2 3 4 5 6 −ID, DRAIN CURRENT (AMPS) 0.6 −50 −25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 5. On−Resistance vs. Drain Current and Gate Voltage Figure 6. On Resistance Variation with Temperature http://onsemi.com 4 NTMSD3P102R2 10000 VGS = 0 V C, CAPACITANCE (pF) 1200 1000 800 600 400 200 VDS = 0 V VGS = 0 V Ciss IDSS, LEAKAGE (nA) 1000 TJ = 150°C Crss Ciss 100 TJ = 125°C Coss Crss TJ = 25°C 10 2 4 6 8 10 12 14 16 18 20 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0 10 −VGS 5 0 5 −VDS 10 15 20 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Drain−to−Source Leakage Current vs. Voltage 12 10 VDS t, TIME (ns) 8 VGS 6 4 2 0 ID = −3.05 A TJ = 25°C 0 2 4 6 8 10 12 14 Qg, TOTAL GATE CHARGE (nC) Q1 Q2 12 8 4 0 16 1 16 100 QT 24 1000 20 Figure 8. Capacitance Variation VDS = −20 V ID = −3.05 A VGS = −10 V td(off) tf 10 td(on) tr 1 10 RG, GATE RESISTANCE (Ω) 100 Figure 9. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 1000 IS, SOURCE CURRENT (AMPS) VDS = −20 V ID = −1.5 A VGS = −4.5 V t, TIME (ns) 3 2.5 2 1.5 1 0.5 Figure 10. Resistive Switching Time Variation vs. Gate Resistance VGS = 0 V TJ = 25°C 100 tr tf td(off) td(on) 10 1 10 RG, GATE RESISTANCE (Ω) 100 0 0.2 0.4 0.6 0.8 1 1.2 −VSD, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 11. Resistive Switching Time Variation vs. Gate Resistance Figure 12. Diode Forward Voltage vs. Current http://onsemi.com 5 NTMSD3P102R2 di/dt IS trr ta tb TIME tp IS 0.25 IS Figure 13. Diode Reverse Recovery Waveform 1.0 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESPONSE D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 Single Pulse Normalized to RθJA at Steady State (1″ pad) Chip Junction 2.32 Ω 18.5 Ω 50.9 Ω 37.1 Ω 56.8 Ω 24.4 Ω 0.0014 F 0.0073 F 0.022 F 0.105 F 0.484 F 3.68 F Ambient 0.01 1E−03 1E−02 1E−01 1E+00 t, TIME (s) 1E+01 1E+02 1E+03 Figure 14. FET Thermal Response http://onsemi.com 6 NTMSD3P102R2 TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS 10 IF, INSTANTANEOUS FORWARD CURRENT (AMPS) IF, INSTANTANEOUS FORWARD CURRENT (AMPS) 10 TJ = 125°C TJ = 125°C 1.0 85°C 25°C 1.0 85°C 25°C −40° C 0.1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS) 0.1 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VF, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (VOLTS) Figure 15. Typical Forward Voltage IR, MAXIMUM REVERSE CURRENT (AMPS) 1E−2 IR , REVERSE CURRENT (AMPS) TJ = 125°C 85°C 1E−1 Figure 16. Maximum Forward Voltage 1E−3 1E−2 TJ = 125°C 1E−4 1E−3 1E−5 25°C 1E−4 25°C 1E−5 1E−6 0 5.0 10 15 20 VR, REVERSE VOLTAGE (VOLTS) 1E−6 1E−7 0 5.0 10 15 20 VR, REVERSE VOLTAGE (VOLTS) Figure 17. Typical Reverse Current Figure 18. Maximum Reverse Current 1000 TYPICAL CAPACITANCE AT 0 V = 170 pF C, CAPACITANCE (pF) IO, AVERAGE FORWARD CURRENT (AMPS) 1.6 dc 1.4 1.2 1.0 0.8 0.6 Ipk/Io = 10 0.4 0.2 0 0 20 40 60 80 100 120 140 160 TA, AMBIENT TEMPERATURE (°C) Ipk/Io = 20 SQUARE WAVE Ipk/Io = p Ipk/Io = 5.0 FREQ = 20 kHz 100 10 0 5.0 10 15 20 VR, REVERSE VOLTAGE (VOLTS) Figure 19. Typical Capacitance Figure 20. Current Derating http://onsemi.com 7 NTMSD3P102R2 TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS PFO, AVERAGE POWER DISSIPATION (WATTS) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 0.5 1.0 1.5 2.0 IO, AVERAGE FORWARD CURRENT (AMPS) SQUARE WAVE dc Ipk/Io = p Ipk/Io = 5.0 Ipk/Io = 10 Ipk/Io = 20 Figure 21. Forward Power Dissipation 1.0 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 t, TIME (s) 1.0E+00 1.0E+01 1.0E+02 1.0E+03 NORMALIZED TO RqJA AT STEADY STATE (1″ PAD) 0.0031 W CHIP JUNCTION 0.0014 F 0.0154 W 0.0082 F 0.1521 W 0.4575 W 0.3719 W 0.1052 F 2.7041 F 158.64 F AMBIENT Figure 22. Schottky Thermal Response http://onsemi.com 8 NTMSD3P102R2 PACKAGE DIMENSIONS SO−8 CASE 751−07 ISSUE AA −X− A 8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 ANODE ANODE SOURCE GATE DRAIN DRAIN CATHODE CATHODE INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 B 1 4 S 0.25 (0.010) M Y M −Y− G C −Z− H D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 STYLE 18: PIN 1. 2. 3. 4. 5. 6. 7. 8. 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 NTMSD3P102R2 FETKY is a trademark of International Rectifier Corporation. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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