NTR4503N, NVTR4503N
MOSFET – Power, Single,
N-Channel, SOT-23
30 V, 2.5 A
Features
•
•
•
•
•
Leading Planar Technology for Low Gate Charge / Fast Switching
4.5 V Rated for Low Voltage Gate Drive
SOT−23 Surface Mount for Small Footprint (3 x 3 mm)
NV Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
RDS(on) TYP
85 mW @ 10 V
30 V
N−Channel
D
• DC−DC Conversion
• Load/Power Switch for Portables
• Load/Power Switch for Computing
G
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
2.0
A
Continuous Drain
Current (Note 1)
Steady
State
TA = 25°C
TA = 85°C
1.5
t ≤ 10 s
TA = 25°C
2.5
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
PD
0.73
W
Continuous Drain
Current (Note 2)
Steady
State
TA = 25°C
ID
1.5
A
Power Dissipation
(Note 2)
Pulsed Drain Current
TA = 85°C
TA = 25°C
tp = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
Peak Source Current
(Diode Forward)
tp = 10 ms
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
2.5 A
105 mW @ 4.5 V
Applications
Parameter
ID MAX
1.1
PD
0.42
W
IDM
10
A
TJ,
Tstg
−55 to
150
°C
IS
2.0
A
ISM
4.0
A
TL
260
°C
S
3
MARKING DIAGRAM/
PIN ASSIGNMENT
3
Drain
1
2
SOT−23
CASE 318
STYLE 21
TR3
M
G
TR3 MG
G
1
Gate
2
Source
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device
Package
Shipping†
NTR4503NT1G
SOT−23
(Pb−Free)
3000 / Tape & Reel
NVTR4503NT1G
SOT−23
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2003
June, 2019 − Rev. 8
1
Publication Order Number:
NTR4503N/D
NTR4503N, NVTR4503N
THERMAL RESISTANCE RATINGS
Symbol
Max
Unit
Junction−to−Ambient − Steady State (Note 1)
Parameter
RqJA
170
°C/W
Junction−to−Ambient − t < 10 s (Note 1)
RqJA
100
Junction−to−Ambient − Steady State (Note 2)
RqJA
300
1. Surface−mounted on FR4 board using 1 in sq pad size.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
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2
NTR4503N, NVTR4503N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
36
IDSS
VGS = 0 V, VDS = 24 V
1.0
VGS = 0 V, VDS = 24 V, TJ = 125°C
10
IGSS
VDS = 0 V, VGS = "20 V
"100
nA
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250 mA
1.75
3.0
V
Drain−to−Source On−Resistance
RDS(on)
VGS = 10 V, ID = 2.5 A
85
110
mW
VGS = 4.5 V, ID = 2.0 A
105
140
VDS = 4.5 V, ID = 2.5 A
5.3
S
135
pF
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
V
mA
ON CHARACTERISTICS (Note 3)
Forward Transconductance
gFS
1.0
CHARGES AND CAPACITANCES
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
VGS = 0 V, f = 1.0 MHz,
VDS = 15 V
VGS = 0 V, f = 1.0 MHz,
VDS = 24 V
52
15
130
250
42
75
13
25
7.0
Total Gate Charge
QG(TOT)
3.6
Threshold Gate Charge
QG(TH)
0.3
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
0.7
Total Gate Charge
QG(TOT)
1.9
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
VGS = 10 V, VDS = 15 V,
ID = 2.5 A
VGS = 4.5 V, VDS = 24 V,
ID = 2.5 A
pF
nC
0.6
nC
0.3
0.6
0.9
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(on)
5.8
12
5.8
10
14
25
tf
1.6
5.0
td(on)
4.8
tr
td(off)
tr
td(off)
VGS = 10 V, VDD = 15 V,
ID = 1 A, RG = 6 W
VGS = 10 V, VDD = 24 V,
ID = 2.5 A, RG = 2.5 W
tf
ns
ns
6.7
13.6
1.8
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
Reverse Recovery Charge
QRR
VGS = 0 V, IS = 2.0 A
0.85
VGS = 0 V, IS = 2.0 A,
dIS/dt = 100 A/ms
9.2
1.2
ns
V
4.0
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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3
NTR4503N, NVTR4503N
TYPICAL PERFORMANCE CURVES
8
4V
3.6 V
6
3.4 V
3.2 V
4
3V
2
2.8 V
2.6 V
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VDS ≥ 10 V
3.8 V
TJ = 25°C
ID, DRAIN CURRENT (AMPS)
10 V
6V
5V
4.5 V
4.2 V
2
1
3
8
4
4
3
4
5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
2
ID = 2.5 A
TJ = 25°C
0.25
0.2
0.15
0.1
0.05
0
4
6
3
5
7
8
9
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
2
10
TJ = 25°C
0.11
VGS = 4.5 V
0.10
0.09
0.08
VGS = 10 V
0.07
2
3
6
5
4
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1000
1.8
VGS = 0 V
IDSS, LEAKAGE (nA)
ID = 2.5 A
VGS = 10 V
1.4
1.2
1.0
TJ = 150°C
100
10
TJ = 100°C
0.8
0.6
−50
6
0.12
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.3
1.6
100°C
25°C
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
10
−25
0
25
50
75
100
125
150
1
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
30
NTR4503N, NVTR4503N
VGS = 0 V
VDS = 0 V
TJ = 25°C
C, CAPACITANCE (pF)
Ciss
VDS
QG
10
200
Crss
100
Coss
0
10
15
15
5
VGS
0
VDS
5
10
15
20
30
25
VGS
5
QGS
0
0
0
1
2
3
QG, TOTAL GATE CHARGE (nC)
IS, SOURCE CURRENT (AMPS)
t, TIME (ns)
3
td(off)
tf
10
1
td(on)
tr
1
10
VGS = 0 V
TJ = 25°C
2
1
0
0.3
100
4
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
VDD = 24 V
ID = 2.5 A
VGS = 10 V
5
QGD
ID = 2.5 A
TJ = 25°C
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
100
10
0.4
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE (OHMS)
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
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5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
300
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES
1
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
D
0.25
3
E
1
2
T
HE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
HE
T
L
3X b
L1
VIEW C
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXMG
G
1
3X
2.90
3X
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
0.90
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.95
PITCH
0.80
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 7:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 9:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 11:
STYLE 12:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. CATHODE
3. CATHODE−ANODE
3. ANODE
STYLE 15:
PIN 1. GATE
2. CATHODE
3. ANODE
STYLE 16:
PIN 1. ANODE
2. CATHODE
3. CATHODE
STYLE 17:
PIN 1. NO CONNECTION
2. ANODE
3. CATHODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1. NO CONNECTION PIN 1. CATHODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
2. ANODE
3. GATE
3. ANODE
3. CATHODE−ANODE
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 22:
PIN 1. RETURN
2. OUTPUT
3. INPUT
STYLE 23:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 24:
PIN 1. GATE
2. DRAIN
3. SOURCE
STYLE 27:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
STYLE 28:
PIN 1. ANODE
2. ANODE
3. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
STYLE 13:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 25:
PIN 1. ANODE
2. CATHODE
3. GATE
STYLE 14:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 26:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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