INN2603K

InnoSwitch-EP Family Off-Line CV/CC Flyback Switcher IC with Integrated 725 V / 900 V MOSFET, Sync-Rect Feedback with Advanced Protection Product Highlights Highly Integrated, Compact Footprint • Incorporates flyback controller, 725 V / 900 V MOSFET, secondary- side sensing and synchronous rectification driver SR FET • FluxLink™ integrated, HIPOT-isolated, feedback link • E xceptional CV accuracy, independent of transformer design or EcoSmart™ – Energy Efficient • 50 to only 39. from an auxiliary winding on the transformer T1. Output of the auxiliary (or bias) winding is rectified using diode D1 and filtered using capacitor C4. Resistor R3 limits the current being supplied to the BPP pin of InnoSwitch IC (U1). Bridge rectifier BR1 rectifies the AC input supply. Capacitors C2 and C3 provide filtering of the rectified AC input and together with inductor L1 form a pi-filter to attenuate differential mode EMI. Capacitor C14 connected at the power supply output with output common mode choke to help reduce common mode EMI. Output regulation is achieved using On/Off control, the number of enabled switching cycles are adjusted based on the output load. At high load, most switching cycles are enabled, and at light load or no-load, most cycled are disabled or skipped. Once a cycle is enabled, the MOSFET will remain on until the primary current ramps to the device current limit for the specific operating state. There are four operating states (current limits) arranged such that the frequency content of the primary current switching pattern remains out of the audible range until at light load where the transformer flux density and therefore audible noise generation is at a very low level. Thermistor RT1 limits the inrush current when the power supply is connected to the input AC supply. Input fuse F1 provides protection against excess input current resulting from catastrophic failure of any of the components in the power supply. One end of the transformer primary is connected to the rectified DC bus; the other is connected to the drain terminal of the MOSFET inside the InnoSwitch-EP IC (U1). A low-cost RCD clamp formed by diode D2, resistors R1 and R2, and capacitor C5 limits the peak drain voltage of U1 at the instant of turn-off of the MOSFET inside U1. The clamp helps to dissipate the energy stored in the leakage reactance of transformer T1. The InnoSwitch-EP IC is self-starting, using an internal high-voltage current source to charge the BPP pin capacitor (C6) when AC is first applied. During normal operation the primary-side block is powered The secondary-side of the InnoSwitch-EP IC provides output voltage, output current sensing and drive to a MOSFET providing synchronous rectification. The secondary of the transformer is rectified by diode D3 and filtered by capacitors C12 and C11. High frequency ringing during switching transients that would otherwise create radiated EMI is reduced via a snubber (resistor R6 and capacitor C9). To reduce dissipation in the diode D3, synchronous rectification (SR) is provided by MOSFET Q1. The gate of Q1 is turned on by secondary-side controller inside IC U1, based on the winding voltage sensed via resistor R7 and fed into the FWD pin of the IC. 8 Rev. G 09/17 www.power.com InnoSwitch-EP In continuous conduction mode of operation, the MOSFET is turned off just prior to the secondary-side commanding a new switching cycle from the primary. In discontinuous mode of operation, the power MOSFET is turned off when the voltage drop across the MOSFET falls below a threshold of approximately 24 mV. Secondaryside control of the primary-side power MOSFET avoids any possibility of cross conduction of the two MOSFETs and provides extremely reliable synchronous rectification. As the SR MOSFET is not on for the full switching cycle, a small low current diode is still required (D3) for best in class efficiency. During CC operation, when the output voltage falls, the device will power itself from the secondary winding directly. During the on-time of the primary-side power MOSFET, the forward voltage that appears across the secondary winding is used to charge the decoupling capacitor C8 via resistor R7 and an internal regulator. This allows output current regulation to be maintained down to ~10 V. Below this level the unit enters auto-restart until the output load is reduced. RA RC CA CB InnoSwitch FB RB GND The secondary-side of the IC is self-powered from either the secondary winding forward voltage or the output voltage. Capacitor C8 connected to the BPS pin of InnoSwitch IC U1, provides decoupling for the internal circuitry. VOUT IS RTN PI-8443-092717 Figure 14. Feedback Network. Output current is sensed between the IS and GND pins with a threshold of approximately 33 mV to reduce losses. Once the current sense threshold is exceeded the device adjusts the number of switch pulses to maintain a fixed output current. During a fault condition such as short-circuit of output, a large current will flow through the current sense resistors R8 and R9 due to discharge of the output capacitors C12 and C11 through the short-circuit. Better load regulation and lower output ripple can be achieved by matching the time constants of upper and lower feedback divider network. As shown in Figure 14. The output voltage is sensed via resistor divider R10 and R11. Output voltage is regulated so as to achieve a voltage of 1.265 V on the FEEDBACK pin. Resistor R12 and capacitor C13 form a phase lead network that ensure stable operation and minimize output voltage overshoot and undershoot during transient load conditions. Capacitor C10 provides noise filtering of the signal at the FEEDBACK pin. Resistor R4 and R5 provide line voltage sensing and provide a current to U1, which is proportional to the DC voltage across capacitor C3. At approximately 100 V DC, the current through these resistors exceeds the line undervoltage threshold, which results in enabling of U1. At approximately 435 VDC, the current through these resistors exceeds the line overvoltage threshold, which results in disabling of U1. RB CB , RA CA 9 www.power.com Rev. G 09/17 InnoSwitch-EP C9 100 pF 250 VAC R16 C17 5.6 Ω 1000 pF 1/8 W 100 V BR1 GBL06 600 V C3 2.2 nF 630 V 2 R1 430 kΩ 1/8 W D1 DFLR1600-7 600 V R10 5.1 Ω R3 6.8 kΩ 1/10 W C5 22 µF 25 V R11 100 Ω C14 220 pF 250 V D C7 2.2 µF 25 V R17 4.12 MΩ 1% V BPP C4 1 µF 25 V FB InnoSwitch-EP U1 INN2605K* R19 1 kΩ C21 1000 pF 100 V C19 1 µF 25 V R6 32.4 kΩ 1% CONTROL S R8 1.0 MΩ 1% C8 330 pF 50 V R4 47 Ω 1/10 W BPS N R15 137 kΩ 1% GND R18 3.9 MΩ 1% C15 1000 pF 100 V R9 5.1 Ω VO 3 SR/P 2 D2 DFLR1200-7 200 V 85 - 264 VAC R14 1 kΩ Q1 SIR876ADP-T1-GE3 NC C2 33 µF 400 V VR1 DZ2S100MOL 8.2 V L R7 C6 10 Ω 1.5 nF 1/8 W 100 V FWD F1 2A 12 V C13 47 µF 16 V 11 4 C20 1 µF 16 V FL2 L2 15 mH 1 5V L4 3.3 µH Q2 AO6420 10 C1 10 µF 400 V C18 47 µF 16 V C10 470 µF 16 V L1 90 µH C12 47 nF 310 V C16 560 µF 6.3 V FL4 FL1 R2 51 Ω VR2 1N4738A-T 8.2 V L3 3.3 µH T1 FL5 RM8 FL3 IS R20 0.02 Ω 1% R21 0.04 Ω 1% RTN *725 V MOSFET PI-7901-031716 Figure 15. RDK-469 Universal Input, 12 V, 1.5 A and 5 V. 0.5 A Dual Output Power Supply. The circuit shown in Figure 15 is a high performance dual output power Supply. and triggers the OVP latch in the primary side controller of the InnoSwitch-EP IC. Fuse F1 isolates the circuit and provides protection from component failure and the common mode chokes L1 and L2 with capacitors C1, C2 and C12, provides attenuation for EMI. Bridge rectifier BR1 rectifies the AC line voltage and provides a full wave rectified DC across the filter consisting of C1 and C2. There is no need to use an inrush current limiter in the circuit with the high peak forward surge current rated bridge rectifier, GBL06. The differential inductance of common mode choke L1 with capacitors C1 and C2 provide differential noise filtering. Resistor R17 and R18 provide line voltage sensing and provide a current to U1, which is proportional to the DC voltage across capacitor C2. At approximately 100 V DC, the current through these resistors exceeds the line undervoltage threshold, which results in enabling of U1. At approximately 460 V DC, the current through these resistors exceeds the line overvoltage threshold, which results in disabling of U1. The secondary side of the InnoSwitch-EP provides output voltage, output current sensing and drive to a MOSFET providing synchronous rectification. One side of the transformer primary is connected to the rectified DC bus, the other is connected to the integrated 725 V power MOSFET inside the InnoSwitch-EP IC (U1). Output rectification for the 5 V output is provided by SR FET Q2. Very low ESR capacitor C16 provides filtering, and Inductor L3 and capacitor C18 form a second stage filter that significantly attenuates the high frequency ripple and noise at the 5 V output. A low-cost RCD clamp formed by D1, R1, R2, and C3 limits the peak drain voltage due to the effects of transformer leakage reactance and output trace inductance. The IC is self-starting, using an internal high-voltage current source to charge the PRIMARY BYPASS pin capacitor, C4, when AC is first applied. During normal operation the primary-side block is powered from an auxiliary winding on the transformer. The output of this is configured as a flyback winding which is rectified and filtered using diode D2 and capacitor C5, and fed in the BPP pin via a current limiting resistor R3. Radiated EMI caused by resonant ringing across diode D2 is reduced via snubber components R11 and C14. The primary-side overvoltage protection is obtained using Zener diode VR1. In the event of overvoltage at output, the increased voltage at the output of the bias winding cause the Zener diode VR1 to conduct Output rectification for the 12 V output is provided by SR FET Q1. Very low ESR capacitors C10 provides filtering, and Inductor L4 and capacitor C13 form a second-stage filter that significantly attenuates the high frequency ripple and noise at the 12 V output. C19 and C20 capacitors reduce the radiation EMI noise. RC snubber networks comprising R16 and C17 for Q2, R7 and C6 for Q1 damp high frequency ringing across SR FETs, which results from leakage inductance of the transformer windings and the secondary trace inductances. The gates of Q1 and Q2 are turned on based on the winding voltage sensed via R4 and the FWD pin of the IC. In continuous conduction mode operation, the power MOSFET is turned off just prior to the 10 Rev. G 09/17 www.power.com InnoSwitch-EP secondary-side controller commanding a new switching cycle from the primary. In discontinuous mode, the MOSFET is turned off when the voltage drop across the MOSFET falls below a threshold (VSR(TH)). Secondary-side control of the primary side MOSFET ensure that it is never on simultaneously with the synchronous rectification MOSFET. The MOSFET drive signal is output on the SR/P pin. The secondary-side of the IC is self-powered from either the secondary winding forward voltage or the output voltage. The output voltage powers the device, fed into the VO pin and charges the decoupling capacitor C7 via R4 and an internal regulator. The unit enters auto-restart when the sensed output voltage is lower than ≈3 V. Resistor R8, R15 and R6 form a voltage divider network that senses the output voltage from both outputs for better cross-regulation. Zener VR2 improves the cross regulation when only the 5 V output is loaded, which results in the 12 V output operating at the higher end of the specification. The InnoSwitch-EP IC has an internal reference of 1.265 V. Feedback compensation networks comprising capacitors C15, C21 and resistors R14, R19 reduce the output ripple voltage. Capacitor C8 provides decoupling from high frequency noise affecting power supply operation. Total output current is sensed by R20 and R21 with a threshold of approximately 33 mV to reduce losses. Once the current sense threshold across these resistors is exceeded the device adjusts the number of switch pulses to maintain a fixed output current. 11 www.power.com Rev. G 09/17 InnoSwitch-EP C19 150 pF 440 VAC L2 3.3 µH T1 FL3 RM8 FL1 R14 C10 4.3 Ω 1000 pF 1/10 W 100 V 2 C7 1000 pF 630 V D1 DL4007 N TP2 C2 33 µF 400 V R19 390 kΩ 1W C18 47 µF 400 V VR2 MMSZ5203B-7-F R28 22 Ω 1/8 W R2 620 kΩ 1/2 W R5 2.40 MΩ 1% R10 2.40 MΩ 1% R9 2.7 kΩ 1/10 W C6 22 µF 50 V D R8 620 kΩ V BPP C8 1 µF 25 V R23 137 kΩ 1% 1/16 W R24 1 kΩ 1% 1/8 W C20 1000 pF 100 V C23 1 µF 50 V R16 32.4 kΩ 1% 1/16 W C9 2.2 µF 25 V CONTROL S R15 1 MΩ 1% 1/16 W C11 330 pF 50 V R13 47 Ω 1/10 W BPS R4 2.40 MΩ 1% GND 4 C17 47 µF 400 V NC VO 1 R18 390 kΩ 1W R17 1 kΩ 1% 1/8 W C15 1000 pF 100 V 10 D2 DFLR1200-7 200 V 85 - 484 VAC C1 33 µF 400 V 3 5 V, 500 mA C25 47 µF 16 V Q2 AON7254 FWD R1 620 kΩ 1/2 W F1 2A L TP1 R3 2.40 MΩ 1% L1 16.6 mH C21 470 µF 16 V FL5 11 2 C14 1 µF 50 V TP4 R25 C24 4.3 Ω 1000 pF 1/10 W 100 V R12 15 Ω VR1 1N4738A-T 8.2 V L3 3.3 µH Q1 AOTF2210L FL4 RT1 20 Ω RV1 625 VAC C26 47 µF 16 V FL2 R11 360 kΩ SR/P BR1 B10S-G 1000 V 12 V, 1.25 A TP3 C12 470 µF 16 V FB InnoSwitch-EP U1 INN2904K* IS R20 0.02 Ω 1% R21 0.12 Ω RTN *900 V MOSFET PI-7902-031716 TP5, TP6 Figure 16. DER-531 85 V to 484 V Input, 12 V, 1.25 A and 5 V. 0.5 A Dual Output Power Supply. The circuit shown in Figure 16 is a high performance dual output power supply using INN2904K, which operates over a wide input range of 85 VAC – 484 VAC. The integration offered by InnoSwitch-EP contributes to a low component count of 59 and a high efficiency of 86%. The no-load power is as low as 50 mA. across capacitors C1 and C2. At approximately 78 V DC, the current through these resistors exceeds the line undervoltage threshold, which results in enabling of U1. At approximately 700 V DC, the current through these resistors exceeds the line overvoltage threshold, which results in disabling of U1. Fuse F1 isolates the circuit and provides protection from component failure. The common mode choke L1 with capacitors C1, C2, C17 and C18, provides attenuation for EMI. Bridge rectifier BR1 rectifies the AC line voltage and provides a full wave rectified DC across the filter consisting of C1, C2, C17 and C18. Thermistor RT1 is an inrush current limiter in the circuit with the high peak forward surge current rated bridge rectifier. MOV RV1 provides protection from surge events. The secondary-side of the InnoSwitch-EP provides output voltage, output current sensing and drive to a MOSFET providing synchronous rectification. One side of the transformer primary is connected to the rectified DC bus, the other is connected to the integrated 900 V power MOSFET inside the InnoSwitch-EP IC (U1). A low-cost RCD clamp formed by D1, R11, R12, and C7 limits the peak drain voltage due to the effects of transformer leakage reactance and output trace inductance. The IC is self-starting, using an internal high-voltage current source to charge the PRIMARY BYPASS pin capacitor, C8, when AC is first applied. During normal operation the primary-side block is powered from an auxiliary winding on the transformer. The output of this is configured as a flyback winding which is rectified and filtered using diode D2 and capacitor C6, and fed in the PRIMARY BYPASS pin via a current limiting resistor R9. The primary-side overvoltage protection is obtained using Zener diode VR2 and R28. In the event of overvoltage at output, the increased voltage at the output of the bias winding cause the Zener diode VR2 to conduct, which triggers the OVP latch in the primary-side controller of the InnoSwitch-EP IC. Resistor R3, R4, R5, R10 and R8 provide line voltage sensing and provide a current to U1, which is proportional to the DC voltage Output rectification for the 5 V output is provided by SR FET Q2. Very low ESR capacitor C21 provides filtering, and inductor L3 and capacitor C25 form a second stage filter that significantly attenuates the high frequency ripple and noise at the 5 V output. Output rectification for the 12 V output is provided by SR FET Q1. Very low ESR capacitors C12 provides filtering, and inductor L2 and capacitor C26 form a second stage filter that significantly attenuates the high frequency ripple and noise at the 12 V output. C14 and C23 capacitors are used to high frequency switching ripple and radiated EMI. RC snubber networks comprising R25 and C24 for Q2, R14 and C10 for Q1 damp high frequency ringing across SR FETs, which results from leakage inductance of the transformer windings and the secondary trace inductances. In continuous conduction mode operation, the power MOSFET is turned off just prior to the secondary side controller commanding a new switching cycle from the primary. In discontinuous mode the MOSFET is turned off when the voltage drop across the MOSFET falls below a threshold (VSR(TH)). Secondary-side control of the primaryside MOSFET ensure that it is never on simultaneously with the synchronous rectification MOSFET. The MOSFET drive signal is output on the SR/P pin. The secondary-side of the IC is self-powered from either the secondary winding forward voltage or the output voltage. The output voltage 12 Rev. G 09/17 www.power.com InnoSwitch-EP powers the device, fed into the VO pin and charges the decoupling capacitor C9 via an internal regulator during CV region and forward secondary winding forward voltage powers the device during startup and CC region through R13. The unit enters auto-restart when the sensed output voltage is lower than 3 V. Resistor R16, R15 and R23 form a voltage divider network that senses the output voltage from both outputs for better cross-regulation. Zener diode VR1 in series with R22 improves the cross regulation when only the 5 V output is loaded, which results in the 12 V output operating at the higher end of the specification. The InnoSwitch-EP IC has an internal reference of 1.265 V. Feedback compensation networks comprising capacitors C20, C15 and resistors R24, R17 reduce the output ripple voltage. Capacitor C11 provides decoupling from high frequency noise affecting power supply operation. Total output current is sensed by R20 and R21 with a threshold of approximately 33 mV to reduce losses. Once the current sense threshold across these resistors is exceeded, the device adjusts the number of switch pulses to maintain a fixed output current. Key Application Considerations Output Power Table The data sheet output power table (Table 1) represents the minimum practical continuous output power level that can be obtained under the following assumed conditions: 1. The minimum DC input voltage is 90 V or higher for 85 VAC input, 2. 3. 4. 5. 6. 7. 8. 9. or 220 V or higher for 230 VAC input or 115 VAC with a voltage doubler. The value of the input capacitance should be sized to meet these criteria for AC input designs. Efficiency of >82%. Minimum data sheet value of I2f. Transformer primary inductance tolerance of ±10%. Reflected output voltage (VOR) of 110 V. Voltage only output of 12 V with a synchronous rectifier. Increased current limit is selected for peak and open frame power columns and standard current limit for adapter columns. The part is board mounted with SOURCE pins soldered to a sufficient area of copper and/or a heat sink is used to keep the SOURCE pin temperature at or below 110 °C. Ambient temperature of 50 °C for open frame designs and 40 °C for sealed adapters. *Below a value of 1, KP is the ratio of ripple to peak primary current. To prevent reduced power delivery, due to premature termination of switching cycles, a transient KP limit of ≥0.25 is recommended. This prevents the initial current limit (IINIT) from being exceeded at MOSFET turn-on. Overvoltage Protection The output overvoltage protection provided by the InnoSwitch-EP IC uses an internal latch that is triggered by a threshold current of approximately 7.6 mA into the PRIMARY BYPASS pin. In addition to an internal filter, the PRIMARY BYPASS pin capacitor forms an external filter providing noise immunity from inadvertent triggering. For the bypass capacitor to be effective as a high frequency filter, the capacitor should be located as close as possible to the SOURCE and PRIMARY BYPASS pins of the device. The primary sensed OVP function can be realized by connecting a Zener diode from the rectified and filtered bias winding voltage supply to the PRIMARY BYPASS pin (parallel to R4 in Figure 13). Selecting the Zener diode voltage to be approximately 6 V above the bias winding voltage (28 V for 22 V bias winding) gives good OVP performance for most designs, but can be adjusted to compensate for variations in leakage inductance. Adding additional filtering can be achieved by inserting a low value (10 Ω to 47 Ω) resistor in series with the bias winding diode and/or the OVP Zener diode. The resistor in series with the OVP Zener diode also limits the maximum current into the BYPASS pin. Reducing No-load Consumption The InnoSwitch-EP IC can start in self-powered mode from the BYPASS pin capacitor charged through the internal current source. Use of a bias winding is however required to provide supply current to the PRIMARY BYPASS pin once the InnoSwitch-EP IC has become operational. Auxiliary or bias winding provided on the transformer is required for this purpose. The addition of a bias winding that provides bias supply to the PRIMARY BYPASS pin enables design of power supplies with no-load power consumption down to ±2000 V on all pins Machine Model ESD JESD22-A115C > ±200 V on all pins > ±100 mA or > 1.5 V (max) on all pins Part Ordering Information • InnoSwitch-EP Product Family • 260x / 2904 Series Number • Package Identifier K eSOP-R16B • Tape & Reel and Other Options INN 2603 K - TL TL Tape & Reel, 1000 pcs min/mult. 32 Rev. G 09/17 www.power.com InnoSwitch-EP Notes 33 www.power.com Rev. G 09/17 Revision Notes Date B Code A Data Sheet. 08/15 C Modified page 1 sub-header text. Corrected SOURCE Pin description on page 3 and bottom side of PCB layout in Figure 17. Added ESD/Latch-Up table and Package Marking. 11/15 D Corrected OUTPUT VOLTAGE Pin Auto-Restart Threshold section. Updated Figure 1 and Figure 4, removed SecondarySide Current Rating. Updated parameters: IS1, IS2, ICH1, ICH2 IUV+, IUV-, tUV-, IOV+, IOV-, tOV+, V V, ILIMIT ,ILIMIT-1, ILIMIT+1, RDS(ON), ISNL, ISVTH, VFB(OFF), ISRPU, ISRPD. Revised 4th bullet point in Highly Integrated, Compact Footprint section under Product Highlights on page 1. 01/16 E Added INN2904 900 V series. 03/16 F Updated Pin 8 and added Pin 9 information under Pin Functional Description on page 3. 04/17 G Updated text in Line Voltage Monitor, Output Overvoltage Protection, Applications Example, Bias Winding and External Bias Circuit and Output Voltage Feedback Circuit sections. Added 4 new waveform schematics in Bias Winding and External Bias Circuit section. Added 1 new figure in Applications Example section. 09/17 For the latest updates, visit our website: www.power.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. 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