74FCT163827APAG8

74FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 20-BIT BUFFER FEATURES: 74FCT163827A/C DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended Range μ W typ. static) • CMOS power levels (0.4μ • Rail-to-rail output swing for increased noise margin • Low Ground Bounce (0.3V typ.) • Inputs (except I/O) can be driven by 3.3V or 5V components • Available in TSSOP package The FCT163827 20-bit buffer is built using advanced dual metal CMOS technology. These 20-bit bus drivers provide high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pairs of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT163827 has series current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times, reducing the need for external series terminating resistors. The inputs of the FCT163827 can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system. FUNCTIONAL BLOCK DIAGRAM 1OE1 1 2OE1 56 1OE2 1A1 28 29 2OE2 55 2 1Y1 TO NINE OTHER CHANNELS 2A1 42 15 2Y1 TO NINE OTHER CHANNELS INDUSTRIAL TEMPERATURE RANGE MAY 2019 1 DSC-3083/12 74FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION 1OE1 1Y1 1 ABSOLUTE MAXIMUM RATINGS(1) 56 2 55 Symbol Description Max Unit 1OE2 VTERM(2) Terminal Voltage with Respect to GND –0.5 to +4.6 V 1A1 VTERM(3) Terminal Voltage with Respect to GND –0.5 to 7 V VTERM(4) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +60 mA 1Y2 3 54 1A2 GND 4 53 GND 1Y3 5 52 1A3 1Y4 6 51 1A4 VCC 7 50 VCC 1Y5 8 49 1A5 1Y6 9 48 1A6 1Y7 10 47 1A7 GND 11 46 GND 1Y8 12 45 1A8 1Y9 13 44 1A9 Symbol Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3.5 6 pF COUT Output Capacitance VOUT = 0V 3.5 8 pF 1Y10 14 43 1A10 2Y1 15 42 2A1 2Y2 16 41 2A2 17 40 GND 18 39 GND 2Y4 19 38 2A4 2Y5 20 37 2A5 2Y6 21 36 2A6 VCC 22 35 VCC 2Y7 23 34 2A7 2Y8 24 33 2A8 GND 25 32 GND 2Y9 26 31 2A9 2Y10 27 30 2A10 2OE1 28 29 2OE2 2Y3 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Outputs and I/O terminals. CAPACITANCE (TA = +25°C, F = 1.0MHz) Parameter(1) NOTE: 1. This parameter is measured at characterization but not tested. 2A3 PIN DESCRIPTION Pin Names xOEx Description Output Enable Inputs (Active LOW) xAx Data Inputs xYx 3-State Outputs FUNCTION TABLE(1) Inputs Outputs xOE1 xOE2 xAx xYx L L L L TOP VIEW L L H H Package Type Package Code Order Code H X X Z TSSOP PAG56 PAG X H X Z NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-impedance 2 74FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V Symbol VIH Parameter Min. Typ.(2) Max. Unit 2 — 5.5 V 2 — VCC+0.5 –0.5 — 0.8 VI = 5.5V — — ±1 Input HIGH Current (I/O pins) VI = VCC — — ±1 Input LOW Current (Input pins) VI = GND — — ±1 Input LOW Current (I/O pins) VI = GND — — ±1 VO = VCC — — ±1 VO = GND — — ±1 — –0.7 –1.2 V –36 –60 –110 mA mA Input HIGH Level (Input pins) Test Conditions(1) Guaranteed Logic HIGH Level Input HIGH Level (I/O pins) VIL Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level IIH Input HIGH Current (Input pins) IIL VCC = Max. IOZH High Impedance Output Current VCC = Max. IOZL (3-State Output pins) VIK Clamp Diode Voltage VCC = Min., IIN = –18mA IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V (3) IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V (3) VOH Output HIGH Voltage VCC = Min. IOH = –0.1mA VIN = VIH or VIL VCC = 3V V µA µA 50 90 200 VCC-0.2 — — IOH = –3mA 2.4 3 — IOH = –8mA 2.4 3 — VCC = Min. IOL = 0.1mA — — 0.2 VIN = VIH or VIL IOL = 16mA — 0.2 0.4 IOL = 24mA — 0.3 0.55 IOL = 24mA — 0.3 0.5 –60 –135 –240 mA — 150 — mV — 0.1 10 µA (5) V VIN = VIH or VIL VOL Output LOW Voltage VCC = 3V V VIN = VIH or VIL IOS Short Circuit Current VH Input Hysteresis ICCL ICCH ICCZ Quiescent Power Supply Current (4) VCC = Max., VO = GND(3) — VCC = Max. VIN = GND or VCC NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC–0.6V at rated current. 3 74FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Test Conditions(1) Min. Typ.(2) Max. Unit — 2 30 µA VIN = VCC VIN = GND — 50 75 µA/ MHz VCC = Max.,Outputs Open fI = 10MHz 50% Duty Cycle VIN = VCC VIN = GND — 0.5 0.7 mA xOE1 = xOE2 = GND One Bit Toggling VIN = VCC - 0.6V VIN = GND — 0.5 0.8 VCC = Max.,Outputs Open VIN = VCC — 2.5 3.7(5) fI = 2.5MHz 50% Duty Cycle VIN = GND xOE1 = xOE2 = GND VIN = VCC - 0.6V — 2.5 4.1(5) Twenty Bits Toggling VIN = GND Symbol Parameter ΔICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = VCC - 0.6V(3) ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open xOE1 = xOE2 = GND One Input Togging 50% Duty Cycle Total Power Supply Current(6) IC NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input. All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ΔICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 4 74FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1) Symbol Parameter Condition(2) tPLH tPHL Propagation Delay xAx to xYx CL = 50pF RL = 500Ω CL = 300pF(4) RL = 500Ω CL = 50pF RL = 500Ω CL = 300pF(4) RL = 500Ω CL = 5pF(4) RL = 500Ω CL = 50pF RL = 500Ω tPZH tPZL tPHZ tPLZ tSK(o) Output Enable Time xOEx to xYx Output Disable Time xOEx to xYx FCT163827A Min.(3) Max. FCT163827C Min.(3) Max. 1.5 8 1.5 4.4 1.5 15 1.5 10 1.5 12 1.5 7 1.5 23 1.5 14 1.5 9 1.5 5.7 1.5 10 1.5 6 — 0.5 — 0.5 Unit ns ns ns Output Skew(3) ns NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 4. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 5 74FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS V CC 500Ω SWITCH POSITION 6v Open GND V OUT VIN Pulse Generator D.U.T. 50pF RT 500Ω Test Switch Open Drain Disable Low Enable Low 6V Disable High Enable High GND All Other Tests Open DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. CL Test Circuits for All Outputs DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM tSU 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW HIGH-LOW-HIGH PULSE 1.5V 3V 1.5V 0V tH Pulse Width Set-up, Hold, and Release Times ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION Propagation Delay tPHL 3V 1.5V 0V VOH 1.5V VOL DISABLE 3V CONTROL INPUT tPZL OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH 6V tPLZ 3V 1.5V tPZH OUTPUT NORMALLY HIGH SWITCH GND 1.5V 0V 3V 0.3V VOL tPHZ 0.3V 1.5V 0V VOH 0V Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 3. if VCC is below 3V, input voltage swings should be adjusted not to exceed VCC. 6 74FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION XX FCT XXX Temp. Range Family XXXX Device Type X Package X X Blank 8 Tube Tape and Reel G Green PA Thin Shrink Small Outline Package (PAG56) 827A 827C Non-Inverting 20-Bit Buffer 163 Double-Density 3.3Volt 74 − 40°C to +85°C Orderable Part Information Speed (ns) A C Pkg. Code Pkg. Type Temp. Grade 74FCT163827APAG PAG56 TSSOP I 74FCT163827APAG8 PAG56 TSSOP I 74FCT163827CPAG PAG56 TSSOP I 74FCT163827CPAG8 PAG56 TSSOP I Orderable Part ID Datasheet Document History 09/28/2009 05/10/2018 Pg. 7 Pg. 1, 2, 5, 7 05/06/2019 Pg. 7 Updated the ordering information by removing the "IDT" notation and non RoHS part. Added table under pin configuration diagram with detailed package information. Updated the ordering information diagram adding Tube, Tape and Reel. Added orderable part information table. Corrected package count in ordering information diagram. CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 7 for Tech Support: logichelp@idt.com IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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