74LVCH16646APAG

IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER INDUSTRIAL TEMPERATURE RANGE IDT74LVCH16646A 3.3V CMOS 16-BIT BUS NOT RECOMMENDED TRANSCEIVER/REGISTER FOR NEW DESIGNS WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: DESCRIPTION: • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range μ W typ. static) • CMOS power levels (0.4μ • All inputs, outputs, and I/O are 5V tolerant • Supports hot insertion • Available in TSSOP package The LVCH16646A 16-bit bus transceiver and register is built using advanced dual metal CMOS technology. This high-speed, low power device is organized as two independent 8-bit D-type transceivers with 3state D-type registers.The controls circuitry is organized for multiplexed transmission of data between A bus and B bus either directly or from the internal storage registers. Each 8-bit transceiver/register features direction control (DIR), over-riding Output Enable control (OE) and Select lines (SAB and SBA) to select either real- time data or stored data. Separate clock inputs are provided for A and B port registers. Data on the A or B data bus, or both, can be stored in the internal registers by the low-to-high transitions at the appropriate clock pins. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. The LVCH16646A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The LVCH16646A has “bus-hold” which retains the inputs’ last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. DRIVE FEATURES: • High Output Drivers: ±24mA • Reduced system switching noise APPLICATIONS: • 5V and 3.3V mixed voltage systems • Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM 29 56 2OE 1OE 1DIR 1 1CLKBA 2CLKBA 54 1SBA 2SBA 2 1CLKAB 2CLKAB 3 1SAB 28 2DIR 55 2SAB 30 31 27 26 1D 1D One of Eight Channels 1A1 C1 5 One of Eight Channels 52 1B1 2A1 C1 15 42 2B1 1D 1D C1 C1 TO SEVEN OTHER CHANNELS TO SEVEN OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 1 JANUARY 2016 DSC-3787/5 IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Symbol 1DIR 1 56 1OE 1CLKAB 2 55 1CLKBA 1SAB 3 54 1SBA GND 4 53 GND 1A1 5 52 1B1 51 1B2 1A2 6 VCC 7 50 VCC 1A3 8 49 1B3 1A4 9 48 1B4 1A5 10 47 1B5 GND 11 46 GND 1A6 12 45 1B6 1A7 13 44 1B7 1A8 14 43 1B8 2A1 15 42 2B1 16 41 2B2 17 40 GND 18 39 2B3 GND 2A4 19 38 2B4 2A5 20 37 2B5 2A6 21 36 2B6 VCC 22 35 VCC 2A7 23 34 2B7 2A8 24 33 2B8 GND 25 32 GND 2SAB 26 31 2SBA 2CLKAB 27 30 2CLKBA 2DIR 28 29 2OE 2A2 2A3 Description Max Unit VTERM Terminal Voltage with Respect to GND –0.5 to +6.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –50 to +50 mA IIK IOK Continuous Clamp Current, VI < 0 or VO < 0 –50 mA ICC ISS Continuous Current through each VCC or GND ±100 mA NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE (TA = +25°C, F = 1.0MHz) Parameter(1) Symbol Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 4.5 6 pF COUT Output Capacitance VOUT = 0V 6.5 8 pF CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF NOTE: 1. As applicable to the device type. PIN DESCRIPTION Pin Names xAx Description Data Register A Inputs(1) Data Register B Outputs xBx Data Register B Inputs(1) Data Register A Outputs xCLKAB, xCLKBA xSAB, xSBA Clock Pulse Inputs Output Data Source Select Inputs xOE Output Enable Inputs xDIR Direction Control Inputs NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os. TSSOP TOP VIEW 2 IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER INDUSTRIAL TEMPERATURE RANGE FUNCTION TABLE(1) Inputs Data I/O (2) xOE xDIR xCLKAB xCLKBA xSAB xSBA xAx xBx Operation or Function X X ↑ X X X Input Unspecified Store A, B unspecified(2) X X X ↑ X X Unspecified Input Store B, A unspecified(2) H X ↑ ↑ X X Input Input Store A and B data H X H or L H or L X X Input Input Isolation, hold storage L L X X X L Output Input Real time B data to A bus L L X H or L X H Output Input Stored B data to A bus L H X X L X Input Output Real time A data to B bus L H H or L X H X Input Output Stored A data to B bus NOTES: 1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level ↑ = LOW-to-HIGH transition 2. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition of the clock inputs. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = –40°C to +85°C Symbol VIH VIL Min. Typ.(1) Max. Unit VCC = 2.3V to 2.7V 1.7 — — V VCC = 2.7V to 3.6V 2 — — VCC = 2.3V to 2.7V — — 0.7 VCC = 2.7V to 3.6V — — 0.8 Parameter Input HIGH Voltage Level Input LOW Voltage Level Test Conditions V Input Leakage Current VCC = 3.6V VI = 0 to 5.5V — — ±5 μA IOZH High Impedance Output Current VCC = 3.6V VO = 0 to 5.5V — — ±10 μA IOZL (3-State Output pins) IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 5.5V — — ±50 μA VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V VH ICCL ICCH ICCZ ΔICC Input Hysteresis Quiescent Power Supply Current VCC = 3.3V VCC = 3.6V VIN = GND or VCC — — 100 — — 10 mV μA 3.6 ≤ VIN ≤ 5.5V(2) One input at VCC - 0.6V, other inputs at VCC or GND — — — — 10 500 μA IIH IIL Quiescent Power Supply Current Variation NOTES: 1. Typical values are at VCC = 3.3V, +25°C ambient. 2. This applies in the disabled state only. 3 IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER BUS A xDIR L xOE L INDUSTRIAL TEMPERATURE RANGE BUS A BUS B xCLKAB X xCLKBA X xSAB X xSBA L xDIR H xOE L xDIR X X X xOE X X H xCLKBA X   xCLKBA X BUS A BUS B xCLKAB  X  xCLKAB X xSAB L xSBA X Real-Time Transfer Bus A to B Real-Time Transfer Bus B to A BUS A BUS B xSAB X X X xSBA X X X xDIR L H Storage from A, B, or A and B BUS B xOE L L xCLKAB X H or L xCLKBA H or L X Transfer Stored Data to A and/or B 4 xSAB X H xSBA H X IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER INDUSTRIAL TEMPERATURE RANGE BUS-HOLD CHARACTERISTICS Symbol IBHH Parameter(1) Bus-Hold Input Sustain Current VCC = 3V Bus-Hold Input Sustain Current VCC = 2.3V IBHL IBHHO Typ.(2) Max. Unit – 75 — — μA VI = 0.8V 75 — — VI = 1.7V — — — VI = 0.7V — — — VI = 0 to 3.6V — — ±500 VI = 2V IBHL IBHH Min. Test Conditions Bus-Hold Input Overdrive Current VCC = 3.6V μA μA IBHLO NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25°C ambient. OUTPUT DRIVE CHARACTERISTICS Symbol VOH VOL Test Conditions(1) Parameter Output HIGH Voltage Output LOW Voltage Min. Max. Unit V VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 — VCC = 2.3V IOH = – 6mA 2 — VCC = 2.3V IOH = – 12mA 1.7 — VCC = 2.7V 2.2 — VCC = 3V 2.4 — VCC = 3V IOH = – 24mA 2 — VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 VCC = 2.3V IOL = 6mA — 0.4 IOL = 12mA — 0.7 VCC = 2.7V IOL = 12mA — 0.4 VCC = 3V IOL = 24mA — 0.55 V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = – 40°C to + 85°C. OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C Symbol Parameter CPD Power Dissipation Capacitance per Transceiver Outputs enabled CPD Power Dissipation Capacitance per Transceiver Outputs disabled Test Conditions Typical Unit CL = 0pF, f = 10Mhz 60 pF 12 5 IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS(1) VCC = 2.7V Symbol Parameter fMAX tPLH Propagation Delay tPHL xAx to xBx or xBx to xAx tPLH Propagation Delay tPHL xCLKBA or xCLKAB to xAx or xBx tPLH Propagation Delay tPHL xSBA or xSAB to xAx or xBx tPZH Output Enable Time tPZL xOE to xAx or Bx tPZH Output Enable Time tPZL xDIR to xAx or Bx tPHZ Output Disable Time tPLZ xOE to xAx or Bx tPHZ Output Disable Time tPLZ xDIR to xAx or Bx tSU Set-up Time VCC = 3.3V ± 0.3V Min. Max. Min. Max. Unit 150 — 150 — MHz — 6.8 1.3 5.7 ns — 7.9 1.8 6.7 ns — 9.2 1.7 7.7 ns — 8.5 1.3 6.9 ns — 8.5 1.4 7.2 ns — 7.7 2.1 6.9 ns — 7.8 2 7 ns 3.2 — 2.9 — ns 0 — 0.3 — ns xAx or xBx before CLKAB↑ or CLKBA↑ tH Hold Time xAx or xBx after CLKAB↑ or CLKBA↑ tW tSK(o) Pulse Duration, CLK HIGH or LOW 3.3 — 3.3 — ns Output Skew(2) — — — 500 ps NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. 6 IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS Symbol VCC(1)= 3.3V±0.3V VCC(1)= 2.7V VCC(2)= 2.5V±0.2V Unit VLOAD 6 6 2 x Vcc V VIH 2.7 2.7 Vcc V VT 1.5 1.5 Vcc / 2 V VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 pF VIN tPLH tPHL VIH VT 0V LVC Link Propagation Delay DISABLE ENABLE VIH VT 0V CONTROL INPUT tPZL GND VOUT OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH D.U.T. 500 RT tPHL OPPOSITE PHASE INPUT TRANSITION Open 500 tPLH OUTPUT VLOAD VCC Pulse (1, 2) Generator VIH VT 0V VOH VT VOL SAME PHASE INPUT TRANSITION CL tPLZ VLOAD/2 VT VLOAD/2 VLZ VOL tPHZ VOH VHZ 0V VT 0V LVC Link LVC Link Test Circuit for All Outputs Enable and Disable Times NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns. DATA INPUT SWITCH POSITION Test Switch TIMING INPUT Open Drain Disable Low Enable Low VLOAD ASYNCHRONOUS CONTROL Disable High Enable High GND SYNCHRONOUS CONTROL All Other Tests Open INPUT OUTPUT 1 tPLH1 tSK (x) tSK (x) tPLH2 tREM tSU tH LOW-HIGH-LOW PULSE VOH VT VOL LVC Link VT tW HIGH-LOW-HIGH PULSE VOH VT VOL OUTPUT 2 tH Set-up, Hold, and Release Times VIH VT 0V tPHL1 tSU VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V VT LVC Link Pulse Width tPHL2 tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 LVC Link Output Skew - tSK(X) NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 7 IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION X LVC XX Bus-Hold Temp. Range XX Family XX XXXX Device Type Package X Blank 8 Tube or Tray Tape and Reel PAG Thin Shrink Small Outline Package - Green 646A 16-Bit Bus Transceiver/Register with 3-State Outputs and 5 Volt Tolerant I/O 16 Double-Density, ±24mA H Bus-hold 74 -40°C to +85°C DATASHEET DOCUMENT HISTORY 01/28/2016 Pg. 1, 2, 8 Updated the ordering information by removing IDT notation, non RoHS parts and adding Tape and Reel information. 8 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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