91305AMILF

DATASHEET ICS91305I HIGH PERFORMANCE COMMUNICATION BUFFER Description Features The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds from 10 to 133 MHz. • • • • Zero input - output delay ICS91305I is a zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than +/- 350 pS, the part acts as a zero delay buffer. • • • • Less than 200 ps Jitter between outputs The ICS91305I comes in an eight pin 150 mil SOIC package. It has five output clocks. In the absence of REF input, will be in the power down mode. In this mode, the PLL is turned off and the output buffers are pulled low. Power down mode provides the lowest power consumption for a standby condition. • 3.3V ±10% operation • Supports industrial temperature range -40°C to 85°C Frequency range 10 - 133 MHz (3.3V) 5V tolerant input REF High loop filter bandwidth ideal for Spread Spectrum applications Skew controlled outputs Skew less than 250 ps between outputs Available in 8 pin 150 mil SOIC & 173 mil TSSOP packages Block Diagram IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 1 ICS91305I REV G 090612 ICS91305I HIGH PERFORMANCE COMMUNICATION BUFFER Pin Configuration Pin Descriptions IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 2 ICS91305I REV G 090612 ICS91305I HIGH PERFORMANCE COMMUNICATION BUFFER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS91305I. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Electrical Characteristics at 3.3V DC Characteristics PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS 0.8 V Input Low Voltage VIL Input High Voltage VIH Input Low Current IIL VIN=0V 19 100.0 µA Input High Current IIH VIN=VDD 0.10 250.0 µA IOL = 12mA 0.25 0.4 V 2.0 V Output Low Voltage1 VOL Output High Voltage1 VOH IOH = -12mA Power Down Supply Current IDD REF = 0 MHz 0.3 100.0 µA Supply Current IDD Unloaded oututs at 66.66 MHz SEL inputs at VDD or GND 30.0 80.0 mA 2.4 2.9 V Notes: 1.Guaranteed by design and characterization. Not subject to 100% test. 2.All Skew specifications are mesured with a 50Ω transmission line, load teminated with 50Ω to 1.4V. 3.Duty cycle measured at 1.4V. 4.Skew measured at 1.4V on rising edges. Loading must be equal on outputs. IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 3 ICS91305I REV G 090612 ICS91305I HIGH PERFORMANCE COMMUNICATION BUFFER Switching Characteristics PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS Output period t1 With CL=30pF 100.00 (10) 7.5 (133) ns (MHz) Input period t1 With CL=30pF 100.00 (10) 7.5 (133) ns (MHz) Duty Cycle1 Dt1 Measured at 1.4V; CL=30pF Duty Cycle1 Dt2 Measured at VDD/2 Fout