EL5120TIWTZ-T7

12MHz Rail-to-Rail Input-Output Operational Amplifier EL5120T Features The EL5120T is a high voltage rail-to-rail input-output amplifier with low power consumption. The EL5120T is a single amplifier that exhibits beyond the rail input capability, rail-to-rail output capability, and is unity gain stable. • 750µA supply current The operating voltage range is from 4.5V to 19V. It can be configured for single or dual supply operation, and typically consumes only 750µA. The EL5120T has an output short circuit capability of ±200mA and a continuous output current capability of ±70mA. The EL5120T features a slew rate of 12V/µs. Also, the device provides common mode input capability beyond the supply rails, rail-to-rail output capability, and a bandwidth of 12MHz (-3dB). This enables the amplifier to offer maximum dynamic range at any supply voltage. These features make the EL5120T an ideal amplifier solution for use in TFT-LCD panels as a VCOM or static gamma buffer, and in high speed filtering and signal conditioning applications. Other applications include battery power and portable devices, especially where low power consumption is important. The EL5120T is available in small 5 Ld TSOT package. It features a standard operational amplifier pinout. The device operates over an ambient temperature range of -40°C to +125°C. • 12MHz (-3dB) bandwidth • 4.5V to 19V maximum supply voltage range • 12V/µs slew rate • ±70mA continuous output current • ±200mA output short circuit current • Unity-gain stable • Beyond the rails input capability • Rail-to-rail output swing • Built-in thermal protection • -40°C to +125°C ambient temperature range • Pb-free (RoHS compliant) Applications • TFT-LCD panel - tablet, monitor, notebook - VCOM amplifier, static gamma buffer, panel repair • Electronic notebooks, games • Touch-screen displays • Personal communication devices, digital assistants (PDA) • Portable instrumentation • Sampling ADC amplifiers • Wireless LANs • Office automation • Active filters • ADC/DAC buffer FIGURE 1. TYPICAL TFT-LCD VCOM APPLICATION September 26, 2013 FN6895.1 1 FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS RL CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2012, 2013. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. EL5120T Pin Configuration EL5120T (5 LD TSOT) TOP VIEW Pin Descriptions PIN NUMBER PIN NAME EQUIVALENT CIRCUIT 1 VOUT 2 VS- 3 VIN+ Amplifier non-inverting input (Reference “CIRCUIT 2”) 4 VIN- Amplifier inverting input (Reference “CIRCUIT 2”) 5 VS+ Positive power supply FUNCTION Amplifier output (Reference “CIRCUIT 1”) Negative power supply Ordering Information PART NUMBER (Notes 2, 3) PART MARKING EL5120TIWTZ-T7 (Note 1) BESA PACKAGE (Pb-Free) 5 Ld TSOT PKG. DWG. # MDP0049 NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for EL5120T. For more information on MSL please see techbrief TB363. 2 FN6895.1 September 26, 2013 EL5120T Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage between VS+ and VS-. . . . . . . . . . . . . . . . . . . . . . . . . +19.8V Input Voltage Range (VIN+, VIN-). . . . . . . . . . . . . . . . . . . . . VS- - 0.5V, VS+ + 0.5V Input Differential Voltage (VIN+ - VIN-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VS+ + 0.5V)-(VS- - 0.5V) Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . ±70mA ESD Rating Human Body Model (Tested per JESD22-A114) . . . . . . . . . . . . . . . 4000V Machine Model (Tested per JESD22-A115). . . . . . . . . . . . . . . . . . . . 300V Charged Device Model (Tested per JESD22-C101). . . . . . . . . . . . . 2000V Latch Up (Tested per JESD78; Class II, Level A) . . . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) JA (°C/W) JC (°C/W) 5 Ld TSOT (Notes 4, 5) 215 290 Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature . . . . . . . . . . . . . . . . . . . .-40°C to +125°C Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figures 30 and 31 CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. For JC, the “case temp” location is taken at the package top center. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VS+ = +5V, VS- = -5V, RL = 10k to 0V, TA = +25°C, unless otherwise specified. DESCRIPTION CONDITIONS MIN (Note 9) TYP MAX (Note 9) UNIT 5 18 mV INPUT CHARACTERISTICS VOS TCVOS Input Offset Voltage VCM = 0V Average Offset Voltage Drift (Note 6) 5 VCM = 0V 2 µV/°C IB Input Bias Current RIN Input Impedance 1 G CIN Input Capacitance 2 pF -5.5 50 CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio For VIN from -5.5V to +5.5V 50 75 dB AVOL Open Loop Gain -4.5V 75 105 dB VOUT 4.5V +5.5 nA V OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -5mA -4.94 VOH Output Swing High IL = +5mA ISC Short Circuit Current VCM = 0V, Source: VOUT short to VS-, Sink: VOUT short to VS+ IOUT Output Current 4.85 -4.85 V 4.94 V ±200 mA ±70 mA POWER SUPPLY PERFORMANCE (VS+) - (VS-) IS PSRR Supply Voltage Range 4.5 Supply Current VCM = 0V, No load Power Supply Rejection Ratio Supply is moved from ±2.25V to ±9.5V 750 60 19 V 950 µA 75 dB 12 V/µs DYNAMIC PERFORMANCE SR Slew Rate (Note 7) -4.0V tS Settling to +0.1% (Note 8) AV = +1, VOUT = 2V step, RL = 10k , CL = 8pF 500 ns -3dB Bandwidth RL = 10k , CL = 8pF 12 MHz BW 3 VOUT 4.0V, 20% to 80% FN6895.1 September 26, 2013 EL5120T Electrical Specifications PARAMETER GBWP PM VS+ = +5V, VS- = -5V, RL = 10k to 0V, TA = +25°C, unless otherwise specified. (Continued) DESCRIPTION CONDITIONS MIN (Note 9) TYP MAX (Note 9) UNIT Gain-Bandwidth Product AV = -50, RF = 5k RG = 100 RL = 10k , CL = 8pF 8 MHz Phase Margin AV = -50, RF = 5k RG = 100 RL = 10k , CL = 8pF 50 ° Electrical Specifications PARAMETER VS+ = +5V, VS- = 0V, RL = 10k to 2.5V, TA = +25°C, unless otherwise specified. DESCRIPTION CONDITIONS MIN (Note 9) TYP MAX (Note 9) UNIT 5 18 mV INPUT CHARACTERISTICS VOS TCVOS Input Offset Voltage VCM = 2.5V Average Offset Voltage Drift (Note 6) 5 VCM = 2.5V 2 µV/°C IB Input Bias Current RIN Input Impedance 1 G CIN Input Capacitance 2 pF -0.5 50 CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio For VIN from -0.5V to +5.5V 45 70 dB AVOL Open Loop Gain 0.5V 75 105 dB VOUx 4.5V +5.5 nA V OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -2.5mA 30 VOH Output Swing High IL = +2.5mA ISC Short Circuit Current VCM = 2.5V, Source: VOUT short to VS-, Sink: VOUT short to VS+ IOUT Output Current 4.85 150 mV 4.97 V ±125 mA ±70 mA POWER SUPPLY PERFORMANCE (VS+) - (VS-) IS PSRR Supply Voltage Range 4.5 Supply Current VCM = 2.5V, No load Power Supply Rejection Ratio Supply is moved from 4.5V to 19V 750 60 19 V 950 µA 75 dB 12 V/µs DYNAMIC PERFORMANCE SR Slew Rate (Note 7) 1V tS Settling to +0.1% (Note 8) AV = +1, VOUT = 2V step, RL = 10k , CL = 8pF 500 ns -3dB Bandwidth RL = 10k , CL = 8pF 12 MHz Gain-Bandwidth Product AV = -50, RF = 5k RG = 100 RL = 10k , CL = 8pF 8 MHz Phase Margin AV = -50, RF = 5k RG = 100 RL = 10k , CL = 8pF 50 ° BW GBWP PM 4 VOUT 4V, 20% to 80% FN6895.1 September 26, 2013 EL5120T Electrical Specifications PARAMETER VS+ = +18V, VS- = 0V, RL = 10k to 9V, TA = +25°C, unless otherwise specified. DESCRIPTION CONDITIONS MIN (Note 9) TYP MAX (Note 9) UNIT 6 18 mV INPUT CHARACTERISTICS VOS TCVOS Input Offset Voltage VCM = 9V Average Offset Voltage Drift (Note 6) 6 VCM = 9V 2 µV/°C IB Input Bias Current RIN Input Impedance 1 G CIN Input Capacitance 2 pF -0.5 50 CMIR Common-Mode Input Range CMRR Common-Mode Rejection Ratio For VIN from -0.5V to +18.5V 53 78 dB AVOL Open Loop Gain 0.5V 75 90 dB VOUT 17.5V +18.5 nA V OUTPUT CHARACTERISTICS VOL Output Swing Low IL = -9mA 120 VOH Output Swing High IL = +9mA ISC Short Circuit Current VCM = 9V, Source: VOUT short to VS-, Sink: VOUT short to VS+ IOUT Output Current 17.85 150 mV 17.88 V ±200 mA ±70 mA POWER SUPPLY PERFORMANCE (VS+) - (VS-) IS PSRR Supply Voltage Range 4.5 Supply Current VCM = 9V, No load Power Supply Rejection Ratio Supply is moved from 4.5V to 19V 900 60 19 V 1100 µA 75 dB 12 V/µs DYNAMIC PERFORMANCE SR Slew Rate (Note 7) 1V tS Settling to +0.1% (Note 8) AV = +1, VOUT = 2V step, RL = 10k , CL = 8pF 500 ns -3dB Bandwidth RL = 10k , CL = 8pF 12 MHz Gain-Bandwidth Product AV = -50, RF = 5k RG = 100 RL = 10k , CL = 8pF 8 MHz Phase Margin AV = -50, RF = 5k RG = 100 RL = 10k , CL = 8pF 50 ° BW GBWP PM VOUT 17V, 20% to 80% NOTES: 6. Measured over -40°C to +85°C ambient operating temperature range. See the typical TCVOS production distribution shown in the “Typical Performance Curves” on page 6. 7. Typical slew rate is an average of the slew rates measured on the rising (20% to 80%) and the falling (80% to 20%) edges of the output signal. 8. Settling time measured as the time from when the output level crosses the final value on rising/falling edge to when the output level settles within a ±0.1% error band. The range of the error band is determined by: Final Value(V)±[Full Scale(V)*0.1%] 9. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 5 FN6895.1 September 26, 2013 EL5120T Typical Performance Curves FIGURE 3. INPUT OFFSET VOLTAGE DISTRIBUTION FIGURE 4. INPUT OFFSET VOLTAGE DRIFT (TSOT) FIGURE 5. INPUT OFFSET VOLTAGE vs TEMPERATURE FIGURE 6. INPUT BIAS CURRENT vs TEMPERATURE FIGURE 7. OUTPUT HIGH VOLTAGE vs TEMPERATURE FIGURE 8. OUTPUT LOW VOLTAGE vs TEMPERATURE 6 FN6895.1 September 26, 2013 EL5120T Typical Performance Curves (Continued) FIGURE 9. OPEN-LOOP GAIN vs TEMPERATURE FIGURE 10. SLEW RATE vs TEMPERATURE FIGURE 11. SUPPLY CURRENT vs TEMPERATURE FIGURE 12. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 13. SLEW RATE vs SUPPLY VOLTAGE FIGURE 14. OPEN LOOP GAIN AND PHASE vs FREQUENCY 7 FN6895.1 September 26, 2013 EL5120T Typical Performance Curves (Continued) FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS RL FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS CL FIGURE 17. CLOSED LOOP OUTPUT IMPEDANCE vs FREQUENCY FIGURE 18. MAXIMUM OUTPUT SWING vs FREQUENCY FIGURE 19. CMRR vs FREQUENCY FIGURE 20. PSRR vs FREQUENCY 8 FN6895.1 September 26, 2013 EL5120T Typical Performance Curves (Continued) FIGURE 21. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY FIGURE 23. SMALL SIGNAL OVERSHOOT vs LOAD CAPACITANCE FIGURE 25. LARGE SIGNAL TRANSIENT RESPONSE 9 FIGURE 22. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY FIGURE 24. STEP SIZE vs SETTLING TIME FIGURE 26. SMALL SIGNAL TRANSIENT RESPONSE FN6895.1 September 26, 2013 EL5120T FIGURE 27. BASIC TEST CIRCUIT 10 FN6895.1 September 26, 2013 EL5120T Applications Information Product Description The EL5120T is a high voltage rail-to-rail input-output amplifier with low power consumption. The EL5120T is a single amplifier which exhibits beyond the rail input capability, rail-to-rail output capability, and is unity gain stable. The EL5120T features a slew rate of 12V/µs. Also, the device provides common mode input capability beyond the supply rails, rail-to-rail output capability, and a bandwidth of 12MHz (-3dB). This enables the amplifier to offer maximum dynamic range at any supply voltage. Operating Voltage, Input and Output Capability FIGURE 28. OPERATION WITH BEYOND-THE-RAILS INPUT The EL5120T can operate on a single supply or dual supply configuration. The EL5120T operating voltage ranges from a minimum of 4.5V to a maximum of 19V. This range allows for a standard 5V (or ±2.5V) supply voltage to dip to -10%, or a standard 18V (or ±9V) to rise by +5.5% without affecting performance or reliability. The input common-mode voltage range of the EL5120T extends 500mV beyond the supply rails. Also, the EL5120T is immune to phase reversal. However, if the common mode input voltage exceeds the supply voltage by more than 0.5V, electrostatic protection diodes in the input stage of the device begin to conduct. Even though phase reversal will not occur, to maintain optimal reliability it is suggested to avoid input overvoltage conditions. Figure 28 shows the input voltage driven 500mV beyond the supply rails and the device output swinging between the supply rails. The EL5120T output typically swings to within 50mV of positive and negative supply rails with load currents of ±5mA. Decreasing load currents will extend the output voltage range even closer to the supply rails. Figure 29 shows the input and output waveforms for the device in a unity-gain configuration. Operation is from ±5V supply with a 10k load connected to GND. The input is a 10VP-P sinusoid and the output voltage is approximately 9.9VP-P. Refer to the “Electrical Specifications” table beginning on page 3 for specific device parameters. Parameter variations with operating voltage, loading and/or temperature are shown in the “Typical Performance Curves” beginning on page 6. FIGURE 29. OPERATION WITH RAIL-TO-RAIL INPUT AND OUTPUT Output Current The EL5120T is capable of output short circuit currents of 200mA (source and sink), and the device has built-in protection circuitry, which limits the output current to ±200mA (typical). To maintain maximum reliability, the continuous output current should never exceed ±70mA. This ±70mA limit is determined by the characteristics of the internal metal interconnects. Also, see “Power Dissipation” on page 12 for detailed information on ensuring proper device operation and reliability for temperature and load conditions. Thermal Shutdown The EL5120T has a built-in thermal protection, which ensures safe operation and prevents internal damage to the device due to overheating. When the die temperature reaches +165°C (typical), the device automatically shuts OFF the outputs by putting them in a high impedance state. When the die cools by +15°C (typical), the device automatically turns ON the outputs by putting them in a low impedance (normal) operating state. 11 FN6895.1 September 26, 2013 EL5120T Driving Capacitive Loads • VOUT = Output voltage Purely capacitive loads on the EL5120T should not exceed 1nF without appropriate output load isolation or amplifier compensation techniques. • ILOAD = Load current As load capacitance increases, the -3dB bandwidth will decrease and peaking can occur. Depending on the application, it may be necessary to reduce peaking and to improve device stability. To improve device stability, a snubber circuit (compensation) or a series resistor (isolation) may be added to the output of the EL5120T. Device overheating can be avoided by calculating the minimum resistive load condition, RLOAD, resulting in the highest power dissipation. To find RLOAD set the two PDMAX equations equal to each other and solve for VOUT/ILOAD. Reference the package power dissipation curves, Figures 30 and 31, for further information. A snubber is a shunt load consisting of a resistor in series with a capacitor. An optimized snubber can improve the phase margin and the stability of the EL5120T. The advantage of a snubber circuit is that it does not draw any DC load current or reduce the gain. Another method to reduce peaking is to add a series output resistor (typically between 1 to 10 ). Depending on the capacitive loading, a small value resistor may be the most appropriate choice to minimize any reduction in gain. Power Dissipation With the high-output drive capability of the EL5120T amplifier, it is possible to exceed the +150°C absolute maximum junction temperature under certain load current conditions. It is important to calculate the maximum power dissipation of the EL5120T in the application. Proper load conditions will ensure that the EL5120T junction temperature stays within a safe operating region. FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE The maximum power dissipation allowed in a package is determined according to Equation 1: (EQ. 1) where: • TJMAX = Maximum junction temperature • TAMAX = Maximum ambient temperature • JA = Thermal resistance of the package • PDMAX = Maximum power dissipation allowed The total power dissipation produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power dissipation in the IC due to the load, or: (EQ. 2) when sourcing, and: FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE (EQ. 3) when sinking, where: • VS = Total supply voltage (VS+ - VS-) • VS+ = Positive supply voltage • VS- = Negative supply voltage • ISMAX = Maximum supply current (ISMAX = EL5120T quiescent current) 12 FN6895.1 September 26, 2013 EL5120T Power Supply Bypassing and Printed Circuit Board Layout The EL5120T can provide gain at high frequency, so good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, trace lengths should be as short as possible and the power supply pins must be well bypassed to reduce any risk of oscillation. For normal single supply operation (the VS- pin is connected to ground) a 4.7µF capacitor should be placed from VS+ to ground, then a parallel 0.1µF capacitor should be connected as close to the amplifier as possible. One 4.7µF capacitor may be used for multiple devices. For dual supply operation the same capacitor combination should be placed at each supply pin to ground. Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION CHANGE September 26, 2013 FN6895.1 Features on page 1: Updated operation temperature range from ” -40°C to +85°C” to “-40°C to +125°C”. Thermal Information table on page 3 under Ambient operation temperature changed the temperature range from “-40°C to +85°C” to “-40°C to +125°C”. Updated Figure 30, “PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE,” on page 12 and Figure 31, “PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE,” on page 12. September 27, 2012 FN6895.0 Initial release. About Intersil Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management semiconductors. The company's products address some of the largest markets within the industrial and infrastructure, personal computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/en/support/ask-an-expert.html. Reliability reports are also available from our website at http://www.intersil.com/en/support/qualandreliability.html#reliability For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 FN6895.1 September 26, 2013 EL5120T TSOT Package Family 14 FN6895.1 September 26, 2013