HA16174P

HA16174P/FP Power Factor Correction Controller IC REJ03D0789-0100 Rev.1.00 Jan 06, 2006 Description The HA16174P/FP is a power-factor correction (PFC) controller IC. This IC adopts continuous conduction mode as PFC operation. Various functions such as over voltage detection, over current detection, soft start, feedback-loop disconnection detection, Power Good signal output, and holding function of PFC operation through momentary outage (PFC hold function) are incorporated in a single chip. This eliminates a significant amount of external circuitry. The PFC function enables the continuation of PFC operation for a specified period when a momentary outage occurs, so that quick recovery after a sufficiently momentary outage is achieved*. The continuance time can be adjusted by an external capacitance. The PFC output voltage is monitored by checking the Power Good signal. When the power-factor correction is “good,” the Power Good signal is output after a delay time to secure stabilization of the PFC output voltage; when the power factor correction is not good, the output is stopped immediately. The delay time and power good stop level are adjustable by using an external circuit. PFC operation can be turned on and off by an external control signal. By using this function, PFC operation can be disabled at low input voltage, allowing remote control from the secondary side. A soft-start control pin provides for the easy adjustment of soft-start operation, and can be used to prevent overshooting of the output voltage. *: For details on the PFC hold function, refer to page 19. Features • Maximum ratings  Power-supply voltage Vcc: 24 V  Operating junction temperature Tjopr: –40 to 125°C • Electrical characteristics  VREF output voltage VREF: 5.0 V ± 3%  UVLO operation start voltage VH: 10.5 ± 0.7 V  UVLO operation stop voltage VL: 9.0 ± 0.5 V  PFC output maximum ON duty Dmax-out: 95% (typ.) • Functions  Continuous conduction mode  Hold function of PFC operation on momentary outage (PFC hold function)  Over voltage detection  Over current detection  Soft start  Feedback loop disconnection detection  Power Good signal output (open-drain output)  PFC function on/off control  Package lineup: SOP-16 and DILP-16 Rev.1.00 Jan 06, 2006 page 1 of 36 HA16174P/FP Pin Arrangement OUT GND DELAY PGADJ PFC-ON VREF CAO CS 1 2 3 4 5 6 7 8 (Top view) 16 15 14 13 12 11 10 9 VCC SS EO FB IAC PG CT RT Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name OUT GND DELAY PGADJ PFC-ON VREF CAO CS RT CT PG IAC FB EO SS VCC I/O Output — Input/Output Input Input Output Output Input/Output Input/Output Output Output Input Input Output Output Input Function Power MOS FET gate driver output Ground PG start up delay time and hold time adjust and IC shut down PG off threshold voltage input PFC function on/off signal input Reference voltage output Current control error amplifier output Current sense signal input Timing resistor for operational frequency adjust Timing capacitor for operational frequency adjust Power good signal output (open drain output) Multiplier reference current input Voltage control error amplifier input Voltage control error amplifier output Timing capacitor for soft start time adjust Power supply voltage input Rev.1.00 Jan 06, 2006 page 2 of 36 HA16174P/FP Block Diagram VCC 16 5 V Internal Bias H 10.5 V VREF 5 V VREF Generator 27.5 V L UVLO 9.0 V 6 VREF In GOOD Out RT 9 CT 10 CAO 770 ns 15.4 µs 0.65 V 3.6 V PFC-DT RAMP Reset: Vcc