ICS9248BF-138LFT

ICS9248-138 Frequency Generator & Integrated Buffers for Celeron & PII/IIITM Block Diagram 2 48MHz [1:0] 24_48MHz /2 XTAL OSC PLL1 Spread Spectrum REF0 CPU DIVDER 2 SDRAM DIVDER 8 CPUCLK [1:0] SDRAM [7:0] SDRAM_F SEL24_48# Control SDATA SCLK PD# PCI DIVDER IOAPIC 7 PCICLK [6:0] Config. Reg. 0342C—08/26/03 IOAPIC DIVDER Logic FS[4:0] *SEL24_48#/REF0 VDDREF X1 X2 GNDREF GND3V66 3V66-0 3V66-1 3V66-2 VDD3V66 VDDPCI 1 *FS0/PCICLK0 1 **FS1/PCICLK1 GNDPCI PCICLK2 PCICLK3 PCICLK4 VDDPCI PCICLK5 PCICLK6 GNDPCI PD# SCLK SDATA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VDDLAPIC 1 IOAPIC VDDLCPU CPUCLK0 CPUCLK1 GNDLCPU GNDSDR SDRAM0 SDRAM1 SDRAM2 VDDSDR SDRAM3 SDRAM4 SDRAM5 GNDSDR SDRAM6 SDRAM7 SDRAM_F VDDSDR GND48 24_48MHz/FS2** 48MHz/FS3* 1 48MHz/FS4* VDD48 48-Pin 300mil SSOP * These inputs have a 120K pull up to VDD. ** These inputs have a 120K pull down to GND. 1 These are double strength. Functionality PLL2 X1 X2 1 ICS9248-138 Pin Configuration Recommended Application: 810/810E and Solano type chipset. Output Features: • 2- CPUs @ 2.5V • 9 - SDRAM @ 3.3V, including 1 free running • 7 - PCICLK @ 3.3V • 1 - IOAPIC @ 2.5V, • 3 - 3V66MHz @ 3.3V • 2 - 48MHz, @ 3.3V fixed. • 1 - 24/48MHz, @3.3V selectable by I2C • 1 - REF @v3.3V, 14.318MHz. Features: • Up to 200MHz frequency support • Support FS0-FS4 strapping status bit for I2C read back. • Support power management: Through Power down Mode from I2C programming. • Spread spectrum for EMI control ( ± 0.25% center). • Uses external 14.318MHz crystal Skew Specifications: • CPU – CPU: