Dual and Quad Micropower Single Supply
Rail-to-Rail Input and Output (RRIO) Op Amp
ISL28278, ISL28478
Features
The ISL28278 and ISL28478 are dual and quad channel
micropower operational amplifiers optimized for single supply
operation over the 2.4V to 5.5V range. They can be operated
from one lithium cell or two Ni-Cd batteries.
• Low-power 120µA Typical Supply Current (ISL28278)
• 225µV Max Offset Voltage
• 30pA Max Input Bias Current
• 250kHz Typical Gain-bandwidth Product
These devices feature an Input Range Enhancement Circuit
(IREC) that enables them to maintain CMRR performance for
input voltages 10% above the positive supply rail and to
100mV below the negative supply. The output operation is
rail-to-rail.
• 105dB Typical PSRR
• 100dB Typical CMRR
• Single Supply Operation Down to 2.4V
• Input Capable of Swinging Above V+ and Below V(Ground Sensing)
The ISL28278 and ISL28478 draw minimal supply current
while meeting excellent DC-accuracy, AC-performance, noise,
and output drive specifications. The ISL28278 contains a
power-down enable pin that reduces the power supply current
typically to 4µA in the disabled state.
• Rail-to-rail Input and Output (RRIO)
• Enable Pin (ISL28278 Only)
• Pb-free (RoHS-compliant)
Related Literature
Applications
• AN1345: ISL2827xEVAL1Z Evaluation Board User Guide
• Battery- or Solar-powered Systems
• 4mA to 25mA Current Loops
• Handheld Consumer Products
• Medical Devices
• Thermocouple Amplifiers
• Photodiode Pre-amps
• pH Probe Amplifiers
V+
VIN
0.082µF
C3
R3
12.4k
R4
2.21k
+ U1A
1/2
ISL28x78
V+
VOUT
R1
10k
U1B+
1/2
ISL28x78
-
CF1
4.7µF
C1
0.1µF
GAIN = 425
R2
158Ω
RF1
680k
VREF
BANDPASS AMPLIFIER (0.05Hz TO 159Hz)
FIGURE 1. TYPICAL APPLICATION CIRCUIT
August 16, 2011
FN6145.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2006-2008, 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL28278, ISL28478
Pin Configurations
ISL28278
(16 LD QSOP)
TOP VIEW
ISL28478
(16 LD QSOP)
TOP VIEW
OUT_A 1
NC 2
15 V+
IN-_A 2
14 OUT_B
IN+_A 3
16 OUT_D
15 IN-_D
+
16 NC
14 IN+_D
+
13 IN-_B
V+ 4
IN+_A 5
12 IN+_B
IN+_B 5
EN_A 6
11 EN_B
IN-_B 6
V- 7
10 NC
OUT_B 7
NC 8
9 NC
NC 8
13 V12 IN+_C
+
-
IN-_A 4
+
-
+
OUT_A 3
+
NC 1
11 IN-_C
10 OUT_C
9 NC
Pin Descriptions
ISL28278
(16 LD QSOP)
ISL28478
(16 LD QSOP)
PIN NAME
EQUIVALENT
CIRCUIT
3
1
OUT_A
Circuit 3
4
2
IN-_A
Circuit 1
Amplifier A inverting input
5
3
IN+_A
Circuit 1
Amplifier A non-inverting input
15
4
V+
Circuit 4
Positive power supply
12
5
IN+_B
Circuit 1
Amplifier B non-inverting input
13
6
IN-_B
Circuit 1
Amplifier B inverting input
14
7
OUT_B
Circuit 3
Amplifier B output
1, 2, 8, 9, 10, 16
8, 9
NC
10
OUT_C
DESCRIPTION
Amplifier A output
No internal connection
Circuit 3
Amplifier C output
11
IN-_C
Circuit 1
Amplifier C inverting input
12
IN+_C
Circuit 1
Amplifier B non-inverting input
13
V-
Circuit 4
Negative power supply
14
IN+_D
Circuit 1
Amplifier D non-inverting input
15
IN-_D
Circuit 1
Amplifier D inverting input
16
OUT_D
Circuit 3
Amplifier D output
6
EN_A
Circuit 2
Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state;
Logic “0” selects the enabled state.
11
EN_B
Circuit 2
Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state;
Logic “0” selects the enabled state.
7
V+
V+
IN-
V+
LOGIC
PIN
IN+
V-
VCIRCUIT 2
2
CAPACITIVELY
COUPLED ESD
CLAMP
OUT
V-
CIRCUIT 1
V+
VCIRCUIT 3
CIRCUIT 4
FN6145.4
August 16, 2011
ISL28278, ISL28478
Ordering Information
PART NUMBER
(Notes 1, 2, 3, 4)
PART MARKING
TEMP RANGE
(°C)
PACKAGE
(Pb-Free)
PKG. DWG. #
ISL28278FAZ
28278 FAZ
-40 to +125
16 Ld QSOP
MDP0040
ISL28478FAZ
28478 FAZ
-40 to +125
16 Ld QSOP
MDP0040
NOTES:
1. Add “-T7” suffix is for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28278 and ISL28478. For more information on MSL please see
Tech Brief TB363.
4. Not recommended for new designs. For a possible substitute product, contact Intersil Technical Support Center at 1-888-INTERSIL or
www.intersil.com/tsc.
3
FN6145.4
August 16, 2011
ISL28278, ISL28478
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage, V- to V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V- - 0.5V to V+ + 0.5V
ESD Tolerance
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200V
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
112
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Ambient Operating Temperature Range . . . . . . . . . . . . . .-40°C to +125°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+125°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (±1.2V) to 5.5V (±2.75V)
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTE:
5. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
temperature range, -40°C to +125°C.
PARAMETER
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C. Boldface limits apply over the operating
DESCRIPTION
CONDITIONS
MIN
(Note 4)
TYP
MAX
(Note 4)
UNIT
DC SPECIFICATIONS
VOS
ΔV OS
------------ΔT
Input Offset Voltage
-225
-450
Input Offset Voltage vs Temperature
±0.20
225
450
1.0
µV
µV/°C
IOS
Input Offset Current
IB
Input Bias Current
CMIR
Common-Mode Voltage Range
Guaranteed by CMRR
0
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
80
75
100
dB
PSRR
Power Supply Rejection Ratio
V+ = 2.4V to 5.5V
85
80
105
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V, RL = 100kΩ
103
102
109
dB
VO = 0.5V to 4.5V, RL = 1kΩ
95
dB
RL = 100kΩ
3
6
30
mV
130
175
225
mV
4
10
30
mV
RL = 1kΩ
120
200
250
mV
ISL28278, all channels enabled.
120
156
175
µA
ISL28478, all channels enabled.
240
315
350
µA
VOL
Output Voltage Swing, Low
VOUT - V-
-30
-80
±5
30
80
pA
-40°C to +85°C
-30
-80
±10
30
80
pA
-40°C to +85°C
5
V
RL = 1kΩ
VOH
IS,ON
Output Voltage Swing, High
V+ - VOUT
Quiescent Supply Current, Enabled
4
RL = 100kΩ
FN6145.4
August 16, 2011
ISL28278, ISL28478
Electrical Specifications
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C. Boldface limits apply over the operating
temperature range, -40°C to +125°C. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
IS,OFF
Quiescent Supply Current, Disabled
All channels disabled.
ISL28278
IO+
Short Circuit Sourcing Capability
RL = 10Ω
IO-
Short Circuit Sinking Capability
RL = 10Ω
VSUPPLY
Supply Operating Range
V- to V+
VENH
EN Pin High Level
ISL28278
VENL
EN Pin Low Level
ISL28278
IENH
EN Pin Input High Current
VEN = V+
ISL28278
IENL
EN Pin Input Low Current
VEN = VISL28278
GBW
Gain Bandwidth Product
AV = 100, RF = 100kΩ, RG = 1kΩ,
RL = 10kΩ to VCM
en
Input Noise Voltage Peak-to-Peak
MIN
(Note 4)
TYP
4
24
20
MAX
(Note 4)
7
9
µA
31
-26
2.4
UNIT
mA
-24
-20
mA
5.5
V
2
V
0.8
V
0.8
1
1.5
µA
0
0.1
µA
AC SPECIFICATIONS
250
kHz
f = 0.1Hz to 10Hz
3
µVP-P
Input Noise Voltage Density
fO = 1kHz
48
nV/√Hz
in
Input Noise Current Density
fO = 1kHz
9
fA/√Hz
CMRR @ 60Hz
Input Common Mode Rejection Ratio
VCM = 1VP-P, RL = 10kΩ to VCM
-70
dB
PSRR+ @ 120Hz
Power Supply Rejection Ratio, +V
V+,V- = ±1.2V and ±2.5V,
VSOURCE = 1VP-P, RL = 10kΩ to VCM
-80
dB
PSRR- @ 120Hz
Power Supply Rejection Ratio, -V
V+,V- = ±1.2V and ±2.5V
VSOURCE = 1VP-P, RL = 10kΩ to VCM
-60
dB
±0.15
V/µs
TRANSIENT RESPONSE
SR
Slew Rate
tEN
Enable to Output Turn-on Delay Time, 10% VEN = 5V to 0V, AV = -1,
EN to 10% Vout
RG = RF = RL = 1k to VCM, ISL28278
2
µs
Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = -1,
EN to 10% Vout
RG = RF = RL = 1k to VCM, ISL28278
0.1
µs
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
5
FN6145.4
August 16, 2011
ISL28278, ISL28478
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified.
+1
45
V+, V- = ±2.5V
RL = 10k
30
GAIN (dB)
GAIN (dB)
35
V+, V- = ±1.2V
RL = 10k
-2
-3
40
V+, V- = ±1.2V
RL = 1k
V+, V- = ±2.5V
RL = 1k
-1
-4
-5
-6
-7
20
15
VOUT = 50mVP-P
AV = 1
CL = 3pF
RF = 0, RG = INF
8
1k
10
5
10k
100k
1M
V+, V- = ±2.5V
25
0
100
5M
10k
80
100
40
80
200
150
-40
PHASE
-40
-80
10
100
1k
10k
100k
1M
50
0
20
GAIN
-50
0
-120
10M
-100
-20
10
100
1k
10k
100k
-150
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 4. AVOL vs FREQUENCY @ 100kΩ LOAD
FIGURE 5. AVOL vs FREQUENCY @ 1kΩ LOAD
10
100
90
0
PSRR+
80
-10
70
-20
60
-30
CMRR (dB)
PSRR (dB)
100
40
-80
1
PHASE
60
GAIN (dB)
0
PHASE (°)
GAIN (dB)
0
1M
FIGURE 3. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
GAIN
40
100k
FREQUENCY (Hz)
FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
80
V+, V-= ±1.0V
1k
FREQUENCY (Hz)
120
V+, V- = ±1.2V
AV = 100
RL = 10kΩ
CL = 3pF
RF = 100kΩ
RG = 1kΩ
PHASE (°)
0
50
40
30
VS = ±2.5V
20 AV = 1
10 CL = 27.9pF
R = 10k
0 VL
CM = 1VP-P
-10
10
100
V+, V- = ±2.5VDC
VSOURCE = 1VP-P
RL = 10kΩ
-40
-50
-60
-70
-80
PSRR-
-90
1k
10k
FREQUENCY (Hz)
100k
FIGURE 6. PSRR vs FREQUENCY
6
1M
-100
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 7. CMRR vs FREQUENCY
FN6145.4
August 16, 2011
ISL28278, ISL28478
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
70
GAIN (dB)
40
30
20
120
RF = 100kΩ, RG = 1k
50
ACL = 100
VS = ±2.5V
CL = 26.9pF
RL = 10k
VOUT = 10mVP-P
ACL = 10
RF = 100kΩ, RG = 10k
10
110
100
RL_RECEIVE = 10k
80
70
RL_TRANSMIT = 10k
60
RL_RECEIVE = 10k
50
40
RF = 0, RG = ∞
-10
10
RL_TRANSMIT = ∞
90
ACL = 1
0
VS = ±2.5V
CL = 29.6pF
VCM = 1VP-P
130
CROSSTALK (dB)
60
140
RF = 100kΩ, RG = 100
ACL = 1000
100
1k
10k
100k
1M
30
10
10M
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 8. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
1M
FIGURE 9. CROSSTALK vs FREQUENCY
1000
VS = ±2.5V
INPUT NOISE CURRENT (fA/√Hz)
INPUT NOISE VOLTAGE (nV/√Hz)
10000
100k
1000
100
10
0.1
1
10
100
1k
10k
VS = ±2.5V
100
10
1
0.1
100k
1
10
FREQUENCY (Hz)
FIGURE 10. VOLTAGE NOISE vs FREQUENCY
100
1k
FREQUENCY (Hz)
10k
100k
FIGURE 11. CURRENT NOISE vs FREQUENCY
VS = ±2.5V
AV = 10k
4
3
2.56
2.54
2
1
SMALL SIGNAL (V)
INPUT NOISE VOLTAGE (uV)
5
0
-1
-2
-3
-4
-5
2.52
2.50
V+ = 5V
AV = 1
RL = 1kΩ
VOUT = 0.1VP-P
2.48
2.46
0
1
2
3
4
5
6
7
8
9
TIME (s)
FIGURE 12. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
7
10
2.44
0
20
40
60
80 100 120 140 160 180 200
TIME (µs)
FIGURE 13. SMALL SIGNAL TRANSIENT RESPONSE
FN6145.4
August 16, 2011
ISL28278, ISL28478
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
5.0
4.5
1V/DIV
3.5
3.0
2.5
2.0
0
V+ = 5V
AV = -2
RL = 1kΩ
VOUT = 4VP-P
1.5
1.0
0.5
0
0
20
40
60
0
80 100 120 140 160 180 200
TIME (µs)
10µs/DIV
FIGURE 14. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 15. ISL28278 ENABLE TO OUTPUT DELAY TIME
1000
100
800
80
600
60
400
40
IBIAS (pA)
VOS (µV)
VOUT
0.1V/DIV
LARGE SIGNAL (V)
4.0
200
0
-200
-400
-800
-1000
-1
0
1
2
3
VCM (V)
4
0
-20
V+ = 5V
RL = OPEN
RF = 100k, RG = 100
AV = +1000
-60
-80
5
6
FIGURE 16. INPUT OFFSET VOLTAGE vs COMMON MODE INPUT
VOLTAGE
280
20
-40
V+ = 5V
RL = OPEN
RF = 100k, RG = 100
AV = +1000
-600
-100
-1
4.8
1
2
3
VCM (V)
MAX
CURRENT (µA)
MEDIAN
230
5
6
N = 12
4.4
250
240
4
4.6
260
MIN
220
MAX
4.2
MEDIAN
4.0
3.8
3.6
210
MIN
3.4
200
190
-40
0
FIGURE 17. INPUT BIAS CURRENT vs COMMON-MODE INPUT
VOLTAGE
N = 1000
270
CURRENT (µA)
AV = -1
VIN = 200mVP-P
V+ = 5V
EN
INPUT
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 18. ISL28478 SUPPLY CURRENT vs TEMPERATURE,
V+, V- = ±2.5V, R L = INF
8
3.2
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 19. ISL28278 DISABLED SUPPLY CURRENT vs
TEMPERATURE, V+, V- = ±2.5V RL = INF
FN6145.4
August 16, 2011
ISL28278, ISL28478
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
500
500
N = 1000
300
300
MAX
100
MEDIAN
0
-100
100
-100
MIN
-200
-300
-300
-20
0
20
40
60
80
TEMPERATURE (°C)
100
MIN
-400
-40
120
FIGURE 20. VOS vs TEMPERATURE, VIN = 0V, V+, V- = ±2.5V
500
MEDIAN
0
-200
-400
-40
MAX
200
VOS (µV)
200
VOS (µV)
N = 1000
400
400
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 21. VOS vs TEMPERATURE, VIN = 0V, V+, V- = ±1.2V
200
N = 1000
N = 1000
0
0
IBIAS- (pA)
IBIAS+ (pA)
-200
-500
MAX
-1000
-1500
-2000
0
20
40
60
80
-800
MEDIAN
-1200
MIN
-20
MAX
-600
-1000
MEDIAN
-2500
-40
-400
100
-1400
120
MIN
-40
-20
0
FIGURE 22. IBIAS+ vs TEMPERATURE, V+,V- = ±2.5V
40
60
200
100
120
N = 1000
N = 1000
0
0
-200
IBIAS- (pA)
-500
MAX
-1000
-1500
MAX
-400
-600
-800
MEDIAN
-2000
MEDIAN
-1000
MIN
MIN
-2500
80
FIGURE 23. IBIAS- vs TEMPERATURE, V+,V- = ±2.5V
500
IBIAS+ (pA)
20
TEMPERATURE (°C)
TEMPERATURE (°C)
-40
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 24. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V
9
120
-1200
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 25. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V
FN6145.4
August 16, 2011
ISL28278, ISL28478
200
550
0
500
-200
450
-400
AVOL (V/mV)
IOS (pA)
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
MAX
-600
-800
MEDIAN
-1000
-1200
-1400
-40
-20
0
20
40
60
80
MAX
400
350
MEDIAN
300
250
MIN
200
MIN
N = 1000
N = 1000
100
150
-40
120
-20
0
TEMPERATURE (°C)
90
135
80
125
MAX
70
60
MEDIAN
50
MIN
40
30
-40
0
20
40
60
80
TEMPERATURE (°C)
100
115
105
95
MIN
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 29. CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V V+,
V- = ±2.5V
4.91
N = 1000
MEDIAN
N = 1000
75
-40
-20
120
FIGURE 28. AVOL vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k
140
120
MAX
85
N = 1000
-20
100
FIGURE 27. AVOL vs TEMPERATURE, V+, V- = ±2.5V, RL = 100k
CMRR (dB)
AVOL (V/mV)
FIGURE 26. IOS vs TEMPERATURE, V+, V- = ±2.5V
20
40
60
80
TEMPERATURE (°C)
MAX
130
4.90
120
4.89
N = 1000
110
VOUT (V)
PSRR (dB)
MAX
MEDIAN
MEDIAN
4.87
100
MIN
90
80
-40
4.88
-20
0
20
40
60
80
TEMPERATURE (°C)
4.86
100
120
FIGURE 30. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.5V
10
MIN
4.85
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 31. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V,
RL= 1k
FN6145.4
August 16, 2011
ISL28278, ISL28478
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
4.9984
160
N = 12
4.9982
4.9980
140
VOUT (mV)
VOUT (V)
4.9978
4.9976
4.9974
MEDIAN
4.9972
MIN
4.9970
MAX
130
MEDIAN
120
MIN
110
4.9968
100
4.9966
4.9964
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
4.3
4.1
MAX
3.9
MEDIAN
3.8
3.7
MIN
3.6
3.5
3.4
-40
-20
0
20
40
60
80
100
-20
0
120
41
120
N = 1000
MAX
37
35
33
MEDIAN
31
MIN
29
27
25
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 34. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V,
RL= 100k
FIGURE 35. +OUTPUT SHORT CIRCUIT CURRENT vs
TEMPERATURE, VIN = -2.55V, RL = 10,
V+, V- = ±2.5V
0.19
N = 1000
0.18
-23
N = 1000
0.17
-25
+SLEW RATE (V/µs)
-OUTPUT SHORT CIRCUIT CURRENT (mA)
100
39
TEMPERATURE (°C)
-21
20
40
60
80
TEMPERATURE (°C)
FIGURE 33. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V,
RL= 1k
+OUTPUT SHORT CIRCUIT CURRENT (mA)
N = 12
4.2
4.0
90
-40
120
FIGURE 32. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V,
RL= 100k
VOUT (mV)
N = 1000
150
MAX
MAX
-27
MEDIAN
-29
MIN
-31
0.16
MAX
0.15
0.14
MEDIAN
0.13
0.12
MIN
0.11
0.10
-33
-40
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 36. -OUTPUT SHORT CIRCUIT CURRENT vs
TEMPERATURE, VIN = +2.55V, RL = 10,
V+, V- = ±2.5V
11
120
0.09
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 37. +SLEW RATE vs TEMPERATURE, VOUT = ±1.5V,
AV = +2
FN6145.4
August 16, 2011
ISL28278, ISL28478
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
0.20
0.19
N = 1000
-SLEW RATE (V/µs)
0.18
0.17
MAX
0.16
0.15
0.14
MEDIAN
0.13
MIN
0.12
0.11
0.10
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 38. -SLEW RATE vs TEMPERATURE, VOUT = ±1.5V, AV = +2
Applications Information
The ISL28278 and ISL28478 are dual and quad CMOS rail-to-rail
input, output (RRIO) micropower operational amplifiers. These
devices are designed to operate from a single supply (2.4V to
5.5V) or dual supplies (±1.2V to ±2.75V) while drawing only
120µA (ISL28278) of supply current. This combination of low
power and precision performance makes these devices suitable
for solar and battery power applications.
Rail-to-Rail Input
V+
VIN
RIN
VOUT
+
RL
V-
FIGURE 39. INPUT ESD DIODE CURRENT LIMITING - UNITY GAIN
Many rail-to-rail input stages use two differential input pairs: a
long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties
have to be paid for this circuit topology. As the input signal moves
from one supply rail to another, the operational amplifier
switches from one input pair to the other, causing drastic
changes in input offset voltage and an undesired change in
magnitude and polarity of input offset current.
The ISL28278 achieves input rail-to-rail without sacrificing
important precision specifications and degrading distortion
performance. The input offset voltage exhibits smooth behavior
throughout the entire common-mode input range. The input bias
current versus the common-mode voltage range has undistorted
behavior typically from 100mV below the negative rail and 10%
higher than the V+ rail (0.5V higher than V+ when V+ equals 5V).
Input Protection
All input terminals have internal ESD protection diodes to the
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. There is an additional
pair of back-to-back diodes across the input terminals. For
applications in which the input differential voltage is expected to
exceed 0.5V, external series resistors must be used to ensure the
input currents never exceed 5mA (as shown in Figure 39).
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to achieve the
rail-to-rail output swing. The NMOS sinks current to swing the output
in the negative direction. The PMOS sources current to swing the
output in the positive direction. Both parts, with a 100kΩ load,
typically swing to within 4mV of the positive supply rail and within
3mV of the negative supply rail.
Enable/Disable Feature
The ISL28278 offers two EN pins (EN_A and EN_B) which disable
the op amp when pulled up to at least 2.0V. In the disabled state
(output in a high impedance state), the part typically consumes
4µA. By disabling the part, multiple parts can be connected
together as a MUX. The outputs are tied together in parallel, and
a channel can be selected by the EN pins. The loading effects of
the feedback resistors of the disabled amplifier must be
considered when multiple amplifier outputs are connected
together. The EN pin also has an internal pull-down. If left open,
the EN pin pulls to the negative rail, and the device is enabled by
default.
Using Only One Channel
The ISL28278 and ISL28478 are dual and quad channel
op amps. If the application requires only one channel when using
the ISL28278 or fewer than four channels when using the
ISL28478, the user must configure any unused channels to
prevent them from oscillating. Unused channels oscillate if the
input and output pins are floating, resulting in higher than
12
FN6145.4
August 16, 2011
ISL28278, ISL28478
expected supply currents and possible noise injection into the
channel being used. The proper way to prevent this oscillation is
to short the output to the negative input, and ground the positive
input (as shown in Figure 40).
+
1/2 ISL28278
1/4 ISL28478
FIGURE 40. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
Application Circuits
THERMOCOUPLE AMPLIFIER
Thermocouples are the most popular temperature-sensing
device because of their low cost, interchangeability, and ability to
measure a wide range of temperatures. The ISL28x78 (see
Figure 41) is used to convert the differential thermocouple
voltage into a single-ended signal with 10x gain. The amplifier’s
rail-to-rail input characteristic allows the thermocouple to be
biased at ground and the amplifier to run from a single 5V
supply.
Proper Layout Maximizes Performance
To achieve maximum performance from the high input
impedance and low offset voltage of the ISL28278 and
ISL28478, care should be taken in circuit board layout. The PC
board surface must remain clean and free of moisture to avoid
leakage currents between adjacent traces. Surface coating of the
circuit board reduces surface moisture and provides a humidity
barrier, reducing parasitic resistance on the board.
K TYPE
THERMOCOUPLE
R4
R3
10kΩ
10kΩ
R2
The ISL28278 and ISL28478 have no internal current-limiting
circuitry. If the output is shorted, it is possible to exceed the
absolute maximum rating for output current or power
dissipation, potentially resulting in destruction of the device.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply conditions. It
is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications, to determine whether
power supply voltages, load conditions, or package type need to
be modified to remain in the safe operating area. These
parameters are related in Equation 1:
(EQ. 1)
T JMAX = T MAX + ( θ JA xPD MAXTOTAL )
where:
• TMAX = Maximum ambient temperature
• θJA = Thermal resistance of the package
• PDMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
PDMAX for each amplifier is calculated in Equation 2:
V OUTMAX
PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × -----------------------R
410µV/°C
+
5V
R1
100kΩ
FIGURE 41. THERMOCOUPLE AMPLIFIER
ECG AMPLIFIER
In medical applications, ECG amplifiers must extract millivolt low
frequency AC signals from the skin of the patient while rejecting
AC common mode interference and static DC potentials created
at the electrode-to-skin interface. In Figure 42, the ISL28278
(U1) forms one of the multiple high gain AC band-pass amplifiers
using active feedback. Amplifier U1B and RC RF1, CF1 form a
high gain LP filtered amplifier with the corner frequency given by
Equation 3:
1
f-HPF -3dB = -------------------------------------------------2 × Pi × RF1 × CF1
(EQ. 3)
Inserting the low pass amplifier, U1B, in the U1A feedback loop
results in an overall high-pass frequency response. Voltage
divider pairs R1-R2 and R3-R4 set the overall amplifier pass-band
gain. The DC input offset is canceled by U1B at the U1A inverting
input. Resistor divider pair R3-R4 defines the maximum input DC
level that is canceled, and is given by Equation 4:
⎛ R4 ⎞
V IN DC = V + × ⎜ --------------------⎟
⎝ R 3 + R 4⎠
(EQ. 4)
In the passband range, U1B gain is +1, and the total signal gain
is defined by the divider ratios according to Equation 5:
L
(EQ. 2)
where:
• PDMAX = Maximum power dissipation of one amplifier
• VS = Supply voltage (magnitude of V+ and V-)
• ISMAX = Maximum supply current of one amplifier
• VOUTMAX = Maximum output voltage swing of the application
• RL = Load resistance
V+
+
ISL28x78
V-
COLD JUNCTION
COMPENSATION
Current Limiting
100kΩ
V OUT
V OUT U1 GAIN = ------------- =
V IN
⎛ R 1 + R 2⎞ ⎛ R 3 + R 4⎞
⎜ --------------------⎟ × ⎜ --------------------⎟
⎝ R2 ⎠ ⎝ R4 ⎠
(EQ. 5)
At frequencies greater than the LPF corner, the R1-C1 and R3-C3
networks work to roll-off the U1A gain to unity. Setting both R-C
time constants to the same value simplifies to Equation 6:
1
f-LPF -3dB = ----------------------------------------2 × Pi × R 1 × C 1
(EQ. 6)
Right leg drive and reference amplifiers U2A and U2B form a DC
feedback loop that applies a correction voltage at the right leg
13
FN6145.4
August 16, 2011
ISL28278, ISL28478
electrode to cancel out DC and low frequency body interference.
The voltage at the VCM sense electrode is maintained at the
reference voltage set by RF1-RF2.
3. Common-Mode Reference Voltage (VCM) = V+/2
With the values shown in Figure 42, the ECG circuit performance
parameters are:
6. Lower -3dB Frequency = 0.05Hz
4. Max DC Input Offset Voltage = VCM ±0.18V to ±0.41V
5. Passband Gain = 425V/V
7. Upper -3dB Frequency = 159Hz
1. Supply Voltage Range = +2.4V to +5.5V
2. Total Supply Current Draw @ +5V = 500µA (typ)
PATIENT
LEAD
CONNECTOR
VIN+
V+
V+
R
10k
0.082µF
+ U1A
1/2
ISL28x78
-
U1B+
1/2
ISL28x78
-
R3
12.4k
PATIENT
ELECTRODE
PADS
R4
2.21k
VCM REFERENCE
TO OTHER
CHANNELS
R1
10k
V+
C3
DC
OFFSET
R
1k
VOUT(U1)
C1
0.1µF
VOUT+
C
0.01µF
VOUTV+
R2
158Ω
+2.4V TO 5.5V
SUPPLY
RFA
10k
4.7µF
CF1
4.7µF
RF1
680k
RFB
10k
SUPPLY
COMMON
V+
VCM
SENSE
R
10k
V+
CB
VCM
V+
RL
DRIVE
0.47
µF
R
10k
PROTECTION
CIRCUIT
V+
1nF
U2B 1/2
ISL28x78
+
R
500k
+
U2A 1/2
ISL28x78
-
1nF
CA
VREF
(V+/2)
INPUT
R
5k
FIGURE 42. ECG AMPLIFIER
14
FN6145.4
August 16, 2011
ISL28278, ISL28478
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
CHANGE
June 16, 2011
FN6145.4
On page 1, Features: changed "300kHz typical gain-bandwidth product" to "250kHz typical gain-bandwidth
product" Added Related Literature section with link to "AN1345: ISL2827xEVAL1Z Evaluation Board User
Guide."
On page 1: added Figure 1, Typical Application Circuit diagram.
On page 4, Absolute Maximum Ratings: removed "Supply Turn On Voltage Slew Rate . . . 1V/µs". Under
"Operating Conditions," added "Supply Voltage . . . 2.4V (±1.2V) to 5.5V (±2.75V)" and changed "Operating
Junction Temperature" to "Maximum Operating Junction Temperature".
On page 4, Electrical Specifications:
- Changed AVOL room temperature MIN from 200V/mV to 103dB; changed over-temp MIN from 190V/mV
to 102dB; changed TYP from 300V/mV to 109dB. For RL = 1kΩ, changed TYP from 60V/mV to 95dB.
- Split VOUT into two parameters: VOL and VOH. For Output Voltage Swing, High, removed MIN limits,
changed TYP from 4.996V and 4.880V to 4mV and 120mV; added MAX limits.
- For Gain Band Width, changed TYP from 300kHz to 250kHz.
- For Slew Rate, removed MIN/MAX limits; changed TYP from ±0.14V/µs to ±0.15V/µs.
On page 6: replaced FIGURE 6. PSRR vs FREQUENCY.
On page 7: Typical Performance Curves: Added Figure 8 “FREQUENCY RESPONSE vs CLOSED LOOP GAIN”,
Figure 9 “CROSSTALK vs FREQUENCY”, Figure 10 “VOLTAGE NOISE vs FREQUENCY” and Figure 11 “CURRENT
NOISE vs FREQUENCY”
On page 13: under “Proper Layout Maximizes Performance” removed discussion of guard ring for unity gain
amplifier, and removed Figure 37. GUARD RING EXAMPLE FOR UNITY GAIN AMPLIFIER.
FN6145.3
- Changed IO+, IO- specs.
- Updated Supply Voltage in Electrical Specifications table; added CDM ESD spec.
- Changed Noise Current TYP from 0.04pA to 9fA
- Updated noise plots (Fig.7, 8, 9)
- Updated transient response plots (Fig 10, 11)
- Added ECG circuit to Applications section
FN6145.2
Added ISL28476 Quad to the ISL28276 Dual data sheet.
FN6145.1
Pg 10: revised Pin Description to include ISL28478 pin numbers.
FN6145.0
Initial Release
9/18/2006
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
intersil.com: ISL28278, ISL28478
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff
FITs are available from our website at: http://rel.intersil.com/reports/sear
15
FN6145.4
August 16, 2011
ISL28278, ISL28478
Quarter Size Outline Plastic Packages Family (QSOP)
MDP0040
A
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
E
INCHES
PIN #1
I.D. MARK
E1
1
(N/2)
B
0.010
C A B
e
H
C
SEATING
PLANE
0.007
0.004 C
b
C A B
SYMBOL
QSOP16
QSOP24
QSOP28
TOLERANCE
NOTES
A
0.068
0.068
0.068
Max.
-
A1
0.006
0.006
0.006
±0.002
-
A2
0.056
0.056
0.056
±0.004
-
b
0.010
0.010
0.010
±0.002
-
c
0.008
0.008
0.008
±0.001
-
D
0.193
0.341
0.390
±0.004
1, 3
E
0.236
0.236
0.236
±0.008
-
E1
0.154
0.154
0.154
±0.004
2, 3
e
0.025
0.025
0.025
Basic
-
L
0.025
0.025
0.025
±0.009
-
L1
0.041
0.041
0.041
Basic
-
N
16
24
28
Reference
Rev. F 2/07
NOTES:
L1
A
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
FN6145.4
August 16, 2011
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