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ISL32704EIBZ-T7A

ISL32704EIBZ-T7A

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SOIC16_150MIL

  • 描述:

    IC TRANSCEIVER HALF 1/1 16SOIC

  • 数据手册
  • 价格&库存
ISL32704EIBZ-T7A 数据手册
DATASHEET ISL32704E FN8860 Rev.4.00 Feb 12, 2018 Ultra-Low EMI, Smallest Package Isolated RS-485 Transceiver The ISL32704E is a galvanically isolated, differential bus transceiver designed for bidirectional data transmission and meeting the RS-485 and RS-422 standards for balanced communication. Each of the bus terminals, A and B, is protected against ±15kV ESD strikes without latch-up. Features The device uses Giant Magnetoresistance (GMR) as isolation technology. A unique ceramic/polymer composite barrier provides excellent isolation and virtually unlimited barrier life. • 3V to 5V power supplies The part is available in a 16 Ld QSOP package offering unprecedented miniaturization, and in a 16 Ld wide-body SOIC package providing true 8 millimeter creepage distance. • 4Mbps data rate • 2.5kVRMS isolation per UL 1577 • 600VRMS working voltage per VDE 0884 • Single unit load receiver input • Driver drives up to 150 unit loads • 50kV/µs (typical), 30kV/µs (minimum) common-mode transient immunity The ISL32704E delivers a minimum differential output voltage of 1.5V into a 54Ω differential load for excellent data integrity over long cable lengths. • 44000 years barrier life The device is compatible with 3V and 5V input supplies, allowing interface to standard microcontrollers without additional level shifting. • -40°C to +85°C temperature range Current limiting and thermal shutdown features protect against output short circuits and bus contention that may cause excessive power dissipation. Receiver inputs feature a “fail-safe if open” design, ensuring a logic high R-output if A/B are floating. Related Literature • 15kV ESD bus-pin protection • Thermal shutdown protection • Meets or exceeds ANSI RS-485 • 16 Ld QSOP and 0.3” true 8mm 16 Ld SOIC packages • UL 1577 recognized • VDE V0884-10 certified Applications • Factory automation For a full list of related documents, visit our website • ISL32704E product page • Security networks • Building environmental control systems • Industrial/process control networks • Level translators (i.e., RS-232 to RS-485) Isolation 3.3V Barrier 5V 100n 100n 1 VDD1 2 4 5 6 16 VDD2 VDD2X R ISODE RE XDE DE A D GND1 3 Isolation 5V Barrier 3.3V 100n 11 15 542R 12 9 10 B 13 ISOR GND2 135R 120R VDD2 11 VDD2X 15 ISODE 12 XDE 9 A 10 B 13 ISOR VDD1 GND2 GND1 542R 14 14 ISL32704EIAZ 1 3 4 5 6 VDD1 100n 16 A RE DE D GND1 2,8 B ISODE GND2 9,15 ISL32704EIBZ DE D 2 4 5 6 3 16 VDD2 12 13 Isolation 5V Barrier 3.3V 100n 542R VDD2 R R RE ISL32704EIAZ Isolation 3.3V Barrier 5V 100n 100n 1 16 12 135R 10 120R 13 10 542R 100n 1 VDD1 R A RE B ISODE GND2 9,15 DE D 3 4 5 6 GND1 2,8 ISL32704EIBZ FIGURE 1. TYPICAL ISOLATED HIGH-SPEED RS-485 APPLICATIONS FN8860 Rev.4.00 Feb 12, 2018 Page 1 of 14 ISL32704E Ordering Information PART NUMBER (Notes 3, 4) TEMP. RANGE (°C) PART MARKING PACKAGE (RoHS COMPLIANT) PKG. DWG. # ISL32704EIAZ (Note 1) 32704EIAZ -40 to +85 16 Ld QSOP M16.15B ISL32704EIBZ (Note 2) 32704EIBZ -40 to +85 16 Ld SOIC M16.3A ISL32704EVAL1Z Evaluation board for ISL32704EIAZ ISL32704EVAL2Z Evaluation board for ISL32704EIBZ NOTES: 1. Add “-T7A” suffix for 250 unit or “-T” suffix for 2500 unit tape and reel options. Refer to TB347 for details about reel specifications. 2. Add “-T7A” suffix for 250 unit or “-T” suffix for 1000 unit tape and reel options. Refer to TB347 for details about reel specifications. 3. These Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), see the ISL32704E product information page. For more information about MSL, see TB363. Pin Configurations ISL32704E (16 LD WB-SOIC) TOP VIEW ISL32704E (16 LD QSOP) TOP VIEW VDD1 1 R 2 16 VDD2 VDD1 1 16 VDD2 15 ISODE GND1 2 15 GND2 GND1 3 14 GND2 R 3 RE 4 13 ISOR RE 4 13 B DE 5 12 XDE DE 5 12 A D 6 11 VDD2X D 6 NC 7 10 B NC 7 NC 8 9 A GND1 8 D 14 NC ISODE 11 NC 10 ISODE 9 GND2 DE ISODE XDE DE D B A R RE B A R ISOR RE Truth Table Truth Table TRANSMITTING INPUTS RECEIVING OUTPUTS INPUTS OUTPUT RE DE D ISODE B A RE DE A-B R X 1 1 1 0 1 0 0 ≥0.2V 1 X 1 0 1 1 0 0 0 ≤-0.2V 0 0 0 X 0 High-Z High-Z 0 0 Inputs Open/Shorted 1 1 0 X 0 High-Z High-Z 1 1 X High-Z 1 0 X High-Z FN8860 Rev.4.00 Feb 12, 2018 Page 2 of 14 ISL32704E Pin Descriptions PIN NUMBER 16 Ld SOIC 16 Ld QSOP PIN NAME 1 1 VDD1 3 2 R 2, 8 3 GND1 4 4 RE Receiver output enable. R is enabled when RE is low. R is high impedance when RE is high. If the Rx enable function is not required, connect RE directly to GND1. 5 5 DE Driver output enable. The driver outputs, A and B, are enabled when DE is high. They are high impedance when DE is low. If the Tx enable function is not required, connect DE to VDD1 (Pin 1) through a 1kΩ or greater resistor. 6 6 D Driver input. A low on D forces output A low and output B high. A high on D forces output A high and output B low. 7, 11, 14 7, 8 NC No internal connection. 12 9 A ±15kV ESD protected, noninverting bus terminal. This pin is the noninverting receiver input when DE = 0 and the noninverting driver output when DE = 1. 13 10 B ±15kV ESD protected, inverting bus terminal. This pin is the inverting receiver input when DE = 0 and the inverting driver output when DE = 1. - 11 - 12 XDE External driver enable. Allows for enabling the driver from the bus side. Connect this pin to ISODE to control the driver from the controller side. This pin must not be left floating. - 13 ISOR Isolated receiver output for test purpose only. This pin is used for testing and should be left unconnected. 9, 15 14 GND2 Output power supply ground return. Dual ground pins are connected internally. 10 15 ISODE Isolated DE output. 16 16 VDD2 Isolator output power supply. FUNCTION Input power supply. Receiver output. R is high when A-B ≥ 200mV, and when A and B are floating. R is low when A-B ≤ -200mV. Input power supply ground return. Dual ground pins are connected internally. VDD2X Transceiver power supply. Connect to VDD2 (Pin 16). Typical Operating Circuits 100n 3.3V ISOLATION 5V BARRIER 1 VDD1 100n 3.3V ISOLATION 5V BARRIER 1 16 VDD1 VDD2 100n 11 16 VDD2X VDD2 5 DE 5 DE ISODE 15 XDE 12 ISODE 10 1.09k A 9 6 D 100n 1.09k A 12 6 D 127R 2 R 4 RE 3 GND2 14 B 13 4 RE ISOR 13 GND1 127R 3 R B 10 1.09k GND1 2,8 ISL32704EIAZ GND2 1.09k 9,15 ISL32704EIBZ FIGURE 2. TYPICAL OPERATING CIRCUITS FN8860 Rev.4.00 Feb 12, 2018 Page 3 of 14 ISL32704E Absolute Maximum Ratings Thermal Information (Note 17) Supply Voltages (Note 7) VDD1 to GND1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V VDD2 to GND2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages, D, DE, RE. . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VDD1 +0.5V) Input/Output Voltages A, B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VDD1 +1V) Short-Circuit Duration, A, B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . See “ESD PERFORMANCE” on page 5 Thermal Resistance (Typical) JA (°C/W) JC (°C/W) 16 Ld WB-SOIC Package (Notes 5, 6) . . . . 34 17 16 Ld QSOP Package (Notes 5, 6) . . . . . . . 63 35 Maximum Junction Temperature (Plastic Package) . . . .-55°C to +150°C Maximum Storage Temperature Range . . . . . . . . . . . . . .-55°C to +150°C Maximum Power Dissipation (WB-SOIC) . . . . . . . . . . . . . . . . . . . . . .800mW Maximum Power Dissipation (QSOP). . . . . . . . . . . . . . . . . . . . . . . . .675mW Solder Profile . . . . . . . . . . . . . . . . . . . . . . . . . Per JEDEC J-STD-020C, MSL1 Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Recommended Operating Conditions Supply Voltages VDD1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to 5.5V VDD2, VDD2X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V High-Level Digital Input Voltage, VIH VDD1 = 3.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V to VDD1 VDD1 = 5.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to VDD1 Low-Level Digital Input Voltage, VIL . . . . . . . . . . . . . . . . . . . . . . . .0V to 0.8V Input Voltage at any Bus Terminal (separately or common-mode), VI, VIC . . . . . . . . . . . . . . . . . . . .-7V to 12V Differential Input Voltage (Note 8), VID . . . . . . . . . . . . . . . . . . . . .-7V to 12V High-Level Output Current (Driver), IOH . . . . . . . . . . . . . . . . . . . . . . . . 60mA High-Level Digital Output Current (Receiver), IOH . . . . . . . . . . . . . . . . . 8mA Low-Level Output Current (Driver), IOL . . . . . . . . . . . . . . . . . . . . . . . . . -60mA Low-Level Digital Output Current (Receiver), IOL . . . . . . . . . . . . . . . . . -8mA Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +100°C Ambient Operating Temperature, TA . . . . . . . . . . . . . . . . . . -40°C to +85°C Digital Input Signal Rise and Fall Times, tIR, tIF . . . . . . . . . . . . . . DC Stable CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 5. JA is measured in free air with the component soldered to a double-sided board. 6. For JC, the “case temp” location is the center of the package top side. Electrical Specifications Test Conditions: TMIN to TMAX, VDD1 = VDD2 = 4.5V to 5.5V; unless otherwise stated (see (Note 7). PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT VDD2 V DC CHARACTERISTICS Driver Line Output Voltage (VA, VB) (Note 7) VO No load Driver Differential Output Voltage (Note 8) VOD1 No load Driver Differential Output Voltage (Note 8) VOD2 RL = 54Ω Change in Magnitude of Differential Output Voltage (Note 13) VOD RL = 54Ω or 100Ω Driver Common-Mode Output Voltage VOC RL = 54Ω or 100Ω Change in Magnitude of Driver Common-Mode Output Voltage (Note 13) VOC RL = 54Ω or 100Ω Bus Input Current (A, B) (Notes 10, 14) IIN2 DE = 0V 1.5 V VDD2 V 0.01 0.2 V 3 V 0.20 V 0.01 VIN = 12V VIN = -7V High-Level Input Current (D, DE, RE) IIH VI = 3.5V Low-Level Input Current (D, DE, RE) IIL VI = 0.4V IOS DE = VDD1, -7V ≤ VA or VB ≤ 12V Absolute Short-Circuit Output Current VDD2 2.3 1 -0.8 10 -10 IDD1 VDD1 = 5V 4 VDD1 = 3.3V 3 Positive-Going Input Threshold Voltage V TH+ -7V ≤ VCM ≤ 12V Negative-Going Input Threshold Voltage V TH- -7V ≤ VCM ≤ 12V FN8860 Rev.4.00 Feb 12, 2018 µA µA Supply Current -200 mA mA ±250 mA 6 mA 4 mA 200 mV mV Page 4 of 14 ISL32704E Electrical Specifications Test Conditions: TMIN to TMAX, VDD1 = VDD2 = 4.5V to 5.5V; unless otherwise stated (see (Note 7). (Continued) PARAMETER Receiver Input Hysteresis SYMBOL VHYS TEST CONDITIONS MIN VCM = 0V TYP MAX UNIT 70 mV 9 Differential Bus Input Capacitance CD Receiver Output High Voltage VOH IO = -20µA, VID = -50mV Receiver Output Low Voltage VOL IO = +20µA, VID = -200mV High impedance Output Current IOZ 0.4V ≤ VO ≤ (VDD2 - 0.5) -1 Receiver Input Resistance RIN -7V ≤ VCM ≤ 12V 12 Supply Current IDD2 DE = VDD1 , no load 12 pF VDD1 - 0.2 VDD1 V 0.2 V 1 µA 16 mA kΩ 5 ESD PERFORMANCE RS-485 Bus Pins (A, B) Human body model discharge to GND2 ±15 kV All Pins (R, RE, D, DE) Human body model discharge to GND1 ±2 kV SWITCHING CHARACTERISTICS VDD1 = 5V, VDD2 = 5V Data Rate Propagation Delay (Notes 8, 15) Pulse Skew (Notes 8, 16) DR RL = 54Ω, CL = 50pF 4 Mbps tPD VO = -1.5V to 1.5V, CL = 15pF 48 150 ns tSK (P) VO = -1.5V to 1.5V, CL = 15pF 6 15 ns Output Enable Time to High Level tPZH CL = 15pF 33 50 ns Output Enable Time to Low Level tPZL CL = 15pF 33 50 ns Output Disable Time from High Level tPHZ CL = 15pF 33 50 ns Output Disable Time from Low Level tPLZ CL = 15pF 33 50 ns Common-Mode Transient Immunity CMTI VCM = 1500 VDC, tTRANSIENT = 25ns 30 4 50 kV/µs VDD1 = 3.3V, VDD2 = 5V Data Rate DR RL = 54Ω, CL = 50pF Propagation Delay (Notes 9, 15) tPD VO = -1.5V to 1.5V, CL = 15pF tSK (P) Pulse Skew (Notes 9, 16) Mbps 48 150 ns VO = -1.5V to 1.5V, CL = 15pF 6 20 ns tPZH CL = 15pF 33 50 ns Output Enable Time to Low Level tPZL CL = 15pF 33 50 ns Output Disable Time from High Level tPHZ CL = 15pF 33 50 ns Output Disable Time from Low Level tPLZ CL = 15pF 33 50 Common-Mode Transient Immunity CMTI VCM = 1500 VDC, tTRANSIENT = 25ns Output Enable Time to High Level 30 50 ns kV/µs NOTES: (applies to both driver and receiver sections) 7. All voltages on the isolator primary side are with respect to GND1. All line voltages and common-mode voltages on the isolator secondary or bus side are with respect to GND2. 8. Differential I/O voltage is measured at the noninverting bus terminal A with respect to the inverting terminal B. 9. Skew limit is the maximum propagation delay difference between any two devices at +25°C. 10. The power-off measurement in ANSI Standard EIA/TIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. 11. All typical values are at VDD1, VDD2 = 5V or VDD1 = 3.3V and TA = +25°C. 12. -7V < VCM < 12V; 4.5 < VDD < 5.5V. 13. VOD and VOC are the changes in magnitude of VOD and VOC respectively, that occur when the input is changed from one logic state to the other. 14. This applies for both power-on and power-off; refer to ANSI standard RS-485 for exact condition. The EIA/TIA-422 -B limit does not apply for a combined driver and receiver terminal. 15. Includes 10ns read enable time. Maximum propagation delay is 25ns after read assertion. 16. Pulse skew is defined as |tPLH - tPHL| of each channel. 17. The relevant test and measurement methods are given in the “Electromagnetic Compatibility” on page 7. 18. External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than “pin-to-pin” (see diagram in “Electromagnetic Compatibility” on page 7). FN8860 Rev.4.00 Feb 12, 2018 Page 5 of 14 ISL32704E Insulation Specifications PARAMETER SYMBOL Creepage Distance (External) TEST CONDITIONS Per IEC 60601 MIN TYP WB-SOIC 8.03 8.3 QSOP Total Barrier Thickness (Internal) RIO 500V Barrier Capacitance CIO f = 1MHz 240VRMS, 60Hz Leakage Current UNIT mm 3.2 12 Barrier Resistance MAX mm 13 µm >1014 Ω 7 pF 0.2 µARMS Comparative Tracking Index CTI Per IEC 60112 ≥175 VRMS High Voltage Endurance (Maximum Barrier Voltage for Indefinite Life) VIO At maximum operating temperature 1000 VRMS 1500 VDC Barrier Life 100°C, 1000VRMS, 60% CL activation energy 44000 Years Magnetic Field Immunity (Note 17) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT VDD1 = 5V, VDD2 = 5V Power Frequency Magnetic Immunity HPF 50Hz/60Hz 2800 3500 A/m Pulse Magnetic Field Immunity HPM tP = 8µs 4000 4500 A/m Damped Oscillatory Magnetic Field HOSC 0.1Hz to 1MHz 4000 4500 A/m Cross-Axis Immunity Multiplier (Note 18) KX 2.5 VDD1 = 3.3V, VDD2 = 5V Power Frequency Magnetic Immunity HPF 50Hz/60Hz 1000 1500 A/m Pulse Magnetic Field Immunity HPM tP = 8µs 1800 2000 A/m Damped Oscillatory Magnetic Field HOSC 0.1Hz to 1MHz 1800 2000 A/m Cross-Axis Immunity Multiplier (Note 18) FN8860 Rev.4.00 Feb 12, 2018 KX 2.5 Page 6 of 14 ISL32704E Safety and Approvals Application Information VDE V 0884-10 The ISL32704E is an isolated RS-485 transceiver designed for high-speed data transmission of up to 4Mbps. Basic Isolation; VDE File Number 5016933-4880-0001/229067 • Working voltage (VIORM) 600VRMS (848VPK); basic insulation, pollution degree 2 • Transient overvoltage (VIOTM) 4000VPK • Each part tested at 1590VPK for 1s, 5pC partial discharge limit • Samples tested at 4000VPK for 60s, then 1358VPK for 10s with 5pC partial discharge limit SYMBOL SAFETY-LIMITING VALUES VALUE UNIT TS Safety Rating Ambient Temperature 180 °C PS Safety Rating Power (180°C) 270 mW IS Supply Current Safety Rating (total of supplies) 54 mA RS-485 and Isolation RS-485 is a differential (balanced) data transmission standard for use in long haul network or noisy environments. It is a true multipoint standard, which allows up to 32 one-unit load devices (any combination of drivers and receivers) on a bus. To allow for multipoint operation, the RS-485 specification requires that drivers must handle bus contention without sustaining any damage. An important advantage of RS-485 is its wide common-mode range, which specifies that the driver outputs and the receiver inputs withstand signals ranging from +12V to -7V. This common-mode range is the sum of the ground potential difference between driver and receiver, VGPD, the driver output common-mode offset, VOC, and the longitudinally coupled noise along the bus lines, Vn: VCM = VGPD + VOC + Vn. UL 1577 VCC1 Component Recognition Program File Number: E483309 - Working voltage (VIORM) 600VRMS (848VPK); basic insulation, pollution degree 2 - Transient overvoltage (VIOTM) 4000VPK - Each part tested at 3000 VRMS (4243VPK) for 1s - Each lot samples tested at 2500 VRMS (3536VPK) for 60s VN D RT D Residential, Commercial, and Light Industrial: Methods EN55022, EN55014 EN50082-2 VGPD GND1 Immunity to external magnetic fields is even higher if the field direction is “end-to-end” rather than “pin-to-pin” as shown on the right. FN8860 Rev.4.00 Feb 12, 2018 GND2 FIGURE 3. COMMON-MODE VOLTAGES IN A NON-ISOLATED DATA LINK However, in networks using isolated transceivers, such as the ISL32704E, the supply and signal paths of the driver and receiver bus circuits are galvanically isolated from their local mains supplies and signal sources. VCC1 VCC2-ISO VCC2 VN ISO EN50204 Radiated field Industrial Environment from digital EN61000-4-2 (ESD), EN61000-4-3 (Electromagnetic Field telephones Immunity) EN61000-4-4 (EFT) EN61000-4-6 (RFI Immunity) EN61000-4-8 (Power Frequency Magnetic Field immunity) EN61000-4-9 (Pulsed Magnetic Field) EN61000-4-10 (Damped Oscillatory Magnetic Field) R R VCM TABLE 1. COMPLIANCE TEST CATEGORIES EN50081-1 RT VOC Electromagnetic Compatibility The ISL32704E is fully compliant with generic EMC standards EN50081, EN50082-1, and the umbrella line-voltage standard for information technology equipment (ITE) EN61000. The isolator’s Wheatstone bridge configuration and differential magnetic field signaling ensure excellent EMC performance against all relevant standards. Compliance tests have been conducted in the following categories: VCC2 D RT D RT R R VCM = 0V RISO VOC VCM GND2-ISO GND1 VGPD GND2 FIGURE 4. COMMON-MODE VOLTAGES IN AN ISOLATED DATA LINK Because the ground potentials of isolated bus nodes are isolated from each other, the common-mode voltage of one node’s output has no effect on the bus inputs of another node. This is because the common-mode voltage is dropping across the high-resistance isolation barrier of 1014 Ω. Thus, galvanic isolation extends the maximum allowable common-mode range of a data link to the maximum working voltage of the isolation barrier, which for the ISL32704E is 600VRMS. Page 7 of 14 ISL32704E Digital Isolator Principle EXTERNAL B-FIELD V DD2 INTERNAL B-FIELD GMR1 GMR2 GMR3 GMR4 IN OUT 60 AMPLITUDE (dBµV/m) The ISL32704E utilizes a giant magneto-resistance (GMR) isolation. Figure 5 shows the principle operation of a single channel GMR isolator. 50 FCC-B < 1GHz 3m 40 EN55022 < 1GHz 3m 30 LABORATORY NOISE FLOOR 20 10 0 10MHz QpMEASUREMENTS 100MHz 1GHz FIGURE 7. UNDETECTABLE EMISSIONS OF GMR ISOLATORS Low EMI Susceptibility GND 2 FIGURE 5. SINGLE CHANNEL GMR ISOLATOR The input signal is buffered and drives a primary coil, which creates a magnetic field that changes the resistance of the GMR resistors 1 to 4. GMR1 to GMR4 form a Wheatstone bridge in order to create a bridge output voltage that only reacts to magnetic field changes from the primary coil. Large external magnetic fields, however, are treated as common-mode fields and are therefore suppressed by the bridge configuration. The bridge output is fed into a comparator whose output signal is identical in phase and shape to the input signal. GMR Resistor in Detail Figure 6 shows a GMR resistor consisting of ferromagnetic alloy layers, B1, B2, sandwiched around an ultra thin, nonmagnetic conducting middle layer A, typically copper. The GMR structure is designed so that, in the absence of a magnetic field, the magnetic moments in B1 and B2 face opposite directions, thus causing heavy electron scattering across layer A, which increases its resistance for current C drastically. When a magnetic field D is applied, the magnetic moments in B1 and B2 are aligned and electron scattering is reduced. This lowers the resistance of layer A and increases current C. C HIGH RESISTANCE LOW RESISTANCE B1 B1 A B2 C C C A B2 D APPLIED MAGNETIC FIELD FIGURE 6. MULTI-LAYER GMR RESISTOR Low Emissions Because GMR isolators do not use fancy encoding schemes, such as RF carriers or high-frequency clocks, and do not include power transfer coils or transformers, their radiated emission spectrum is virtually undetectable. FN8860 Rev.4.00 Feb 12, 2018 Because GMR isolators have no pulse trains or carriers to interfere with, they also have very low EMI susceptibility. For the list of compliance tests conducted on GMR isolators, refer to the “Electromagnetic Compatibility” on page 7. Receiver (Rx) Features This transceiver utilizes a differential input receiver for maximum noise immunity and common-mode rejection. Input sensitivity is ±200mV, as required by the RS-485 specification. The receiver input resistance meets the RS-485 Unit Load (UL) requirement of 12kΩ minimum. The receiver includes a “fail-safe if open” function that guarantees a high level receiver output if the receiver inputs are unconnected (floating). The receiver output is tri-statable via the active low RE input. Driver (Tx) Features The RS-485 driver is a differential output device that delivers at least 1.5V across a 54Ω purely differential load. The driver features low propagation delay skew to maximize bit width and to minimize EMI. The driver in the ISL32704E is tri-statable via the active high DE input. The outputs of the ISL32704E driver are not slew rate limited, so faster output transition times allow data rates of at least 4Mbps. Built-In Driver Overload Protection As stated previously, the RS-485 specification requires that drivers survive worst-case bus contentions undamaged. The ISL32704E transmitters meet this requirement via driver output short-circuit current limits and on-chip thermal shutdown circuitry. The driver output stage incorporates short-circuit current limiting circuitry, which ensures that the output current never exceeds the RS-485 specification. In the event of a major short-circuit condition, the device also includes a thermal shutdown feature that disables the driver whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The driver automatically re-enables after the die temperature drops about 15°C. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. The receiver stays operational during thermal shutdown. Page 8 of 14 ISL32704E Dynamic Power Consumption where: The isolator within the ISL32704E achieves its low power consumption from the way it transmits data across the barrier. By detecting the edge transitions of the input logic signal and converting these to narrow current pulses, a magnetic field is created around the GMR Wheatstone bridge. Depending on the direction of the magnetic field, the bridge causes the output comparator to switch following the input signal. Since the current pulses are narrow, about 2.5ns, the power consumption is independent of the mark-to-space ratio and solely depends on frequency. • LS is the stub length (ft) • tr is the driver rise time (s) • c is the speed of light (9.8 x 108 ft/s) • v is the signal velocity as a percentage of c. To ensure the receiver output of the ISL32704E is high when the bus is not actively driven, fail-safe biasing of the bus lines is recommended. Figure 8 shows the proper termination of a high-speed data link with fail-safe biasing. TABLE 2. SUPPLY CURRENT INCREASE WITH DATA RATE DATA RATE (Mbps) IDD1 (mA) IDD2 (mA) 1 0.15 0.15 4 0.6 0.6 VS RB 542R RT2 135R RB 542R Power Supply Decoupling Both supplies, VDD1 and VDD2, must be bypassed with 100nF ceramic capacitors. These should be placed as close as possible to the supply pins for proper operation. DC CORRECTNESS The ISL32704E incorporates a patented refresh circuit to maintain the correct output state with respect to data input. At power-up, the bus outputs follow the truth tables on page 2. The DE input should be held low during power-up to prevent false drive data pulses on the bus. This can be accomplished by connecting a 10kΩ pull-down resistor between DE and GND1. Data Rate, Cables, and Terminations RS-485 is intended for network lengths up to 4000 feet, but the maximum system data rate decreases as the transmission length increases. Devices operating at 4Mbps are typically limited to lengths less than 100 feet, but are capable of driving up to 350 feet of cable when allowing for some jitter of 5%. Twisted pair is the cable of choice for RS-485 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common-mode signals, which are effectively rejected by the differential receivers in these ICs. RT1 120R FIGURE 8. FAIL-SAFE BIASING FOR HIGH-SPEED DATA LINKS Here the termination resistor value at the cable end without fail-safe biasing equals the characteristic cable impedance: RT1 = Z0. The values for RB and RT2 are calculated using Equations 2 and 3. VS Z0 R B  -----------  -----V AB 4 (EQ. 2) 2R B  Z 0 R T2 = -----------------------2R B – Z 0 (EQ. 3) where: • RB are the fail-safe biasing resistors • RT2 is the termination resistor in the fail-safe biasing network • VS is the minimum transceiver supply voltage • VAB is the minimum bus voltage of the undriven bus • Z0 is the characteristic cable impedance To minimize reflections, proper termination is imperative when using this high data rate transceiver. In point-to-point or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120Ω for RS-485) at the end farthest from the driver. In multireceiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multidriver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. A useful guideline for determining the maximum stub lengths is given with Equation 1. Note, the resistor values in Figure 8 have been calculated for VS = 4.5V, VAB = 0.25V, and Z0 = 120Ω. tr L S  ------  v  c 10 ESD (IEC61000-4-2) (EQ. 1) Transient Protection Protecting the ISL32704E against transients exceeding the device’s transient immunity requires the addition of an external TVS. For this purpose, Semtech’s RClamp0512TQ was chosen due to its high transient protection levels, low junction capacitance, and small form factor. TABLE 3. RCLAMP0512 TVS FEATURES PARAMETER EFT (IEC61000-4-4) FN8860 Rev.4.00 Feb 12, 2018 SYMBOL VALUE UNIT Air VESD ±30 kV Contact VESD ±30 kV VEFT ±4 kV Page 9 of 14 ISL32704E TABLE 3. RCLAMP0512 TVS FEATURES (Continued) PARAMETER SYMBOL VALUE UNIT Surge (IEC61000-4-5) VSURGE ±1.3 kV Junction Capacitance CJ 3 pF - 1 x 0.6 mm Form Factor The TVS is implemented between the bus lines and isolated ground (GND2). Since transient voltages on the bus lines are referenced to Earth potential, aka Protective Earth (PE), a high-voltage capacitor (CHV) is inserted between GND2 and PE, providing a low-impedance path for high-frequency transients. Note that the connection from the PE point on the isolated side to the PE point on the non-isolated side (Earth) is usually made via the metal chassis of the equipment, or via a short, thick wire of low-inductance. A high-voltage resistor (RHV) is added in parallel to CHV to prevent the build-up of static charges on floating grounds (GND2) and cable shields (typically used in Profibus). The bill of materials for the circuit in Figure 9 is listed in Table 4. the GND2 pins between Pins 9 and 15. This allows for increased layout flexibility. The wide-body version also provides an isolated DE output, ISODE, that can be used in PROFIBUS™ applications to monitor the state of the isolated drive enable node. The QSOP version (ISL32704EIAZ) is designed for application flexibility and maximum space saving in dense PCB designs. This package provides an isolated DE output (ISODE) and a separate DE input on the bus side (XDE). XDE can be used to enable the driver from the bus side, or when connected to ISODE, enable the driver from the DE input on the controller side. Two separate output supply pins are available, VDD2 for the isolation module and VDD2X for the transceiver module. Both pins should be connected externally for normal operation, or can be used separately for testing and troubleshooting. The QSOP version also has an “ISOR” output that is isolated from the receiver output “R” on the controller side. This pin is used for testing and usually left open, but it could be used for bus-side monitoring purposes in special circumstances. Figures 10 and 11 show the typical device connections for both package versions. VS-ISO VS 3.3V ISOLATION 5V BARRIER 16 1 VDD1 VDD2 100n 9 MCU / UART A ISL32704 10 1 B 2 ISODE 10 SHIELD TVS 3 GND 5 DE 100n 1.09k A 12 6 D 127R PE CHV RHV 3 R B 13 4 RE PE GND1 Non-isolated Ground Protective Earth Ground, Equipment Safety Ground FIGURE 9. TRANSIENT PROTECTION FOR ISL32704E FUNCTION ORDER NO. 170W (8µs, 20µs) 2-LINE PROTECTOR RCLAMP0512TQ SEMTECH CHV 4.7nF, 2kV, 10% CAPACITOR 1812B472K202NT NOVACAP 1MΩ, 2kV, 5% RESISTOR HVC12061M0JT3 5V BARRIER 100n 11 16 VDD2X VDD2 ISODE 15 6 D XDE 12 TT-ELECTRONICS The wide-body version (ISL32704EIBZ) has a single output power supply pin, VDD2, supplying the bus side of the isolation module and the transceiver module. This package also provides two ground pins for each supply. The GND1 pins are internally connected between Pins 2 and 8 and 1.09k A 9 5 DE Pinout Differences Between Packages FN8860 Rev.4.00 Feb 12, 2018 3.3V ISOLATION 1 VDD1 VENDOR TVS RHV ISL32704EIBZ FIGURE 10. TYPICAL WB-SOIC TRANSCEIVER CONNECTIONS 100n TABLE 4. BOM FOR CIRCUIT IN Figure 9 NAME 9,15 2,8 Isolated Ground, Floating RS-485 Common 1.09k GND2 127R 2 R B 10 ISOR 13 4 RE GND1 GND2 1.09k 14 3 ISL32704EIAZ FIGURE 11. TYPICAL QSOP TRANSCEIVER CONNECTIONS Page 10 of 14 ISL32704E Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit our website to make sure you have the latest revision. DATE REVISION CHANGE Feb 12, 2018 FN8860.4 Updated Note 1 and added Note 2. Updated VDE and UL certification file numbers. Updated Thermal Information (Theta JA, JC values) -Changed the 16ld WB-SOIC Package from 60, 12 to 34, 17. -Changed the 16ld QSOP Package from 60, 10 to 63, 35. POD M16.3A - updated from rev 0 to rev 1. Changes: Updated Typical Recommended Land Pattern dimensions lead height from 2.2 to 1.7, lead width from 0.6 to 0.51, and body center to center from 9.2 to 9.75. Removed About Intersil section. Mar 29, 2017 FN8860.3 Added WB-SOIC information throughout document. Updated Feature bullets Updated Notes 5 and 6. Feb 10, 2017 FN8860.2 On page 2, Ordering Information, changed ISL32704EIAZ-EVALZ to ISL32704EVAL1Z. Jan 19, 2017 FN8860.1 Updated Figure 1 on page 1 and Figure 2 on page 3. Changed from dual to single failsafe biasing. On page 2, Ordering Information, added ISL32704EIAZ-EVALZ and Note 1 for tape and reel and quantity. On page 7 in VDE V 0884-11 (Certification Pending) and UL 1577 sections, changed from “Standard” to “Basic” isolation. Dec 12, 2016 FN8860.0 Initial Release FN8860 Rev.4.00 Feb 12, 2018 Page 11 of 14 ISL32704E Package Outline Drawing For the most recent package outline drawing, see M16.15B. M16.15B 16 LEAD QUARTER-SIZE SMALL OUTLINE PLASTIC PACKAGE (QSOP) Rev 0, 9/16 1 A 3 4.77 5.00 16 5.8 6.2 2 3.8 4.0 9 3 SEE DETAIL "X" PIN #1 I.D. MARK 45° NOM 1 8 0.635 0.20 0.25 B TOP VIEW END VIEW 0.05 H 1.00 REF 1.52 1.75 C SEATING PLANE 1.27 1.42 0.10 0.25 0.2 0.3 0.10 C 0.10 MIN 0.25 MAX 5 0.10 M C B A SIDE VIEW GAUGE PLANE 0.25 0° TO 8° 0.50 0.75 DETAIL X (0.38) (1.53) NOTES: 1. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. 2. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. (5.30) 3. Dimensions are measured at datum plane H. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Dimension does not include dambar protrusion. 6. Dimension in ( ) are for reference only. 7. Pin spacing is a BASIC dimension; tolerances do not accumulate. (0.635) 8. Dimensions are in mm. TYPICAL RECOMMENDED LAND PATTERN FN8860 Rev.4.00 Feb 12, 2018 Page 12 of 14 ISL32704E Package Outline Drawing For the most recent package outline drawing, see M16.3A. M16.3A 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOICW) Rev 1, 6/17 10.08 10.49 1 3 0.3 0.5 16 10.00 10.64 2 7.42 7.59 SEE DETAIL "X" 9 6.60 7.11 PIN #1 I.D. MARK 3 1 0.18 0.25 0.85 1.10 8 1.24 1.30 0.2 0.3 TOP VIEW END VIEW 0.05 H 2.34 2.67 C 2.0 2.5 SEATING PLANE 0.1 0.3 0.10 C GAUGE PLANE 0.25 0.3 5 0.5 0.1 M C B A 0.1 MIN 0.3 MAX SIDE VIEW 0.40 1.30 0° TO 8° DETAIL X (1.7) NOTES: 1. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. 2. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. (9.75) 3. Dimensions are measured at datum plane H. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Dimension does not include dambar protrusion. 6. Dimension in ( ) are for reference only. 7. Pin spacing is a BASIC dimension; tolerances do not accumulate. 8. Dimensions are in mm. (1.27) (0.51) TYPICAL RECOMMENDED LAND PATTERN FN8860 Rev.4.00 Feb 12, 2018 Page 13 of 14 Notice 1. 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