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ISL4270EIR

ISL4270EIR

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    QFN32

  • 描述:

    IC TRANSCEIVER FULL 3/3 32QFN

  • 数据手册
  • 价格&库存
ISL4270EIR 数据手册
Datasheet ISL4270E QFN Packaged, ±15kV ESD Protected, +3V to +5.5V, 300nA, 250kbps, RS-232 Transceivers with Enhanced Automatic Powerdown and a Separate Logic Supply The ISL4270E is a 3.0V to 5.5V powered RS-232 transceiver that meets ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. It provides ±15kV ESD protection (IEC61000-4-2 Air Gap and Human Body Model) on transmitter outputs and receiver inputs (RS-232 pins). Targeted applications are notebook and laptop computers where the low operational power consumption and even lower standby power consumption is critical. Efficient on-chip charge-pumps coupled with manual and enhanced automatic powerdown functions reduce the standby supply current to a 300nA trickle. The 5mmx5mm Quad Flat No-Lead (QFN) packaging and the use of small, low value capacitors ensure board space savings. Data rates greater than 250kbps are ensured at worst case load conditions. The ISL4270E features a VL pin that adjusts the logic pin output levels and input thresholds to values compatible with the VCC powering the external logic (for example, a UART). This device includes an enhanced automatic powerdown function that powers down the on-chip power-supply and driver circuits. Automatic powerdown occurs when all receiver and transmitter inputs detect no signal transitions for a period of 30 seconds. The ISL4270E automatically powers back up whenever it senses a transition on any transmitter or receiver input. Table 1 summarizes the features of the ISL4270E. Application Note AN9863 summarizes the features of each device comprising the 3V RS-232 family. Features • Available in near chip scale QFN (5mmx5mm) package • VL supply pin for compatibility with mixed voltage systems • ESD protection for RS-232 I/O pins to 15kV (IEC61000) • Manual and enhanced automatic powerdown features • Meets EIA/TIA-232 and V.28/V.24 specifications at 3V • On-chip charge pumps require only four external 0.1µF capacitors • Receivers stay active in powerdown • Very low supply current: 300µA • Guaranteed minimum data rate: 50kbps • Wide power supply range: single +3V to +5.5V • Low supply current in powerdown state: 300nA • Pb-free (RoHS compliant) Applications • Any system requiring RS-232 communication ports ○ Battery powered, hand-held, and portable equipment ○ Industrial laptops, Palmtops, and PDAs ○ Digital cameras Related Literature For a full list of related documents, visit our website: • ISL4270E device page Table 1. Summary of Features Part Number No. of Tx. No. of Rx. Data Rate (kbps) Rx. Enable Function? VL Logic Supply Pin? Manual Powerdown? Enhanced Automatic Powerdown Function? ISL4270E 3 3 250 No Yes Yes Yes FN6041 Rev.3.00 Apr 26, 2019 Page 1 of 23 ISL4270E Contents 1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 1.2 1.3 1.4 2. Typical Operating Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 4 4 Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 2.2 2.3 2.4 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 6 3. Typical Performance Curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4. Application Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 4.1.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 4.12 4.13 4.14 4.15 4.16 5. Charge Pump. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charge Pump Abs Max Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low Power Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Powerdown Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Software Controlled (Manual) Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enhanced Automatic Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Emulating Standard Automatic Powerdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hybrid Automatic Powerdown Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VL Logic Supply Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . INVALID Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter Outputs when Exiting Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . High Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interconnection with 3V and 5V Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 11 11 12 12 12 13 14 15 15 15 16 16 16 17 18 ±15kV ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1 Human Body Model (HBM) Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 IEC61000-4-2 Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.1 Air-Gap Discharge Test Method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.2 Contact Discharge Test Method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 19 19 6. Die Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8. Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 FN6041 Rev.3.00 Apr 26, 2019 Page 2 of 23 ISL4270E 1. 1.1 1. Overview Overview Typical Operating Circuit +3.3V + 0.1µF 29 C1 0.1µF + C2 0.1µF + 31 2 3 27 C1+ VCC 30 V+ C1C2+ 4 V- C2T1 5 23 T1IN T2IN T2 6 22 T3 10 21 T3IN TTL/CMOS Logic Levels R1 14 20 R1OUT + C3 0.1µF C4 0.1µF + T1OUT T2OUT RS-232 Levels T3OUT R1IN 5kΩ R2OUT R2 13 19 R2IN 5kΩ R3 12 18 R3OUT RS-232 Levels R3IN 5kΩ Logic VCC 0.1µF 15 + 11 28 VCC To Power Control Logic 7 VL FORCEON FORCEOFF INVALID GND 26 1.2 Ordering Information Part Number (Notes 2, 3) Part Marking Temp. Range (°C) Tape and Reel (Units) (Note 1) Pkg. Dwg. # Package ISL4270EIRZ ISL4270 EIRZ -40 to +85 - 32 Ld QFN (Pb-free) L32.5x5B ISL4270EIRZ-T ISL4270 EIRZ -40 to +85 6k 32 Ld QFN (Pb-free) L32.5x5B Notes: 1. See TB347 for details about reel specifications. 2. These Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu-Ag plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), see the ISL4270E device page. For more information about MSL, see TB363. FN6041 Rev.3.00 Apr 26, 2019 Page 3 of 23 ISL4270E 1.3 1. Overview Pinout 1.4 NC C1- V+ C1+ FORCEOFF VCC GND NC 32 Ld 5x5 QFN Package Top View 32 31 30 29 28 27 26 25 NC 1 24 NC C2+ 2 23 T1OUT C2- 3 22 T2OUT V- 4 21 T3OUT 20 R1IN PD 18 R3IN NC 8 17 NC 9 10 11 12 13 14 15 16 NC 7 VL INVALID R1OUT R2IN R2OUT 19 R3OUT 6 FORCEON T2IN T3IN 5 NC T1IN Pin Descriptions Pin Name Description NC No connect. C2+ External capacitor (voltage inverter) is connected to this lead. C2- External capacitor (voltage inverter) is connected to this lead. V- Internally generated negative transmitter supply (-5.5V). TIN TTL/CMOS compatible transmitter inputs. The switching point is a function of the VL voltage. INVALID Active low output that indicates if no valid RS-232 levels are present on any receiver input. Swings between GND and VL. FORCEON Active high input to override automatic powerdown circuitry, which keeps transmitters active (FORCEOFF must be high). The switching point is a function of the VL voltage. ROUT TTL/CMOS level receiver outputs. Swings between GND and VL. VL Logic-level supply. All TTL/CMOS inputs and outputs are powered by this supply. RIN ±15kV ESD protected, RS-232 compatible receiver inputs. TOUT ±15kV ESD protected, RS-232 level (nominally ±5.5V) transmitter outputs. GND Ground connection. This is also the potential of the thermal pad (PD). VCC System power supply input (3.0V to 5.5V). FORCEOFF C1+ Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 5 on page 12). The switching point is a function of the VL voltage. External capacitor (voltage doubler) is connected to this lead. V+ Internally generated positive transmitter supply (+5.5V). C1- External capacitor (voltage doubler) is connected to this lead. PD Exposed thermal pad. Connect to GND. FN6041 Rev.3.00 Apr 26, 2019 Page 4 of 23 ISL4270E 2. 2. Specifications Specifications 2.1 Absolute Maximum Ratings Minimum Maximum Unit VCC to Ground Parameter -0.3 6 V VL to Ground -0.3 7 V V+ to Ground -0.3 7 V V- to Ground +0.3 -7 V 14 14 V -0.3 6 V ±25 V ±13.2 V VL +0.3 V Continuous - V+ to VInput Voltages TIN, FORCEON, FORCEOFF RIN Output Voltages TOUT ROUT, INVALID -0.3 Short Circuit Duration TOUT See “ESD Performance” on page 7 ESD Rating CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely impact product reliability and result in failures not covered by warranty. 2.2 Thermal Information Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 30 2.2 32 Ld QFN Package (Notes 4, 5) Notes: 4. θJA is measured in free air with the component mounted on a high-effective thermal conductivity test board with “direct attach” features. See TB379 and TB389. 5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.. Parameter Minimum Maximum Junction Temperature Maximum Storage Temperature Range -65 Pb-Free Reflow Profile 2.3 Maximum Unit +150 °C +150 °C see TB493 Recommended Operating Conditions Parameter Temperature Range FN6041 Rev.3.00 Apr 26, 2019 Minimum Maximum Unit -40 +85 °C Page 5 of 23 ISL4270E 2.4 2. Specifications Electrical Specifications Test conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF, VL = VCC; unless otherwise specified. Typicals are at TA = 25°C, VCC = VL = 3.3V Parameter Test Conditions Temp (°C) Min Note 7 Typ Max Note 7 Unit DC Characteristics Supply Current, Automatic Powerdown All RIN Open, FORCEON = GND, FORCEOFF = VCC 25 - 0.3 5 µA Supply Current, Powerdown FORCEOFF = GND 25 - 0.3 5 µA Supply Current, Automatic Powerdown Disabled All Outputs Unloaded, FORCEON = FORCEOFF = VCC, VCC = 3.15V 25 - 0.3 1 mA TIN, FORCEON, FORCEOFF VL = 3.3V or 5V Full - - 0.8 V VL = 2.5V Full - - 0.6 V VL = 5V Full 2.4 - - V VL = 3.3V Full 2.0 - - V VL = 2.5V Full 1.4 - - V VL = 1.8V 25 - 0.9 - V 25 - 0.5 - V TIN, FORCEON, FORCEOFF Full - ±0.01 ±1.0 µA Output Voltage Low IOUT = 1.6mA Full - - 0.4 V Output Voltage High IOUT = -1.0mA Full VL - 0.6 VL - 0.1 - V Full -25 - 25 V VCC = VL = 5.0V 25 0.8 1.5 - V VCC = VL = 3.3V 25 0.6 1.2 - V VCC = VL = 5.0V 25 - 1.8 2.4 V VCC = VL = 3.3V 25 - 1.5 2.4 V Input Hysteresis 25 - 0.5 - V Input Resistance 25 3 5 7 kΩ Logic and Transmitter Inputs Input Logic Threshold Low Input Logic Threshold High TIN, FORCEON, FORCEOFF Transmitter Input Hysteresis Input Leakage Current Receiver Outputs Receiver Inputs Input Voltage Range Input Threshold Low Input Threshold High Transmitter Outputs Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full 5.0 5.4 - V Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M - Ω Output Short-Circuit Current VOUT = 0V Full - 35 60 mA Output Leakage Current VOUT = ±12V, VCC = 0V or 3V to 5.5V Automatic Powerdown or FORCEOFF = GND Full - - 25 µA Enhanced Automatic Powerdown (FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to INVALID High See Figure 11 Full -2.7 - 2.7 V Receiver Input Thresholds to INVALID Low See Figure 11 Full -0.3 - 0.3 V INVALID Output Voltage Low IOUT = 1.6mA Full - - 0.4 V INVALID Output Voltage High IOUT = -1.0mA Full VL - 0.6 - - V Receiver Positive or Negative Threshold to INVALID High Delay (tINVH) See Figure 13 25 - 1 - µs FN6041 Rev.3.00 Apr 26, 2019 Page 6 of 23 ISL4270E 2. Specifications Test conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF, VL = VCC; unless otherwise specified. Typicals are at TA = 25°C, VCC = VL = 3.3V Parameter Test Conditions Temp (°C) Min Note 7 Typ Max Note 7 Unit Receiver Positive or Negative Threshold to INVALID Low Delay (tINVL) See Figure 13 25 - 30 - µs Receiver or Transmitter Edge to Transmitters Enabled Delay (tWU) Note 6, see Figure 13 25 - 100 - µs Receiver or Transmitter Edge to Transmitters Disabled Delay (tAUTOPWDN) Note 6, see Figure 13 Full 15 30 60 s Timing Characteristics Maximum Data Rate RL = 3kΩCL = 1000pF, One Transmitter Switching Full 250 500 - kbps Receiver Propagation Delay Receiver Input to Receiver Output, CL = 150pF tPHL 25 - 0.15 - µs tPLH 25 - 0.15 - µs TX | VOUT | ≥ 3.7V 25 - 100 - µs Transmitter Skew tPHL - tPLH 25 - 100 - ns Receiver Skew tPHL - tPLH 25 - 50 - ns Transition Region Slew Rate VCC = 3.3V, RL = 3kΩto 7kΩ Measured From 3V to -3V or -3V to 3V CL = 150pF to 1000pF 25 6 18 30 V/µs CL = 150pF to 2500pF 25 4 13 30 V/µs Human Body Model 25 - ±15 - kV IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV IEC61000-4-2 Contact Discharge 25 - ±8 - kV Time to Exit Powerdown ESD Performance RS-232 Pins (TOUT, RIN) Notes: 6. An edge is defined as a transition through the transmitter or receiver input thresholds. 7. Parameters with Min and/or Max limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. FN6041 Rev.3.00 Apr 26, 2019 Page 7 of 23 ISL4270E 3. 3. Typical Performance Curves Typical Performance Curves VCC = VL = 3.3V, TA = 25°C 30 6.0 VOUT+ 25 2.0 Slew Rate (V/µs) Transmitter Output Voltage (V) 4.0 1 Transmitter at 250kbps Other Transmitters at 30kbps 0 -2.0 -6.0 0 1000 2000 3000 4000 +Slew 15 -Slew 10 VOUT - -4.0 20 5 5000 0 1000 3000 4000 5000 Figure 2. Slew Rate vs Load Capacitance Figure 1. Transmitter Output Voltage vs Load Capacitance 45 3.5 40 No Load All Outputs Static 3.0 250kbps 35 2.5 Supply Current (mA) Supply Current (mA) 2000 Load Capacitance (pF) Load Capacitance (pF) 30 120kbps 25 20 20kbps 15 2.0 1.5 1.0 0.5 10 0 1000 2000 3000 4000 5000 Load Capacitance (pF) Figure 3. Supply Current vs Load Capacitance When Transmitting Data FN6041 Rev.3.00 Apr 26, 2019 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Supply Voltage (V) Figure 4. Supply Current vs Supply Voltage Page 8 of 23 ISL4270E 3. Typical Performance Curves VCC = VL = 3.3V, TA = 25°C (Continued) 10m 1m No Load All Outputs Static VCC = 3.3V 100µ IL (A) 10µ VL ≤ VCC VL > VCC 1µ 100n 10n 1n 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 VL (V) Figure 5. VL Supply Current vs VL Voltage FN6041 Rev.3.00 Apr 26, 2019 Page 9 of 23 ISL4270E 4. 4. Application Information Application Information The ISL4270E operates from a single +3V to +5.5V supply, ensures a 250kbps minimum data rate, requires only four small external 0.1µF capacitors, features low power consumption, and meets all ElA RS-232C and V.28 specifications. 4.1 Charge Pump The ISL4270E uses regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate ±5.5V transmitter supplies from a VCC supply as low as 3.0V. These voltages allow the ISL4270E to maintain RS-232 compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions over the full VCC range; other capacitor combinations can be used as shown in Table 6 on page 16. The charge pumps operate discontinuously (turning off as soon as the V+ and V- supplies are pumped up to the nominal values) and provide significant power savings. 4.1.1 Charge Pump Abs Max Ratings The ISL4270E is fully characterized for 3.0V to 3.6V operation and at critical points for 4.5V to 5.5V operation. Furthermore, load conditions were favorable using static logic states only. The specified maximum values for V+ and V- are +7V and -7V, respectively. These limits apply for VCC values set to 3.0V and 3.6V (see Table 2). For VCC values set to 4.5V and 5.5V, the maximum values for V+ and V- can approach +9V and -7V, respectively (Table 3 on page 11). The breakdown characteristics for V+ and Vwere measured with ±13V. Table 2. V+ and V- Values for VCC = 3.0V to 3.6V C1 (μF) C2, C3, C4 (μF) Load T1IN (Logic State) 0.1 0.1 Open H 3kΩ // 1000pF 0.047 0.33 Open 3kΩ // 1000pF 1 1 Open 3kΩ // 1000pF FN6041 Rev.3.00 Apr 26, 2019 V+ (V) V- (V) VCC = 3.0V VCC = 3.6V VCC = 3.0V VCC = 3.6V 5.80 6.56 -5.60 -5.88 L 5.80 6.56 -5.60 -5.88 2.4kbps 5.80 6.56 -5.60 -5.88 H 5.88 6.60 -5.56 -5.92 L 5.76 6.36 -5.56 -5.76 2.4kbps 6.00 6.64 -5.64 -5.96 H 5.68 6.00 -5.60 -5.60 L 5.68 6.00 -5.60 -5.60 2.4kbps 5.68 6.00 -5.60 -5.60 H 5.76 6.08 -5.64 -5.64 L 5.68 6.04 -5.60 -5.60 2.4kbps 5.84 6.16 -5.64 -5.72 H 5.88 6.24 -5.60 -5.60 L 5.88 6.28 -5.60 -5.64 2.4kbps 5.80 6.20 -5.60 -5.60 H 5.88 6.44 -5.64 -5.72 L 5.88 6.04 -5.64 -5.64 2.4kbps 5.92 6.40 -5.64 -5.64 Page 10 of 23 ISL4270E 4. Application Information Table 3. V+ and V- Values for VCC = 4.5V to 5.5V C1 (μF) C2, C3, C4 (μF) Load T1IN (Logic State) 0.1 0.1 Open H 7.44 8.48 -6.16 -6.40 L 7.44 8.48 -6.16 -6.44 2.4kbps 7.44 8.48 -6.17 -6.44 H 7.76 8.88 -6.36 -6.72 3kΩ // 1000pF 0.047 0.33 Open 3kΩ // 1000pF 1 1 Open 3kΩ // 1000pF V+ (V) VCC = 4.5V V- (V) VCC = 5.5V VCC = 4.5V VCC = 5.5V L 7.08 8.00 -5.76 -5.76 2.4kbps 7.76 8.84 -6.40 -6.64 H 6.44 6.88 -5.80 -5.88 L 6.48 6.88 -5.84 -5.88 2.4kbps 6.44 6.88 -5.80 -5.88 H 6.64 7.28 -5.92 -6.04 L 6.24 6.60 -5.52 -5.52 2.4kbps 6.72 7.16 -5.92 -5.96 H 6.84 7.60 -5.76 -5.76 L 6.88 7.60 -5.76 -5.76 2.4kbps 6.92 7.56 -5.72 -5.76 H 7.28 8.16 -5.80 -5.92 L 6.44 6.84 -5.64 -6.84 2.4kbps 7.08 7.76 -5.80 -5.80 The resulting new maximum voltages at V+ and V- are listed in Table 4. Table 4. 4.2 New Measured Withstanding Voltages V+, V- to Ground ±13V V+ to V- 20V Transmitters The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. These transmitters are coupled with the on-chip ±5.5V supplies to deliver true RS-232 levels across a wide range of single supply system voltages. All transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see Table 5 on page 12). The outputs can be driven to ±12V when disabled. All devices ensure a 250kbps data rate for full load conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one transmitter easily operates at 1.25Mbps. The transmitter input threshold is set by the voltage applied to the VL supply pin. Transmitter inputs float if they are unconnected (there are no pull-up resistors), and may cause ICC increases. Connect unused inputs to GND for the best performance. 4.3 Receivers The ISL4270E contains standard inverting receivers that convert RS-232 signals to CMOS output levels and accept inputs up to ±25V while presenting the required 3kΩ to 7kΩ input impedance (see Figure 6 on page 12) even if the power is off (VCC = 0V). The receivers’ Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. Receiver outputs swing from GND to VL and do not tristate in powerdown (see Table 5). FN6041 Rev.3.00 Apr 26, 2019 Page 11 of 23 ISL4270E 4. Application Information VL RXOUT RXIN -25V ≤ VRIN ≤ +25V 5kΩ GND ≤ VROUT ≤ VL GND Figure 6. Receiver Connections 4.4 Low Power Operation The 3V ISL4270E requires a nominal supply current of 0.3mA, even at VCC = 5.5V during normal operation (not in powerdown mode). This supply current is considerably less than the 11mA current required by comparable 5V RS-232 devices, which allows you to reduce system power by replacing the old device with the ISL4270E in new designs. 4.5 Powerdown Functionality The already low current requirement drops significantly when the device enters powerdown mode. In powerdown, supply current drops to 1µA because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter outputs tristate. This micro-power mode makes the ISL4270E ideal for battery powered and portable applications. 4.6 Software Controlled (Manual) Powerdown The ISL4270E allows you to force the IC into the low power, standby state, and uses a two pin approach where the FORCEON and FORCEOFF inputs determine the IC’s mode. For always enabled operation, FORCEON and FORCEOFF are both strapped high. Under logic or software control, only the FORCEOFF input needs to be driven to switch between active and powerdown modes. The FORCEON state is not critical because FORCEOFF overrides FORCEON. However, if strictly manual control over powerdown is needed, you must strap FORCEON high to disable the enhanced automatic powerdown circuitry. Connecting FORCEOFF and FORCEON together disables the enhanced automatic powerdown feature and enables them to function as a manual SHUTDOWN input (see Figure 7 on page 13). With any of the above control schemes, the time required to exit powerdown and resume transmission is only 100µs. When using both manual and enhanced automatic powerdown (FORCEON = 0), the ISL4270E does not power up from manual powerdown until both FORCEOFF and FORCEON are driven high, or until a transition occurs on a receiver or transmitter input. Figure 8 on page 13 shows a circuit for ensuring that the ISL4270E powers up as soon as FORCEOFF switches high. The rising edge of the Master Powerdown signal forces the device to power up and the ISL4270E returns to enhanced automatic powerdown mode an RC time constant after this rising edge. The time constant is not critical because the ISL4270E remains powered up for 30 seconds after the FORCEON falling edge, even if there are no signal transitions. This gives slow-to-wake systems (for example, a mouse) plenty of time to start transmitting, and as long as it starts transmitting within 30 seconds both systems remain enabled. Table 5. Powerdown Logic Truth Table Rcvr or Xmtr Edge Within 30 Sec? FORCEOFF Input FORCEO N Input Transmitter Outputs Receiver Outputs RS-232 Level Present at Receiver Input? INVALID Output No H H Active Active No L No H H Active Active Yes H Yes H L Active Active No L Yes H L Active Active Yes H No H L High-Z Active No L No H L High-Z Active Yes H FN6041 Rev.3.00 Apr 26, 2019 Mode of Operation Normal Operation (Enhanced Auto Powerdown Disabled) Normal Operation (Enhanced Auto Powerdown Enabled) Powerdown Due to Enhanced Auto Powerdown Logic Page 12 of 23 ISL4270E Table 5. 4. Application Information Powerdown Logic Truth Table Rcvr or Xmtr Edge Within 30 Sec? FORCEOFF Input X L X L FORCEO N Input RS-232 Level Present at Receiver Input? INVALID Output Transmitter Outputs Receiver Outputs X High-Z Active No L X High-Z Active Yes H Mode of Operation Manual Powerdown INVALID Driving FORCEON and FORCEOFF (Emulates Automatic Powerdown) X Note 8 Note 8 Active Active Yes H Normal Operation X Note 8 Note 8 High-Z Active No L Forced Auto Powerdown Note: 8. Input is connected to the INVALID output. FORCEOFF, FORCEON Power Management Logic INVALID I/O Chip Power Supply VL ISL4270E VCC CPU I/O UART Figure 7. Connections for Manual Powerdown Power Management Unit Master Powerdown Line 0.1µF FORCEOFF 1MΩ FORCEON ISL4270E Figure 8. Circuit to Ensure Immediate Power Up When Exiting Forced Powerdown 4.7 Enhanced Automatic Powerdown Even greater power savings are available by using the enhanced automatic powerdown function. When the enhanced powerdown logic determines that no transitions have occurred on any of the transmitter or receiver inputs for 30 seconds, the charge pump and transmitters powerdown and reduce the supply current to 1µA. The ISL4270E automatically powers back up whenever it detects a transition on one of these inputs. The automatic powerdown feature provides additional system power savings without changes to the existing operating system. FN6041 Rev.3.00 Apr 26, 2019 Page 13 of 23 ISL4270E 4. Application Information Enhanced automatic powerdown operates when the FORCEON input is low and the FORCEOFF input is high. Tying FORCEON high disables automatic powerdown, but manual powerdown is always available from the overriding FORCEOFF input. Table 5 summarizes the enhanced automatic powerdown functionality. Figure 9 shows the enhanced powerdown control logic. Note: When the ISL4270E enters powerdown (manually or automatically), the 30 second timer remains timed out (set) and keeps the ISL4270E powered down until FORCEON transitions high, or until a transition occurs on a receiver or transmitter input. The INVALID output switches low whenever invalid levels have persisted on all of the receiver inputs for more than 30µs (see Figure 13), but this has no direct effect on the state of the ISL4270E (see “Emulating Standard Automatic Powerdown” on page 14 and “Capacitor Selection” on page 16 for methods of using INVALID to power down the device). The time to recover from automatic powerdown mode is typically 100µs. FORCEOFF T_IN Edge Detect S 30s Timer R_IN AUTOPWDN R Edge Detect FORCEON Figure 9. Enhanced Automatic Powerdown Logic FORCEOFF FORCEON Emulating Standard Automatic Powerdown INVALID 4.8 ISL4270E I/O UART CPU Figure 10. Connections for Automatic Powerdown When No Valid Receiver Signals are Present If enhanced automatic powerdown is not required, you can implement the standard automatic powerdown feature (mimics the function on the ICL3221E/23E/43E) by connecting the INVALID output to the FORCEON and FORCEOFF inputs, as shown in Figure 10. After 30µs of invalid receiver levels, INVALID switches low and drives the ISL4270E into a forced powerdown condition. INVALID switches high as soon as a receiver input senses a valid RS-232 level and forces the ISL4270E to power on. See the “INVALID DRIVING FORCEON AND FORCEOFF” section of Table 5 on page 12 for an operational summary. This operational mode is perfect for handheld devices that communicate with another computer through a detachable cable. Detaching the cable allows the internal receiver pull-down resistors to pull the inputs to GND (an invalid RS-232 level), which causes the 30µs timer to time out and drive the IC into powerdown. Reconnecting the cable restores valid levels and causes the IC to power back up. FN6041 Rev.3.00 Apr 26, 2019 Page 14 of 23 ISL4270E 4.9 4. Application Information Hybrid Automatic Powerdown Options For devices that communicate only through a detachable cable, you can connect INVALID to FORCEOFF (with FORCEON = 0). While the cable is attached, INVALID and FORCEOFF remain high, so the enhanced automatic powerdown logic powers down the RS-232 device whenever there is 30 seconds of inactivity on the receiver and transmitter inputs. Detaching the cable allows the receiver inputs to drop to an invalid level (GND), so INVALID switches low and forces the RS-232 device to power down. The ISL4270E remains powered down until the cable is reconnected (INVALID = FORCEOFF = 1) and a transition occurs on a receiver or transmitter input (see Figure 9 on page 14). For immediate power up when the cable is reattached, connect FORCEON to FORCEOFF through a network similar to that shown in Figure 8 on page 13. 4.10 VL Logic Supply Input Unlike other RS-232 interface devices where the CMOS outputs swing between 0V and VCC, the ISL4270E features a separate logic supply input (VL; 1.8V to 5V, regardless of VCC) that sets VOH for the receiver and INVALID outputs. Connecting VL to a host logic supply lower than VCC prevents the ISL4270E outputs from forward biasing the input diodes of a logic device powered by that lower supply. Connecting VL to a logic supply greater than VCC ensures that the receiver and INVALID output levels are compatible even with the CMOS input VIH of AC, HC, and CD4000 devices. Note: The VL supply current increases to 100µA with VL = 5V and VCC = 3.3V (see Figure 5 on page 9). VL also powers the transmitter and logic inputs and sets their switching thresholds to levels compatible with the logic supply. The separate logic supply pin allows a great deal of flexibility in interfacing to systems with different logic supplies. If logic translation is not required, connect VL to the ISL4270E VCC pin. 4.11 INVALID Output Table 5 on page 12 shows that the INVALID output always indicates whether 30µs have elapsed with invalid RS-232 signals (see Figures 11 and 13) persisting on all of the receiver inputs. The indicator provides an easy way to determine when the interface block should power down. Invalid receiver levels occur whenever the driving peripheral’s outputs are shut off (powered down) or when the RS-232 interface cable is disconnected. If an interface cable is disconnected and all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the INVALID logic detects the invalid levels and drives the output low. The power management logic then uses this indicator to power down the interface block. Reconnecting the cable restores valid levels at the receiver inputs, INVALID switches high, and the power management logic wakes up the interface block. INVALID can also be used to indicate the DTR or RING INDICATOR signal as long as the other receiver inputs are floating or driven to GND (as in the case of a powered down driver). INVALID switches high 1µs after detecting a valid RS-232 level on a receiver input. INVALID operates in all modes (forced or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry. 2.7V VALID RS-232 LEVEL - INVALID = 1 Indeterminate 0.3V Invalid Level - INVALID = 0 -0.3V Indeterminate -2.7V Valid RS-232 Level - INVALID = 1 Figure 11. Definition of Valid RS-232 Receiver Levels FN6041 Rev.3.00 Apr 26, 2019 Page 15 of 23 ISL4270E 4.12 4. Application Information Capacitor Selection The ISL4270E charge-pumps require only 0.1µF capacitors for the full operational voltage range. Table 6 lists other acceptable capacitor values for various supply voltage ranges. Do not use values smaller than those listed in Table 6. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. Table 6. Required Capacitor Values VCC (V) C1 (µF) C2, C3, C4 (µF) 3.0 to 3.6 0.1 0.1 4.5 to 5.5 0.047 0.33 3.0 to 5.5 0.22 1 When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s equivalent series resistance (ESR) usually rises at low temperatures and influences the amount of ripple on V+ and V-. 4.13 Power Supply Decoupling In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge pump capacitor C1. Connect the bypass capacitor as close as possible to the IC. 4.14 Transmitter Outputs when Exiting Powerdown Figure 12 shows the response of two transmitter outputs when exiting powerdown mode. As the transmitter outputs activate, they properly go to opposite RS-232 levels, with no glitching, ringing, or undesirable transients. Each transmitter is loaded with 3kΩin parallel with 2500pF. Note: The transmitters enable only when the magnitude of the supplies exceeds approximately 3V. 5V/Div FORCEOFF T1 2V/Div T2 VCC = +3.3V C1 - C4 = 0.1µF Time (20µs/Div) Figure 12. Transmitter Outputs When Exiting Powerdown FN6041 Rev.3.00 Apr 26, 2019 Page 16 of 23 ISL4270E 4. Application Information } Invalid Region Receiver Inputs Transmitter Inputs Transmitter Outputs tINVH INVALID Output tINVL tAUTOPWDN tWU tAUTOPWDN tWU V+ VCC 0 V- Figure 13. Enhanced Automatic Powerdown and Invalid Timing Diagrams 4.15 High Data Rates The ISL4270E maintains the RS-232 5V minimum transmitter output voltages even at high data rates. Figure 14 shows a transmitter loopback test circuit, and Figure 15 on page 18 shows the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF at 120kbps. Figure 16 on page 18 shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static transmitters were also loaded with an RS-232 receiver. VCC + 0.1µF + C1 VCC C1+ VL V+ C1+ C2 ISL4270E V- C2+ C2TIN ROUT FORCEON VCC + C3 C4 + TOUT RIN 1000pF 5k FORCEOFF Figure 14. Transmitter Loopback Test Circuit FN6041 Rev.3.00 Apr 26, 2019 Page 17 of 23 ISL4270E 4. Application Information 5V/Div T1IN T1OUT R1OUT VCC = +3.3V C1 - C4 = 0.1µF 5µs/Div Figure 15. Loopback Test at 120kbps 5V/Div T1IN T1OUT R1OUT VCC = +3.3V C1 - C4 = 0.1µF 2µs/Div Figure 16. Loopback Test at 250kbps 4.16 Interconnection with 3V and 5V Logic Standard 3.3V powered RS-232 devices interface well with 3V and 5V powered TTL compatible logic families (such as ACT and HCT), but the logic outputs (for example, ROUTS) fail to reach the VIH level of 5V powered CMOS families like HC, AC, and CD4000. The ISL4270E VL supply pin solves this problem. By connecting VL to the same supply (1.8V to 5V) powering the logic device, the ISL4270E logic outputs swing from GND to the logic VCC. FN6041 Rev.3.00 Apr 26, 2019 Page 18 of 23 ISL4270E 5. 5. ±15kV ESD Protection ±15kV ESD Protection All pins on the 3V interface devices include ESD protection structures, but the ISL4270E incorporates advanced structures that allow the RS-232 pins (transmitter outputs and receiver inputs) to survive ESD events up to ±15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Touching the port pins or connecting a cable can cause an ESD event that might destroy unprotected ICs. The ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and do not interfere with RS-232 signals as large as ±25V. 5.1 Human Body Model (HBM) Testing The Human Body Model (HBM) test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge through a 1.5kΩ current limiting resistor, so the test is less severe than the IEC61000 test, which uses a 330Ω limiting resistor. The HBM method determines an IC’s ability to withstand the ESD transients typically present during handling and manufacturing. Due to the random nature of these events, each pin is tested with respect to all other pins. The RS-232 pins on “E” family devices can withstand HBM ESD events to ±15kV. 5.2 IEC61000-4-2 Testing The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this device’s RS-232 pins allows the design of equipment that meets level 4 criteria without the need for additional board level protection on the RS-232 port. 5.2.1 Air-Gap Discharge Test Method For the air-gap discharge test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on factors such as approach speed, humidity, and temperature, so it is difficult to obtain repeatable results. The “E” device RS-232 pins withstand ±15kV air-gap discharges. 5.2.2 Contact Discharge Test Method During the contact discharge test, the probe contacts the tested pin before the probe tip is energized and eliminates the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than ±8kV. All “E” family devices survive ±8kV contact discharges on the RS-232 pins. FN6041 Rev.3.00 Apr 26, 2019 Page 19 of 23 ISL4270E 6. 6. Die Characteristics Die Characteristics Substrate and QFN Thermal Pad Potential (Powered Up) GND Transistor Count 1063 Process Si Gate CMOS FN6041 Rev.3.00 Apr 26, 2019 Page 20 of 23 ISL4270E 7. 7. Revision History Revision History Rev. Date 3.00 Apr.26.19 FN6041 Rev.3.00 Apr 26, 2019 Description Added Related Literature section. Updated the ordering information table on page 3: Added ISL4270EIRZ-T Added tape and reel information and notes 1, 2, and 3. Added Charge-Pump Abs Max Ratings section starting on page 10. Applied new template. Updated disclaimer. Page 21 of 23 ISL4270E 8. 8. Package Outline Drawing Package Outline Drawing For the most recent package outline drawing, see L32.5x5B. L32.5x5B 32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 5/10 4X 3.5 5.00 28X 0.50 A B 6 PIN 1 INDEX AREA 6 PIN #1 INDEX AREA 32 25 1 5.00 24 3 .30 ± 0 . 15 17 (4X) 8 0.15 9 16 + 0.07 32X 0.40 ± 0.10 TOP VIEW 0.10 M C A B 4 32X 0.23 - 0.05 BOTTOM VIEW SEE DETAIL "X" 0.10 C 0 . 90 ± 0.1 C BASE PLANE SEATING PLANE 0.08 C ( 4. 80 TYP ) ( ( 28X 0 . 5 ) SIDE VIEW 3. 30 ) (32X 0 . 23 ) C 0 . 2 REF 5 ( 32X 0 . 60) 0 . 00 MIN. 0 . 05 MAX. DETAIL "X" TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. FN6041 Rev.3.00 Apr 26, 2019 Page 22 of 23 1RWLFH  'HVFULSWLRQVRIFLUFXLWVVRIWZDUHDQGRWKHUUHODWHGLQIRUPDWLRQLQWKLVGRFXPHQWDUHSURYLGHGRQO\WRLOOXVWUDWHWKHRSHUDWLRQRIVHPLFRQGXFWRUSURGXFWV DQGDSSOLFDWLRQH[DPSOHV
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