Datasheet
ISL81801
80V Bidirectional 4-Switch Synchronous Buck-Boost Controller
The ISL81801 is a true bidirectional 4-switch
synchronous buck-boost controller with peak and
average current sensing and monitoring at both ends.
With wide input and output voltage ranges, the
controller is suitable for industrial, telecommunication,
and after-market automotive applications.
Features
The ISL81801 uses a proprietary buck-boost control
algorithm with valley current modulation for Boost
mode and peak current modulation for Buck mode
control.
• MOSFET drivers with adaptive shoot-through
protection
The ISL81801 has four independent control loops for
input and output voltages and currents. Inherent peak
current sensing at both ends and cycle-by-cycle
current limit of this family of products ensures high
operational reliability by providing instant current limit
in fast transient conditions at either end and in both
directions. It also has two current monitoring pins at
both input and output to facilitate Constant Current
(CC) limit and other system management functions.
CC operation down to low voltages avoids any
runaway condition at over load or short-circuit
conditions. In addition to multilayer overcurrent
protection, it also provides full protection features
such as OVP, UVP, OTP, average and peak current
limit on both input and output to ensure high reliability
in both unidirectional and bidirectional operation.
The IC is packaged in a space-conscious 32 LD
5mm x5mm TQFN package or easy to assemble
4.4mmx9.7mm 38 LD HTSSOP package. Both
packages use an EPAD to improve thermal
performance and noise immunity. Low pin count,
fewer external components, and default internal
values make the ISL81801 an ideal solution for time
to market simple power supply designs. The unique
DE/Burst mode at light-load dramatically lowers
standby power consumption with consistent output
ripple over different load levels.
• Single inductor 4-switch buck-boost controller
• On-the-fly bidirectional operation with independent
control of voltage and current on both ends
• Proprietary algorithm for smoothest mode transition
• Wide input voltage range: 4.5V to 80V
• Wide output voltage range: 0.8V to 80V
• Supports startup into pre-biased rails
• Programmable frequency: 100kHz to 600kHz
• Supports parallel operation current sharing with
cascade phase interleaving
• External sync with clock out or frequency dithering
• External bias for higher efficiency for 8V to 36V input
• Output and input current monitor
• Selectable PWM mode operation between
PWM/DE/Burst modes
• Accurate EN/UVLO and PGOOD indicator
• Low shutdown current: 2.7µA
• Complete protection: OCP, SCP, OVP, OTP, and UVP
○ Dual-level OCP with average current and
pulse-by-pulse peak current limit, also provides
Short Circuit Protection (SCP)
○ Selectable OCP response with either hiccup or
constant current mode
○ Negative pulse-by-pulse peak current limit
Applications
• Battery backup
• UPS/storage systems
• Battery powered industrial applications
• Renewable energy
• Aftermarket automotive
• Redundant power supplies
• Robots and drones
• Medical equipment
• Building and industrial automation
• Security surveillance
FN8937 Rev.1.2
Jun 2, 2021
Page 1 of 49
© 2020 Renesas Electronics
ISL81801
VDD
CS-
VIN
CS+
CLKEN
EN/UVLO
FB_IN
BSTEN
VIN
VOUT
VDD
BOOT1
PGND
UG1
VCC5V
PHASE1
IMON_IN
IMON_OUT
ISL81801 TQFN
PLL_COMP
SGND
LG1/
PWM_MODE
LG2/
OC_MODE
RT/SYNC
PHASE2
VDD
EXTBIAS
ISEN+
BOOT2
ISEN-
PGOOD
FB_OUT
UG2
OV
COMP
CLKOUT/DITHER
SS/TRK
Figure 1. Typical Application Diagram
100
90
VIN
Rs_in
UG1
Rs_out
Q4
Q1
VOUT
UG2
L
Efficiency (%)
80
70
60
50
PH1
PH2
Vin = 9V
Vin = 24V
Vin = 48V
Vin = 80V
40
LG1
Q2
Q3
LG2
Vin = 12V
Vin = 36V
Vin = 60V
30
0
2
4
6
8
10
IOUT (A)
Figure 2. Buck-Boost Power Train Topology
FN8937 Rev.1.2
Jun 2, 2021
Figure 3. Efficiency (VOUT = 12V, DE Mode)
Page 2 of 49
ISL81801
Contents
1.
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1
1.2
1.3
2.
Typical Application Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1
2.2
3.
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1
3.2
3.3
3.4
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
12
12
13
4.
Typical Performance Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
5.11
5.12
5.13
5.14
6.
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal 8V Linear Regulator (VDD), External Bias Supply (EXTBIAS), and 5V Linear Regulator
(VCC5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable (EN/UVLO) and Soft-Start Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tracking Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Buck-Boost Conversion Topology and Control Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Light-Load Efficiency Enhancement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Prebiased Power-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phase Lock Loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency Synchronization and Dithering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parallel Operation Current Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-Good Indicator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
25
25
26
27
30
33
34
34
35
35
37
38
39
Protection Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.1
6.2
6.3
6.4
6.5
7.
Input Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCC5V Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overcurrent Protection (OCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overvoltage Protection (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over-Temperature Protection (OTP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
40
40
40
41
41
Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.1
7.2
8.
Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
General EPAD Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Component Selection Guideline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.1
8.2
8.3
8.4
MOSFET Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inductor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Capacitor Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
FN8937 Rev.1.2
Jun 2, 2021
44
45
45
46
Page 3 of 49
ISL81801
9.
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.
Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
FN8937 Rev.1.2
Jun 2, 2021
Page 4 of 49
Typical Application Schematics
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1.1
Overview
ISL81801
FN8937 Rev.1.2
Jun 2, 2021
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