ISL9003
S
ESIGN
EW D ART
N
R
TP
D FO
ENDE PLACEMEN
M
M
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Datasheet
NOT R MMENDED 9003A
L
O
S
I
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®
April 15, 2008
FN9233.1
Low Noise LDO with Low IQ And High
PSRR
Features
ISL9003 is a high performance single low noise, high PSRR
LDO that delivers a continuous 150mA of load current. It has
a low standby current and is stable with 1µF of MLCC output
capacitance with an ESR of up to 200mΩ.
• Excellent transient response to large current steps
• High performance LDO with 150mA continuous output
The ISL9003 has a very high PSRR of 90dB and output
noise is 20µVRMS (typical). When coupled with a no load
quiescent current of 30µA (typical), and 0.5µA shutdown
current, the ISL9003 is an ideal choice for portable wireless
equipment.
The ISL9003 comes in many fixed voltage options with
±1.8% output voltage accuracy over temperature, line and
load. Other output voltage options are available on request.
Pinout
• Excellent load regulation:
< 0.1% voltage change across full range of load current
• Very high PSRR: >90dB @ 1kHz
• Wide input voltage capability: 2.3V to 6.5V
• Extremely low quiescent current: 29µA
• Low dropout voltage: typically 200mV @ 150mA
• Low output noise: typically 20µVRMS @ 100µA (1.5V)
• Stable with 1µF to 4.7µF ceramic capacitors
• Shutdown pin turns off LDO with 1µA (max) standby
current
• Soft-start limits input current surge during enable
ISL9003
(5 LD SC-70)
TOP VIEW
• Current limit and overheat protection
• ±1.8% accuracy over all operating conditions
VIN
1
GND
2
EN
3
5
VO
• 5 Ld SC-70 package
• -40°C to +85°C operating temperature range
4
CBYP
• Pb-free (RoHS compliant)
Applications
• PDAs, cell phones and smart phones
• Portable instruments, MP3 players
• Handheld devices including medical handhelds
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006, 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL9003
Ordering Information
PART NUMBER
(Notes 1, 2)
PART MARKING
VO VOLTAGE
(Note 3)
TEMP. RANGE (°C)
PACKAGE
(Pb-Free)
PKG. DWG. #
ISL9003IENZ -T
CAN
3.3V
-40 to +85
5 Ld SC-70
P5.049
ISL9003IEMZ -T
CAM
3.0V
-40 to +85
5 Ld SC-70
P5.049
ISL9003IEKZ -T
CAL
2.85V
-40 to +85
5 Ld SC-70
P5.049
ISL9003IEJZ -T
CAK
2.8V
-40 to +85
5 Ld SC-70
P5.049
ISL9003IEHZ -T
CAJ
2.75V
-40 to +85
5 Ld SC-70
P5.049
ISL9003IEFZ -T
CAH
2.5V
-40 to +85
5 Ld SC-70
P5.049
ISL9003IECZ -T
CAG
1.8V
-40 to +85
5 Ld SC-70
P5.049
ISL9003IEBZ -T
CAF
1.5V
-40 to +85
5 Ld SC-70
P5.049
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte
tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
3. For other output voltages, contact Intersil Marketing.
2
FN9233.1
April 15, 2008
ISL9003
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.1V
VO Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VIN + 0.3V)
Thermal Resistance (Note 4)
Recommended Operating Conditions
Ambient Temperature Range (TA) . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 to 6.5V
θJA (°C/W)
5 Ld SC-70 Package . . . . . . . . . . . . . . . . . . . . . . . .
565
Junction Temperature Range . . . . . . . . . . . . . . . . .-40°C to +125°C
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
Electrical Specifications
PARAMETER
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature range
of the device as follows: TA = -40°C to +85°C; VIN = (VO + 0.5V) to 6.5V with a minimum VIN of 2.3V; CIN = 1µF;
CO = 1µF; CBYP = 0.01µF.
SYMBOL
TEST CONDITIONS
MIN
(Note 7)
TYP
MAX
(Note 7)
UNITS
6.5
V
DC CHARACTERISTICS
Supply Voltage
VIN
Ground Current
IDD
2.3
Output Enabled; IO = 0µA; VIN < 4.2V
30
Output Enabled; IO = 0µA; Full voltage range
Shutdown Current
IDDS
UVLO Threshold
VUV+
Maximum Output Current
Internal Current Limit
Drop-out Voltage (Note 6)
Thermal Shutdown
Temperature
IMAX
µA
56
µA
0.5
1.2
µA
1.9
2.1
2.3
V
1.6
1.8
2.0
V
Initial accuracy at VIN = VO + 0.5V, IO = 10mA, TJ = +25°C
-0.7
+0.7
%
VUVRegulation Voltage Accuracy
39
VIN = VO + 0.5V to 6.5V, IO = 10µA to150mA, TJ = +25°C
-0.8
+0.8
%
VIN = VO + 0.5V to 6.5V, IO = 10µA to 150mA, TJ = -40°C to
+125°C
-1.8
+1.8
%
Continuous
150
175
ILIM
VDO1
IO = 150mA; VO < 2.5V
VDO2
IO = 150mA; 2.5V ≤ VO ≤ 2.8V
VDO3
IO = 150mA; 2.8V < VO
mA
265
355
mA
300
500
mV
250
400
mV
200
325
mV
TSD+
140
°C
TSD-
110
°C
@ 1kHz
90
dB
@ 10kHz
70
dB
@ 100kHz
50
dB
AC CHARACTERISTICS
IO = 10mA, VIN = 2.8V(min), VO = 1.8V, CBYP = 0.1µF
Ripple Rejection (Note 5)
VO = 1.5V, TA = +25°C, CBYP = 0.1µF
Output Noise Voltage (Note 5)
BW = 10Hz to 100kHz, IO = 100µA
20
µVRMS
BW = 10Hz to 100kHz, IO = 10mA
30
µVRMS
DEVICE START-UP CHARACTERISTICS
Device Enable TIme
LDO Soft-start Ramp Rate
tEN
tSSR
3
Time from assertion of the EN pin to when the output voltage
reaches 95% of the VO(nom)
250
500
µs
Slope of linear portion of LDO output voltage ramp during start-up
30
60
µs/V
FN9233.1
April 15, 2008
ISL9003
Electrical Specifications
PARAMETER
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature range
of the device as follows: TA = -40°C to +85°C; VIN = (VO + 0.5V) to 6.5V with a minimum VIN of 2.3V; CIN = 1µF;
CO = 1µF; CBYP = 0.01µF. (Continued)
SYMBOL
MIN
(Note 7)
TEST CONDITIONS
TYP
MAX
(Note 7)
UNITS
EN PIN CHARACTERISTICS
Input Low Voltage
VIL
-0.3
0.4
V
Input High Voltage
VIH
1.4
VIN +
0.3
V
0.1
µA
Input Leakage Current
IIL, IIH
Pin Capacitance
CPIN
Informative
5
pF
NOTES:
5. Limits established by characterization and are not production tested.
6. VO = 0.98*VO(NOM); Valid for VO greater than 1.85V.
7. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
Typical Performance Curves
0.8
0.2
OUTPUT VOLTAGE CHANGE (%)
0.6
OUTPUT VOLTAGE, VO (%)
VO = 3.3V
+25°C
VO = 3.3V
ILOAD = 0mA
0.4
0.2
+25°C
0.0
+85°C
-0.2
-0.4
-40°C
-0.6
-0.8
3.4
3.8
4.2
4.6
5.0
5.4
INPUT VOLTAGE (V)
5.8
6.2
IO = 0mA
0.0
-0.1
IO = 150mA
-0.2
-0.3
3.8
4.3
4.8
5.3
5.8
6.3
INPUT VOLTAGE (V)
FIGURE 2. OUTPUT VOLTAGECHANGE (%) vs INPUT
VOLTAGE (3.3V OUTPUT)
1.0
0.10
VIN = 3.8V
VO = 3.3V
0.8
VIN = 3.8V
VO = 3.3V
0.08
0.6
OUTPUT VOLTAGE (%)
0.06
0.4
0.2
-40°C
0.0
+25°C
-0.2
-0.4
+85°C
0.04
0.00
IO = 150mA
-0.04
-0.8
-0.08
25
50
75
100
125
LOAD CURRENT - IO (mA)
150
FIGURE 3. OUTPUT VOLTAGE vs LOAD CURRENT
4
175
IO = 75mA
-0.02
-0.06
0
IO = 0mA
0.02
-0.6
-1.0
IO = 75mA
-0.4
3.3
6.6
FIGURE 1. OUTPUT VOLTAGE vs INPUT VOLTAGE
(3.3V OUTPUT)
OUTPUT VOLTAGE CHANGE (%)
0.1
-0.10
-40
-25
0
25
TEMPERATURE (°C)
55
85
FIGURE 4. OUTPUT VOLTAGE vs TEMPERATURE
FN9233.1
April 15, 2008
ISL9003
Typical Performance Curves (Continued)
2.9
3.4
3.3
2.8
OUTPUT VOLTAGE, VO (V)
OUTPUT VOLTAGE, VO (V)
3.2
VO = 3.3V
+25°C
3.1
3.0
IO = 0mA
2.9
IO = 75mA
2.8
IO = 150mA
2.7
2.6
2.5
2.7
IO = 0mA
2.6
IO = 75mA
IO = 150mA
2.5
VO = 2.8V
+25°C
2.4
2.4
2.3
2.3
2.6
3.1
3.6
4.1
4.6
5.1
INPUT VOLTAGE (V)
5.6
6.1
2.5
6.6
3.5
4.0
4.5
5.0
5.5
6.0
6.5
INPUT VOLTAGE (V)
FIGURE 6. DROPOUT VOLTAGE vs INPUT VOLTAGE
(2.8V OUTPUT)
FIGURE 5. DROPOUT VOLTAGE vs INPUT VOLTAGE
(3.3V OUTPUT)
250
225
VO = 3.3V
DROP OUT VOLTAGE, VDO (mV)
200
DROP OUT VOLTAGE, VDO (mV)
3.0
200
150
VO = 2.8V
VO = 3.3V
100
50
+25°C
+85°C
175
150
125
-40°C
100
75
50
25
0
0
0
25
50
75
100
125
OUTPUT LOAD (mA)
150
0
175
75
100
125
150
175
FIGURE 8. DROPOUT VOLTAGE vs LOAD CURRENT
140
60
VIN = 3.8V
VO = 3.3V
120
+25°C
40
+85°C
30
20
-40°C
10
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
INPUT VOLTAGE (V)
FIGURE 9. GROUND CURRENT vs INPUT VOLTAGE
5
100
+25°C
80
60
+85°C
40
-40°C
20
VO = 3.3V
IO = 0µA
2.0
GROUND CURRENT (µA)
50
GROUND CURRENT (µA)
50
OUTPUT LOAD (mA)
FIGURE 7. DROPOUT VOLTAGE vs LOAD CURRENT
0
1.5
25
6.5
0
0
25
50
75
100
125
150
175
LOAD CURRENT (mA)
FIGURE 10. GROUND CURRENT vs LOAD
FN9233.1
April 15, 2008
ISL9003
Typical Performance Curves (Continued)
100
IL = 150mA
80
70
2
VO(V)
60
VIN = 5.0V
VO = 3.3V
IL = 150mA
CL = 1µF
3
IL = 75mA
1
VIN = 3.8V
VO = 3.3V
50
0
40
30
IL = 0mA
20
-40 -30 -20 -10
0
5
VEN (V)
GROUND CURRENT (µA)
90
10 20 30 40 50
TEMPERATURE (°C)
60
70
80
0
0
90
100
200
300
400
500
600
700
800
900 1000
TIME (µs)
FIGURE 11. GROUND CURRENT vs TEMPERATURE
FIGURE 12. TURN ON/TURN OFF RESPONSE
VO = 3.3V
ILoad = 150mA
VO = 2.8V
ILoad = 150mA
CLoad = 1µF
Cbyp = 0.01µF
CLoad = 1µF
Cbyp = 0.01µF
4.3V
4.2V
3.6V
3.5V
10mV/DIV
10mV/DIV
400µs/DIV
40µs/DIV
FIGURE 13. LINE TRANSIENT RESPONSE, 3.3V OUTPUT
FIGURE 14. LINE TRANSIENT RESPONSE, 2.8V OUTPUT
110
100
VO = 3.3V
90
VIN = 3.8V
10mA
ILOAD
100mA
100µA
PSRR (dB)
80
60
50
40
30
VO (10mV/DIV)
20
1.0 ms/DIV
FIGURE 15. LOAD TRANSIENT RESPONSE
6
50mA
70
VIN = 3.9V
VO = 1.8V
CBYP = 0.1µF
CLoad = 1µF
10
0.1k
1k
10k
FREQUENCY (Hz)
100k
1M
FIGURE 16. PSRR vs FREQUENCY
FN9233.1
April 15, 2008
ISL9003
Typical Performance Curves (Continued)
2.0
SPECTRAL NOISE DENSITY (µV/√Hz)
1.0
10mA
0.1
0.01
VIN = 3.9V
VO = 1.8V
CBYP = 0.1µF
100µA
CIN = 1µF
CLOAD = 1µF
0.001
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
FIGURE 17. SPECTRAL NOISE DENSITY vs FREQUENCY
Pin Description
PIN
NUMBER
PIN
NAME
1
VIN
Supply Voltage/LDO Input:
Connect a 1µF capacitor to GND.
2
GND
GND is the connection to system ground. Connect to PCB Ground plane.
3
EN
4
CBYP
5
VO
DESCRIPTION
Output Enable. When this signal goes high, the LDO is turned on.
Reference Bypass Capacitor Pin:
Optionally connect capacitor of value 0.01µF to 1µF between this pin and GND to tune in the desired noise and PSRR
performance.
LDO Output:
Connect a 1µF capacitor of value to GND
Typical Application
ISL9003
1
VIN (2.3 TO 5V)
2
ON
5
VIN
GND
3
ENABLE
OFF
EN
C1
VOUT
VO
4
CBYP
C3
C2
C1, C2: 1µF X5R CERAMIC CAPACITOR
C3: 0.1µF X5R CERAMIC CAPACITOR
7
FN9233.1
April 15, 2008
ISL9003
Block Diagram
VIN
VO
UVLO
CONTROL
LOGIC
SHORT CIRCUIT,
THERMAL PROTECTION,
SOFT-START
GND
SD
BANDGAP AND
TEMPERATURE
SENSOR
VOLTAGE AND
REFERENCE
GENERATOR
1.0V
0.94V
0.9V
GND
CBYP
Functional Description
Reference Generation
The ISL9003 contains all circuitry required to implement a
high performance LDO. High performance is achieved
through a circuit that delivers fast transient response to
varying load conditions. In a quiescent condition, the
ISL9003 adjusts its biasing to achieve the lowest standby
current consumption.
The reference generation circuitry includes a trimmed
bandgap, a trimmed voltage reference divider, a trimmed
current reference generator, and an RC noise filter. The filter
includes the external capacitor connected to the CBYP pin.
A 0.01µF capacitor connected CBYP implements a 100Hz
lowpass filter, and is recommended for most high
performance applications. For the lowest noise application, a
0.1µF or greater CBYP capacitor should be used. This filters
the reference noise to below the 10Hz to 1kHz frequency
band, which is crucial in many noise-sensitive applications.
The device also integrates current limit protection, smart
thermal shutdown protection, and soft-start. Smart Thermal
shutdown protects the device against overheating. Soft-start
minimizes start-up input current surges without causing
excessive device turn-on time.
Power Control
The ISL9003 has an enable pin, EN, to control power to the
LDO output. When EN is low, the device is in shutdown
mode. In this condition, all on-chip circuits are off, and the
device draws minimum current, typically less than 0.3µA.
When the EN pin goes high, the device first polls the output
of the UVLO detector to ensure that VIN voltage is at least
2.1V (typical). Once verified, the device initiates a start-up
sequence. During the start-up sequence, trim settings are
first read and latched. Then, sequentially, the bandgap,
reference voltage and current generation circuitry turn on.
Once the references are stable, the LDO powers up.
During operation, whenever the VIN voltage drops below
about 1.84V, the ISL9003 immediately disables the LDO
output. When VIN rises back above 2.1V (assuming the EN
pin is high), the device re-initiates its start-up sequence and
LDO operation resumes automatically.
The bandgap generates a zero temperature coefficient (TC)
voltage for the regulator reference and other voltage
references required for current generation and
over-temperature detection.
A current generator provides references required for
adaptive biasing as well as references for LDO output
current limit and thermal shutdown determination.
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain
operational amplifier driving a PMOS pass transistor. The
design of the ISL9003 provides a regulator that has low
quiescent current, fast transient response, and overall
stability across all operating and load current conditions.
LDO stability is guaranteed for a 1µF to 4.7µF output
capacitor that has a tolerance better than 20% and ESR less
than 200mΩ. The design is performance-optimized for a 1µF
capacitor. Unless limited by the application, use of an output
capacitor value above 4.7µF is not recommended as LDO
performance improvement is minimal.
Soft-start circuitry integrated into each LDO limits the initial
ramp-up rate to about 30µs/V to minimize current surge. The
8
FN9233.1
April 15, 2008
ISL9003
ISL9003 provides short-circuit protection by limiting the
output current to about 200mA (typ).
The LDO uses an independently trimmed 1V reference as its
input. An internal resistor divider drops the LDO output
voltage down to 1V. This is compared to the 1V reference for
regulation. The resistor division ratio is programmed in the
factory.
Overheat Detection
The bandgap outputs a proportional-to-temperature current
that is indicative of the temperature of the silicon. This
current is compared with references to determine if the
device is in danger of damage due to overheating. When the
die temperature reaches about +140°C, the LDO
momentarily shuts down until the die cools sufficiently. In the
overheat condition, if the LDO sources more than 50mA it
will be shut off. Once the die temperature falls back below
about +110°C, the disabled LDO is re-enabled and soft-start
automatically takes place.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
9
FN9233.1
April 15, 2008
ISL9003
Small Outline Transistor Plastic Packages (SC70-5)
P5.049
D
VIEW C
e1
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
INCHES
5
SYMBOL
4
E
CL
1
2
CL
3
e
E1
b
CL
0.20 (0.008) M
C
C
CL
A
A2
SEATING
PLANE
A1
-C-
PLATING
b1
0.043
0.80
1.10
-
0.004
0.00
0.10
-
A2
0.031
0.039
0.80
1.00
-
b
0.006
0.012
0.15
0.30
-
b1
0.006
0.010
0.15
0.25
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.009
0.08
0.20
6
D
0.073
0.085
1.85
2.15
3
E
0.071
0.094
1.80
2.40
-
E1
0.045
0.053
1.15
1.35
3
e
0.0256 Ref
0.65 Ref
-
e1
0.0512 Ref
1.30 Ref
-
L2
c1
NOTES
0.031
0.010
0.018
0.017 Ref.
0.26
0.46
4
0.420 Ref.
0.006 BSC
0o
N
c
MAX
0.000
α
WITH
MIN
A
L
b
MILLIMETERS
MAX
A1
L1
0.10 (0.004) C
MIN
-
0.15 BSC
8o
0o
5
8o
-
5
5
R
0.004
-
0.10
-
R1
0.004
0.010
0.15
0.25
Rev. 3 7/07
NOTES:
BASE METAL
1. Dimensioning and tolerances per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
α
L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
4X θ1
VIEW C
0.4mm
0.75mm
2.1mm
0.65mm
TYPICAL RECOMMENDED LAND PATTERN
10
FN9233.1
April 15, 2008
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