DATASHEET
ISL91127IR
FN8859
Rev 1.00
August 3, 2016
High Efficiency Buck-Boost Regulator with 4.5A Switches
The ISL91127IR is a high-current buck-boost switching
regulator for systems using new battery chemistries. It uses
Intersil’s proprietary buck-boost algorithm to maintain voltage
regulation while providing excellent efficiency and very low
output voltage ripple when the input voltage is close to the
output voltage.
Features
The ISL91127IR is capable of delivering at least 2A continuous
output current (VOUT = 3.3V) over a battery voltage range of
2.5V to 4.35V. This maximizes the energy utilization of
advanced single-cell Li-ion battery chemistries that have
significant capacity left at voltages below the system voltage.
Its fully synchronous low ON-resistance, 4-switch architecture
and a low quiescent current of only 30µA optimize efficiency
under all load conditions.
• Input voltage range: 1.8V to 5.5V
The ISL91127IR supports stand-alone applications with a fixed
3.3V or 3.5V output voltage or adjustable output voltage with
an external resistor divider. Output voltages as low as 1.0V or
as high as 5.2V are supported.
The ISL91127IR is available in a 20 Ld, 0.5mm pitch QFN
(4mmx4mm) package. The 2.5MHz switching frequency
further reduces the size of external components.
Related Literature
• Accepts input voltages above or below regulated output
voltage
• Automatic and seamless transitions between buck and
boost modes
• Output current: up to 2A (PVIN = 2.5V, VOUT = 3.3V)
• High efficiency: up to 96%
• 30µA quiescent current maximizes light-load efficiency
• 2.5MHz switching frequency minimizes external component
size
• Fully protected for short-circuit, over-temperature and
undervoltage
• 20 Ld 4mmx4mm QFN package
Applications
• Handheld and battery powered consumer and medical
devices
• Brownout free system voltage for smartphones and tablet
PCs
• Wireless communication devices
• UG080, “ISL91127IRN-EVZ, ISL91127IR2A-EVZ,
ISL91127IRA-EVZ Evaluation Boards User Guide”
• 2G/3G/4G RF power amplifiers
100
ISL91127IRNZ
C1
10µF
PVIN
L1
1µH
LX2
VIN
VOUT
EN
95
LX1
MODE
FB
VOUT = 3.3V
C2
2x22µF
SGND PGND
EFFICIENCY (%)
V IN = 1.8V TO 5.5V
90
85
VIN = 2.5V
80
VIN = 3.3V
VIN = 3.6V
75
VIN = 4V
70
1
10
100
1000
LOAD CURRENT (mA)
FIGURE 1. TYPICAL APPLICATION: VOUT = 3.3V
FN8859 Rev 1.00
August 3, 2016
FIGURE 2. EFFICIENCY: VOUT = 3.3V, TA = +25°C
Page 1 of 12
ISL91127IR
Block Diagram
LX1
4
LX2
5
1
2
6
7
17
Q1
8
EN
11
VIN 10
18
Q4
9
EN
Q2
VOUT
19
GATE
DRIVE RS
AND
ANTI-SHOOT
THRU
Q3
-
+
VREF
20
REVERSE
CURRENT
PVIN
EN
3
VIN
MONITOR
VOUT
CLAMP
THE RMAL
SHUTDOWN
13
SGND
CURRENT
DETECT
14
EN
CONTROL
EN
PGND
12
MODE
16
NC
15
FB
ADJ
OUTPUT
OSC
ERROR
AMP
COMP
+
-
-
+
FIX ED
OUTPUT
REF
VOLTAGE
PROG.
FIGURE 3. BLOCK DIAGRAM
FN8859 Rev 1.00
August 3, 2016
Page 2 of 12
ISL91127IR
Pin Configuration
Pin Descriptions
4, 5
LX1
Inductor connection, input side
NC
Power input. Range: 1.8V to 5.5V. Connect
2x10μF capacitors to PGND.
VOUT
PVIN
VOUT
PIN NAMES
VOUT
PIN #
6, 7, 8, 9
VOUT
ISL91127IR
(20 LD, 4x4 QFN)
TOP VIEW
3
20
19
18
17
16
1, 2
LX2
1
15 FB
LX2
2
14 SGND
EPAD
LX1
5
11 EN
Buck-boost regulator output. Connect
2x22μF capacitors to PGND.
12
MODE
Logic input, HIGH for auto PFM mode. LOW
for forced PWM operation. Also, this pin can
be used with an external clock sync input.
Range: 2.75MHz to 3.25MHz.
10
VIN
Supply input. Range: 1.8V to 5.5V.
11
EN
Logic input, drive HIGH to enable device.
6
7
8
9
10
13, 14
SGND
VIN
12 MODE
VOUT
PVIN
4
17, 18, 19,
20
13 SGND
Power ground for high switching current
Inductor connection, output side
PVIN
LX1
LX2
PVIN
3
PGND
PVIN
PGND
DESCRIPTION
15
FB
Voltage feedback pin
NC
No connect pin
16
EPAD
Analog ground pin
Thermal pad, connect to PGND
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL91127IRNZ-T
PART
MARKING
OUTPUT VOLTAGE
(V)
TEMP RANGE
(°C)
TAPE AND REEL
(UNITS)
3.3
-40 to +85
6k
1127N
PACKAGE
(RoHS COMPLIANT)
20 Ld 4x4 QFN
PKG.
DWG. #
L20.4x4C
ISL91127IRNZ-T7A
1127N
3.3
-40 to +85
250
20 Ld 4x4 QFN
L20.4x4C
ISL91127IRAZ-T
1127A
ADJ
-40 to +85
6k
20 Ld 4x4 QFN
L20.4x4C
ISL91127IRAZ-T7A
1127A
ADJ
-40 to +85
250
20 Ld 4x4 QFN
L20.4x4C
ISL91127IRN-EVZ
Evaluation Board for ISL91127IRNZ
ISL91127IRA-EVZ
Evaluation Board for ISL91127IRAZ
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for ISL91127IR. For more information on MSL please see techbrief TB363.
TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS
BUCK-BOOST
REGULATION
BYPASS
VSEL
I2C AND DVS
PACKAGE
ISL91127
Yes
No
No
No
WLCSP
ISL91127IR
Yes
No
No
No
QFN
ISL91128
Yes
Yes
No
Yes
WLCSP
PART NUMBER
NOTE: For the full family of ISL911xx buck-boost regulators, please visit intersil.com/isl911xx-buck-boost-regulators.
FN8859 Rev 1.00
August 3, 2016
Page 3 of 12
ISL91127IR
Absolute Maximum Ratings
Thermal Information
PVIN, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
LX1, LX2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
FB (Adjustable Version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
FB (Fixed VOUT Versions) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
GND, PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
ESD Rating
Human Body Model (Tested per JS-001-2010) . . . . . . . . . . . . . . . . .2.5kV
Machine Model (Tested per JESD22-A115C) . . . . . . . . . . . . . . . . . 250V
Charged Device Model (Tested per JS-002-2014) . . . . . . . . . . . . . . . 1kV
Latch-Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
20 Ld 4x4 QFN Package (Notes 4, 5). . . . .
40
5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 5.5V
Maximum Load Current
VIN = 2.5V VOUT = 3.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2ADC
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379
5. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Analog Specifications
VIN = VPVIN = VEN = 3.6V, VOUT = 3.3V, L1 = 1µH, C1 = 10µF, C2 = 2x22µF, TA = +25°C. Boldface limits apply across
the operating temperature range, -40°C to +85°C and input voltage range (1.8V to 5.5V) unless specified otherwise.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
(Note 6) (Note 7) (Note 6)
UNIT
POWER SUPPLY
VIN
VUVLO
Input Voltage Range
VIN Undervoltage Lockout Threshold
1.8
Rising
Falling
IVIN
VIN Supply Current
PFM mode, 1.8V ≤ VIN ≤ 5V, no external load on VOUT
(Note 8)
ISD
VIN Supply Current, Shutdown
EN = GND, VIN = 3.6V
1.725
1.55
5.5
V
1.795
V
1.65
V
30
55
µA
0.05
1.00
µA
1.0
5.2
V
OUTPUT VOLTAGE REGULATION
VOUT
Output Voltage Range
ISL91127IIAZ, IOUT = 100mA, VIN = 3.6V
Output Voltage Accuracy
VIN = 3.7V, VOUT = 3.3V, IOUT = 0mA, PWM mode
-2
+2
%
VIN = 3.7V, VOUT = 3.3V, IOUT = 1mA, PFM mode
-3
+4
%
0.813
V
20
nA
VFB
FB Pin Voltage Regulation
For adjustable output version, VIN = 3.6V
IFB
FB Pin Bias Current
For adjustable output version
VOUT/
VIN
Line Regulation, PWM Mode
IOUT = 500mA, VOUT = 3.3V, VIN step from 2.3V to 5.5V
±5
mV/V
VOUT/
IOUT
Load Regulation, PWM Mode
VIN = 3.7V, VOUT = 3.3V, IOUT step from 0mA to 1000mA
±0.005
mV/mA
VOUT/
VI
Line Regulation, PFM Mode
IOUT = 100mA, VOUT = 3.3V, VIN step from 2.3V to 5.5V
±12.5
mV/V
VOUT/
IOUT
Load Regulation, PFM Mode
VIN = 3.7V, VOUT = 3.3V, IOUT step from 0mA to 100mA
±0.4
mV/mA
VCLAMP
Output Voltage Clamp
Rising
Output Voltage Clamp Hysteresis
FN8859 Rev 1.00
August 3, 2016
0.783
0.800
5.25
5.95
400
V
mV
Page 4 of 12
ISL91127IR
Analog Specifications
VIN = VPVIN = VEN = 3.6V, VOUT = 3.3V, L1 = 1µH, C1 = 10µF, C2 = 2x22µF, TA = +25°C. Boldface limits apply across
the operating temperature range, -40°C to +85°C and input voltage range (1.8V to 5.5V) unless specified otherwise. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MAX
MIN
(Note 6) (Note 7) (Note 6)
UNIT
DC/DC SWITCHING SPECIFICATIONS
fSW
tONMIN
Oscillator Frequency
2.1
Minimum On-Time
2.5
2.9
80
MHz
ns
IPFETLEAK
LX1 Pin Leakage Current
VIN = 3.6V
-1
1
µA
INFETLEAK
LX2 Pin Leakage Current
VIN = 3.6V
-1
1
µA
SOFT-START AND SOFT DISCHARGE
tSS
rDISCHG
Soft-Start Time
VOUT Soft-Discharge ON-Resistance
Time from when EN signal asserts to when output
voltage ramp starts.
1
ms
Time from when output voltage ramp starts to when
output voltage reaches 95% of its nominal value with
device operating in buck mode.
VIN = 4V, VOUT = 3.3V, IO = 200mA
1
ms
Time from when output voltage ramp starts to when
output voltage reaches 95% of its nominal value with
device operating in boost mode.
VIN = 2V, VOUT = 3.3V, IO = 200mA
2
ms
EN < VIL
120
Ω
POWER MOSFET
rDSON_P
P-Channel MOSFET ON-Resistance
VIN = 3.6V, IO = 200mA
32
mΩ
rDSON_N
N-Channel MOSFET ON-Resistance
VIN = 3.6V, IO = 200mA
37
mΩ
IPK_LMT
P-Channel MOSFET Peak Current Limit VIN = 3.6V
3.7
4.5
5
A
PFM/PWM TRANSITION
Load Current Threshold, PFM to PWM
VIN = 3.6V, VOUT = 3.3V
200
mA
Load Current Threshold, PWM to PFM
VIN = 3.6V, VOUT = 3.3V
75
mA
Thermal Shutdown
155
°C
Thermal Shutdown Hysteresis
30
°C
LOGIC INPUTS
ILEAK
Input Leakage
VIN = 3.6V
VIH
Input HIGH Voltage
VIN = 3.6V
VIL
Input LOW Voltage
VIN = 3.6V
0.05
1
µA
V
1.4
0.4
V
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
7. Typical values are for TA = +25°C and VIN = 3.6V.
8. Quiescent current measurements are taken when the output is not switching.
FN8859 Rev 1.00
August 3, 2016
Page 5 of 12
ISL91127IR
Typical Performance Curves
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L = 1µH,
3.300
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
3.295
3.290
VOUT (V)
EFFICIENCY (%)
C1 = 10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A
IOUT = 10mA
IOUT = 200mA
3.285
3.280
VIN = 2.5V
3.275
VIN = 3.3V
3.270
IOUT = 500mA
VIN = 3.6V
3.265
IOUT = 1000mA
VIN = 4V
3.260
1.8
2.2
2.6
3.0
3.4
3.8
4.2
4.6
1
5.0
10
FIGURE 4. EFFICIENCY vs INPUT VOLTAGE
1000
FIGURE 5. OUTPUT VOLTAGE vs LOAD CURRENT
90
2.60
SWITCHING FREQUENCY (MHz)
QUIESCENT CURRENT (µA)
100
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
80
70
60
50
40
30
20
10
0
2.55
2.50
2.45
2.40
2.35
2.30
2.25
2.20
1.8
2.2
2.6
3.0
3.4
3.8
4.2
4.6
5.0
1.8
2.2
INPUT VOLTAGE (V)
FIGURE 6. QUIESCENT CURRENT vs INPUT VOLTAGE (VOUT = 3.3V,
MODE = HIGH)
2.6
3.0
3.4
3.8
4.2
4.6
INPUT VOLTAGE (V)
FIGURE 7. SWITCHING FREQUENCY vs INPUT VOLTAGE
LX1 (5V/DIV)
LX1 (5V/DIV)
LX2 (5V/DIV)
LX2 (5V/DIV)
VOUT
(50mV/DIV)
VOUT
(50mV/DIV)
IL (1A/DIV)
IL (1A/DIV)
1µs/DIV
FIGURE 8. STEADY STATE OPERATION IN PFM (VIN = 4V,
VOUT = 3.3V, NO LOAD)
FN8859 Rev 1.00
August 3, 2016
400ns/DIV
FIGURE 9. STEADY STATE OPERATION IN PWM (VIN = 3.3V,
VOUT = 3.3V, NO LOAD)
Page 6 of 12
5.0
ISL91127IR
Typical Performance Curves
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L = 1µH,
C1 = 10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A (Continued)
EN (2V/DIV)
EN (2V/DIV)
VOUT (2V/DIV)
VOUT (2V/DIV)
IL (2A/DIV)
IL (2A/DIV)
1ms/DIV
FIGURE 10. SOFT-START (VIN = 3.6V, VOUT = 3.3V, NO LOAD)
1ms/DIV
FIGURE 11. SOFT-START (VIN = 3.6V, VOUT = 3.3V, 1A R-LOAD)
LX1 (5V/DIV)
LX2 (5V/DIV)
VOUT (100mV/DIV)
VOUT (100mV/DIV)
IL (1A/DIV)
IL (2A/DIV)
400ns/DIV
FIGURE 12. STEADY STATE OPERATION (VIN = 2.5V, VOUT = 3.3V,
2A LOAD)
100µs/DIV
FIGURE 13. 0A TO 2A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V)
VOUT (100mV/DIV)
VOUT (100mV/DIV)
IL (500mA/DIV)
IL (500mA/DIV)
100µs/DIV
FIGURE 14. 0.5A TO 1.5A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V)
FN8859 Rev 1.00
August 3, 2016
100µs/DIV
FIGURE 15. 0A TO 1A LOAD TRANSIENT (VIN = 3.6V, VOUT = 3.3V)
Page 7 of 12
ISL91127IR
Typical Performance Curves
Unless otherwise noted, operating conditions are: TA = +25°C, VIN = EN = 3.6V, L = 1µH,
C1 = 10µF, C2 = 2x22µF, VOUT = 3.3V, IOUT = 0A to 3A (Continued)
LX1 (5V/DIV)
VIN (1V/DIV)
LX2 (5V/DIV)
VOUT (100mV/DIV)
VOUT (200mV/DIV)
IL (2A/DIV)
20ms/DIV
100µs/DIV
FIGURE 16. OUTPUT SHORT-CIRCUIT BEHAVIOR (VIN = 3.6V,
VOUT = 3.3V)
FIGURE 17. 4V TO 3.2V LINE TRANSIENT (VOUT = 3.3V, LOAD = 1A)
MAXIMUM OUTPUT CURRENT (A)
4.0
3.5
3.0
2.5
2.0
1.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
INPUT VOLTAGE (V)
FIGURE 18. OUTPUT CURRENT CAPABILITY: VOUT = 3.3V, TA = +25°C
Functional Description
Enable Input
Functional Overview
The device is enabled by asserting the EN pin HIGH. Driving EN
LOW invokes a power-down mode, where most internal device
functions are disabled.
Refer to the “Block Diagram” on page 2. The ISL91127IR
implements a complete buck-boost switching regulator, with
PWM controller, internal switches, references, protection circuitry
and control inputs.
The PWM controller automatically switches between buck and
boost modes as necessary to maintain a steady output voltage,
with changing input voltages and dynamic external loads.
Internal Supply and References
Referring to the “Block Diagram” on page 2, the ISL91127IR
provides four power input pins. The PVIN pin supplies input power to
the DC/DC converter, while the VIN pin provides operating voltage
source required for stable VREF generation. Separate ground pins
(GND and PGND) are provided to avoid problems caused by ground
shift due to the high switching currents.
FN8859 Rev 1.00
August 3, 2016
Soft Discharge
When the device is disabled by driving EN LOW, an internal resistor
between VOUT and GND is activated to slowly discharge the output
capacitor. This internal resistor has a typical 120Ω resistance.
POR Sequence and Soft-Start
Asserting the EN pin HIGH allows the device to power up. A
number of events occur during the start-up sequence. The
internal voltage reference powers up and stabilizes. The device
then starts operating. There is a typical 1ms delay between
assertion of the EN pin and the start of the switching regulator
soft-start ramp.
The soft-start feature minimizes output voltage overshoot and
input inrush currents. During soft-start, the reference voltage is
ramped to provide a ramping VOUT voltage. While the output
Page 8 of 12
ISL91127IR
voltage is lower than approximately 20% of the target output
voltage, switching frequency is reduced to a fraction of the
normal switching frequency to aid in producing low duty cycles
necessary to avoid input inrush current spikes. Once the output
voltage exceeds 20% of the target voltage, switching frequency is
increased to its nominal value.
When the target output voltage is higher than the input voltage,
there will be a transition from buck mode to boost mode during
the soft-start sequence. At the time of this transition, the ramp
rate of the reference voltage is decreased, such that the output
voltage slew rate is decreased. This provides a slower output
voltage slew rate.
The VOUT ramp time is not constant for all operating conditions.
Soft-start into boost mode will take longer than soft-start into
buck mode. The total soft-start time into buck operating mode is
typically 2ms, whereas the typical soft-start time into boost
mode operating mode is typically 3ms. Increasing the load
current will increase these typical soft-start times.
Short-Circuit Protection
The ISL91127IR provides short-circuit protection by monitoring the
feedback voltage. When feedback voltage is sensed to be lower
than a certain threshold, the PWM oscillator frequency is reduced in
order to protect the device from damage. The P-channel MOSFET
peak current limit remains active during this state.
Thermal Shutdown
A built-in thermal protection feature protects the ISL91127IR, if the
die temperature reaches +155°C (typical). At this die temperature,
the regulator is completely shut down. The die temperature
continues to be monitored in this thermal shutdown mode. When
the die temperature falls to +125°C (typical), the device will resume
normal operation. When exiting thermal shutdown, the
ISL91127IR will execute its soft-start sequence.
Buck-Boost Conversion Topology
The ISL91127IR operates in either buck or boost mode. When
operating in conditions where PVIN is close to VOUT, ISL91127IR
alternates between buck and boost mode as necessary to
provide a regulated output voltage.
Figure 19 shows a simplified diagram of the internal switches
and external inductor.
SWITCH A
LX2
VOUT
SWITCH C
FIGURE 19. BUCK-BOOST TOPOLOGY
FN8859 Rev 1.00
August 3, 2016
In Boost PWM mode, Switch A remains closed and Switch B
remains open. Switches C and D operate as a synchronous boost
converter when in this mode.
PFM Operation
During PFM operation in buck mode, Switch D is continuously
closed and Switch C is continuously open. Switches A and B
operate in discontinuous mode during PFM operation. During
PFM operation in boost mode, the ISL91127IR closes Switch A
and Switch C to ramp up the current in the inductor. When the
inductor current reaches a certain threshold, the device turns off
Switches A and C, then turns on Switches B and D. With Switches
B and D closed, output voltage increases as the inductor current
ramps down.
In most operating conditions, there will be multiple PFM pulses
to charge up the output capacitor. These pulses continue until
VOUT has achieved the upper threshold of the PFM hysteretic
controller. Switching then stops, and remains stopped until VOUT
decays to the lower threshold of the hysteretic PFM controller.
Operation with VIN Close to VOUT
When the output voltage is close to the input voltage, the
ISL91127IR will rapidly and smoothly switch from boost to buck
mode as needed to maintain the regulated output voltage. This
behavior provides excellent efficiency and very low output
voltage ripple.
Output Voltage Programming
The ISL91127IR is available in fixed and adjustable output
voltage versions. To use the fixed output version, the VOUT pin
must be connected directly to FB.
In the adjustable output voltage version (ISL91127IIAZ), an
external resistor divider is required to program the output
voltage. The FB pin has very low input leakage current, so it is
possible to use large value resistors (e.g., R1 = 1MΩ and
R2 = 324kΩ for VOUT = 3.3V) in the resistor divider connected to
the FB input.
Component Selection
SWITCH D
PVIN
SWITCH B
In Buck PWM mode, Switch D is continuously closed and
Switch C is continuously open. Switches A and B operate as a
synchronous buck converter when in this mode.
Applications Information
L1
LX1
PWM Operation
The fixed-output version of ISL91127IR requires only three
external power components to implement the buck-boost
converter: an inductor, an input capacitor and an output
capacitor.
The adjustable output version of ISL91127IR requires three
additional components to program the output voltage, as shown
in Figure 20. Two external resistors program the output voltage,
and a small capacitor is added to improve stability and response.
Page 9 of 12
ISL91127IR
Inductor Selection
ISL91127IRAZ
VIN = 1.8V TO 5.5V
C1
10µF
PVIN
LX1
LX2
VIN
VOUT = 1V TO 5.2V
VOUT
EN
MODE
An inductor with high frequency core material (e.g., ferrite core)
should be used to minimize core losses and provide good
efficiency. The inductor must be able to handle the peak
switching currents without saturating.
L1
1µH
R1
C3
C2
2x22µF
A 1µH inductor with ≥4A saturation current rating is
recommended. Select an inductor with low DCR to provide good
efficiency. In applications where radiated noise must be
minimized, a toroidal or shielded inductor can be used.
FB
SGND PGND
R2
PVIN and VOUT Capacitor Selection
FIGURE 20. ADJUSTABLE OUTPUT APPLICATION
The input and output capacitors should be ceramic X5R type with
low ESL and ESR. The recommended input capacitor value is
2x10µF. The recommended VOUT capacitor value is 2x22µF.
Output Voltage Programming, Adjustable
Version
When VREF is connected to GND, setting and controlling the
output voltage of the ISL91127IRAZ (adjustable output version)
can be accomplished by selecting the external resistor values.
Equation 1 can be used to derive the R1 and R2 resistor values:
R 1
V OUT = 0.8V 1 + -------
R
2
(EQ. 1)
When designing a PCB, include a GND guard band around the
feedback resistor network to reduce noise and improve accuracy
and stability. Resistors R1 and R2 should be positioned close to
the FB pin.
Feed-Forward Capacitor Selection
A small capacitor (C3 in Figure 20) in parallel with resistor R1 is
required to provide the specified load and line regulation. The
suggested value of this capacitor is 56pF for R1 = 1MΩ. An NPO
type capacitor is recommended.
TABLE 2. CAPACITOR VENDOR INFORMATION
MANUFACTURER
SERIES
WEBSITE
AVX
X5R
www.avx.com
Murata
X5R
www.murata.com
Taiyo Yuden
X5R
www.t-yuden.com
TDK
X5R
www.tdk.com
Recommended PCB Layout
Correct PCB layout is critical for proper operation of the
ISL91127IR. The input and output capacitors should be
positioned as closely to the IC as possible. The ground
connections of the input and output capacitors should be kept as
short as possible, and should be on the component layer to avoid
problems that are caused by high switching currents flowing
through PCB vias.
TABLE 3. INDUCTOR VENDOR INFORMATION
MANUFACTURER
Toko
Coilcraft
FN8859 Rev 1.00
August 3, 2016
MFR. PART NUMBER
DESCRIPTION
DIMENSION (mm)
1277AS-H-1R0M
1µH, 20%, DCR = 34mΩ(typical),
ISAT = 4.6A (typical)
3.2x2.5x1.2
FDSD0312-H-1R0M
1µH, 20%, DCR = 43mΩ(typical),
ISAT = 4.5A (typical)
3.2x3.0x1.2
XFL4020-102ME
1µH, 20%, DCR = 11mΩ(typical),
ISAT = 5.1A (typical)
4.0x4.0x2.1
WEBSITE
www.toko.com
www.coilcraft.com
Page 10 of 12
ISL91127IR
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.
Please go to web to make sure you have the latest revision.
DATE
REVISION
CHANGE
August 3, 2016
FN8859.1
Page 1, Features - removed Burst current bullet
Page 1, Applications - added “Handheld and battery powered consumer and medical devices” bullet
Page 4, Recommended Operating Conditions - removed: VIN = 3.0V VOUT = 3.3V, tON = 600µs, t = 4.6ms. . . .3A
Page 8, Typical Performance Curves - added Figure 18, Output Current Capability chart.
June 23, 2016
FN8859.0
Initial Release
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
© Copyright Intersil Americas LLC 2016. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8859 Rev 1.00
August 3, 2016
Page 11 of 12
ISL91127IR
Package Outline Drawing
For the most recent package outline drawing, see L20.4x4C.
L20.4x4C
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 11/06
4X
4.00
2.0
16X 0.50
A
B
16
6
PIN #1 INDEX AREA
20
6
PIN 1
INDEX AREA
1
4.00
15
2 .70 ± 0 . 15
11
(4X)
5
0.15
6
10
0.10 M C A B
4 20X 0.25 +0.05 / -0.07
20X 0.4 ± 0.10
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 90 ± 0 . 1
C
BASE PLANE
( 3. 8 TYP )
(
2. 70 )
SEATING PLANE
0.08 C
( 20X 0 . 5 )
SIDE VIEW
( 20X 0 . 25 )
C
0 . 2 REF
5
( 20X 0 . 6)
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
FN8859 Rev 1.00
August 3, 2016
Page 12 of 12
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