DATASHEET
MK1714-02
SPREAD SPECTRUM MULTIPLIER CLOCK
Description
Features
The MK1714-02 is a low cost, high performance clock
synthesizer with selectable multipliers and percentages of
spread designed to generate high frequency clocks with low
EMI. Using analog/digital Phase Locked Loop (PLL)
techniques, the device accepts an inexpensive,
fundamental mode, parallel resonant crystal or clock input
to produce a spread or dithered output. This reduces the
EMI amplitude peaks at the odd harmonics by several dB.
The OE pin puts both outputs into a high impedance state
for board level testing. The PD pin powers down the entire
chip and the outputs are held low.
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Packaged in 20-pin tiny SSOP
Pb (lead) free package
Operating voltage of 3.3 V or 5 V
Multiplier modes of x1, x2, x3, x4, x5, and x6
Inexpensive 10 - 25 MHz crystal or clock input
OE pin tri-states the outputs for board testing
Power down pin stops the outputs low
Selectable frequency spread
Spread can be turned on or off
Advanced, low power CMOS process
Duty cycle of 40/60
Industrial temperature range available
Block Diagram
V DD
2
S4:0
5
PD
P LL Clock
M ultiplier and
Spread
S pectrum
Circuitry
Low E M I E nable
Input
Crystal or
Clock
Clock O ut
X1
Crystal
O scillator
RE F
X2
4
X SE L
IDT™ SPREAD SPECTRUM MULTIPLIER CLOCK
O E (both outputs)
G ND
1
MK1714-02
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MK1714-02
SPREAD SPECTRUM MULTIPLIER CLOCK
SSCG
Pin Assignment
X2
1
20
REF
X1/ICLK
2
19
OE
VDD
3
18
PD
VDD
4
17
GND
S4
5
16
S0
S3
6
15
NC
GND
7
14
S1
GND
8
13
GND
S2
9
12
LEE
10
11
XSEL
CLK
20 pin (150 mil) SSOP (QSOP)
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X2
XO
Crystal connection. Connect to parallel mode crystal. Leave open for clock.
Crystal connection. Connect to parallel mode crystal or clock.
2
X1
XI
3
VDD
Power
Connect to VDD. Must be same value as other VDD.
4
VDD
Power
Connect to VDD. Must be same value as other VDD.
5
S4
Input
Select pin 4. Determines multiplier and spread amount per table on following page. Internal
pull-down.
6
S3
Input
Select pin 3. Determines multiplier and spread amount per table on following page. Internal
pull-up.
7
GND
Power
Connect to ground.
8
GND
Power
Connect to ground.
9
S2
Input
Select pin 2. Determines multiplier and spread amount per table on following page. Internal
pull-up.
10
CLK
11
XSEL
Input
Connect to VDD for crystal input, or GND for CLK input. Internal pull-down.
12
LEE
Input
Low EMI Enable. Turns on spread spectrum on CLK when high. Internal pull-up.
13
GND
Power
Connect to ground.
14
S1
Input
Select pin 1. Determines multiplier and spread amount per table on following page. Internal
pull-up.
17
GND
Power
Connect to ground.
18
PD
Input
Power down. Turns off chip when low. Outputs stop low. Leave open or connected to VDD if
power down is not required.
Input
Output enable. Tri-states all outputs when low. Internal pull-up.
19
OE
20
REF
Output Clock output dependent on input, multiplier, and spread amount per table on following page.
Output Reference clock output from crystal oscillator. This clock is not spread.
Note: When changing the input frequency, the LEE pin must be set low for minimum of 10µs to allow the PLL to lock to the
new frequency. Alternatively, the PD pin may be set low while changing frequencies.
IDT™ SPREAD SPECTRUM MULTIPLIER CLOCK
2
MK1714-02
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MK1714-02
SPREAD SPECTRUM MULTIPLIER CLOCK
SSCG
Clock Output Select Table (MHz)
S4
S3
S2
S1
S0
Input Range
Multiplier
Output Range
Direction
Amount (%)
3.3/5V
0
0
0
0
0
40 - 80
x1
40 - 80
C
±0.75
Both
0
0
0
0
1
60 - 120
x1
60 -120
DC
+0.25, -0.75
Both
0
0
0
1
0
40 - 80
x1
40 - 80
C
±1.25
Both
0
0
0
1
1
80 - 150
x1
80 - 150
C
±0.75
Both
0
0
1
0
0
10 - 30
x2
20 - 60
C
±0.75
Both
0
0
1
0
1
20 - 60
x2
40 - 120
C
±0.5
Both
0
0
1
1
0
10 - 25
x2
20 - 50
DC
+0.25, -1.5
Both
0
0
1
1
1
20 - 60
x2
40 - 120
DC
+0.5, -1
Both
0
1
0
0
0
20 - 30
x3
60 - 90
C
±0.5
Both
0
1
0
0
1
40 - 75
x2
80 - 150
C
±0.75
Both
0
1
0
1
0
40 - 100
x1
40 - 100
DC
+0.25, -1.5
Both
0
1
0
1
1
40 - 75
x2
80 - 150
DC
+0.25, -1.5
Both
0
1
1
0
0
20 - 40
x1
20 - 40
DC
+0.5, -2.0
3.3V
0
1
1
0
1
20 - 60
x1
20 - 60
DC
+0.25, -1.5
Both
0
1
1
1
0
10 - 20
x1
10 - 20
DC
+0.5, -2.0
Both
0
1
1
1
1
10 - 30
x1
10 - 30
DC
+0.25, -1.5
Both
1
0
0
0
0
20 - 37.5
x4
80 - 150
DC
+0.25, -1.25
Both
1
0
0
0
1
20 - 40
x3
60 - 120
DC
+0.25, -1.5
Both
1
0
0
1
0
10 - 30
x1
10 - 30
C
±0.75
Both
1
0
0
1
1
20 - 30
x1
20 - 30
D
-0.5
Both
1
0
1
0
0
5 - 20
x2
10 - 40
DC
+0.25, -2.25
3.3V
1
0
1
0
1
20 - 50
x3
60 - 150
D
-0.25, -2.25
Both
1
0
1
1
0
20 - 37.5
x4
80 - 150
C
±0.75
Both
1
0
1
1
1
80 - 150
x1
80 - 150
DC
+0.25, -1.25
Both
1
1
0
0
0
10 - 25
x4
40 - 100
C
±0.75
Both
1
1
0
0
1
10 - 20
x5
50 - 100
C
±0.75
Both
1
1
0
1
0
10 - 20
x6
60 - 120
C
±0.75
Both
1
1
0
1
1
20 - 50
x1
20 - 50
C
±0.75
Both
1
1
1
0
0
10 - 25
x4
40 - 100
DC
+0.25, -1.5
Both
1
1
1
0
1
10 - 20
x5
50 - 100
DC
+0.25, -1.25
Both
1
1
1
1
0
10 - 20
x6
60 - 120
D
-1.5
Both
1
1
1
1
1
10 - 30
x1
10 - 30
C
±0.75
Both
For S4:S0, 0 = connect to GND, 1 = connect to VDD.
Direction: C = center spread, D = down spread, DC = down + center spread. Amount = spread amount. For example, for a 40 MHz output
clock spread down 1%, the lowest frequency is 39.60 MHz.
Contact IDT with your exact output frequency for details on spread direction and amount.
IDT™ SPREAD SPECTRUM MULTIPLIER CLOCK
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SPREAD SPECTRUM MULTIPLIER CLOCK
SSCG
External Components
the component side of the board as close to the VDD pin as
possible. No vias should be used between decoupling
capacitor and VDD pin. The PCB trace to VDD pin should
be kept as short as possible, as should the PCB trace to the
ground via. Distance of the ferrite bead and bulk decoupling
from the device is less critical.
The MK1714-02 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND, as close to these pins as possible.
For optimum device performance, the decoupling capacitor
should be mounted on the component side of the PCB.
Avoid the use of vias in the decoupling circuit.
2) The external crystal should be mounted just next to the
device with short traces. The X1 and X2 traces should not
be routed next to each other with minimum spaces, instead
they should be separated and away from other traces.
Series Termination Resistor
3) To minimize EMI the 33Ω series termination resistor, if
needed, should be placed close to the clock output.
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50Ω trace (a commonly used trace
impedance) place a 33Ω resistor in series with the clock line,
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20Ω.
Crystal Tuning Load Capacitors
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers (the ferrite bead and bulk decoupling capacitor can be
mounted on the back). Other signal traces should be routed
away from the MK1714-02. This includes signal traces just
underneath the device, or on layers adjacent to the ground
plane layer used by the device.
Crystal Load Capacitors
Powerup Considerations
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to ground.
These capacitors are used to adjust the stray capacitance of
the board to match the nominally required crystal load
capacitance. Because load capacitance can only be
increased in this trimming process, it is important to keep
stray capacitance to a minimum by using very short PCB
traces (and no vias) between the crystal and device. Crystal
capacitors must be connected from each of the pins X1 and
X2 to ground.
To insure proper operation of the spread spectrum
generation circuit, some precautions must be taken in the
implementation of the MK1714-02.
1) An input signal should not be applied to ICLK until VDD
is stable (within 10% of its final value). This requirement can
be easily met by operating the MK1714-02 and the ICLK
source from the same power supply.
2) LEE should not be enabled (taken high) until after the
power supplies and input clock are stable. This requirement
can be met by direct control of LEE by system logic; for
example, a “power good” signal. Another solution is to leave
LEE unconnected to anything but a 0.01µF capacitor to
ground. The pull-up resistor on LEE will charge the
capacitor and provide approximately a 700µs delay until
spread spectrum is enabled.
The value (in pF) of these crystal caps should equal
(CL-6)*2. In this equation, CL= crystal load capacitance in
pF. Example: For a crystal with a 16 pF load capacitance,
each crystal capacitor would be
[16 - 6]*2 = 20 pF.
PCB Layout Recommendations
3) If the input frequency is changed during operation,
disable spread spectrum until the input clock stabilizes at
the new frequency.
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
1) The 0.01µF decoupling capacitor should be mounted on
IDT™ SPREAD SPECTRUM MULTIPLIER CLOCK
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MK1714-02
REV K 051310
MK1714-02
SPREAD SPECTRUM MULTIPLIER CLOCK
SSCG
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK1714-02. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
7V
All Inputs and Outputs
-0.5V to VDD+0.5V
Ambient Operating Temperature
-40 to +85° C
Storage Temperature
-65 to +150° C
Junction Temperature
175° C
Soldering Temperature
260° C
Recommended Operation Conditions
Parameter
Min.
Max.
Units
0
+70
°C
+3.0
+5.5
V
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Typ.
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85° C
Parameter
Symbol
Conditions
Min.
Typ.
Units
5.5
V
Operating Voltage
VDD
Supply Current
IDD
No load, at 3.3 V
26
mA
IDD
No load, at 5 V
40
mA
Input High Voltage
VIH
Select inputs, OE, PD
Input Low Voltage
VIL
Select inputs, OE, PD
Output High Voltage
VOH
IOH = -8 mA
Output Low Voltage
VOL
IOL = 8 mA
Short Circuit Current
IOS
Each output
±50
mA
On Chip Pull-up Resistor,
inputs
RPU
Except X1
500
kΩ
On-Chip Pull-down Resistor,
outputs
RPD
S4 pin only
500
kΩ
7
pF
Input Capacitance
IDT™ SPREAD SPECTRUM MULTIPLIER CLOCK
3.0
Max.
Except X1, X2
5
2
V
0.8
VDD-0.4
V
V
0.4
MK1714-02
V
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SPREAD SPECTRUM MULTIPLIER CLOCK
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AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85° C
Parameter
Symbol
Conditions
Min.
Typ.
Max. Units
Input Crystal Frequency
10
25
MHz
Input Clock Frequency
10
150
MHz
Output Rise Time
tOR
0.8 to 2.0 V
1.5
ns
Output Fall Time
tOF
2.0 to 0.8 V
1.5
ns
One Sigma Jitter
CLK
40
Absolute Jitter
CLK
±160
Output Clock Duty Cycle
at VDD/2
Output Frequency
40
50
2
Output Frequency Synthesis
Error
ps
60
%
200
MHz
1
ppm
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
IDT™ SPREAD SPECTRUM MULTIPLIER CLOCK
Symbol
Conditions
Min.
Typ.
Max. Units
θ JA
Still air
135
° C/W
θ JA
1 m/s air flow
93
° C/W
θ JA
3 m/s air flow
78
° C/W
60
° C/W
θ JC
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SPREAD SPECTRUM MULTIPLIER CLOCK
SSCG
Package Outline and Package Dimensions (20 pin SSOP, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
20
Millimeters
Symbol
E1
A
A1
A2
b
C
D
E
E1
e
L
α
E
INDEX
AREA
1 2
D
A
2
Min
Inches
Max
Min
1.35
1.75
0.10
0.25
-1.50
0.20
0.30
0.18
0.25
8.55
8.75
5.80
6.20
3.80
4.00
0.635 Basic
0.40
1.27
0°
8°
Max
.053
.069
.0040
.010
-.059
0.008
0.012
.007
.010
.337
.344
.228
.244
.150
.157
0.025 Basic
.016
.050
0°
8°
A
A
1
c
-Ce
b
SEATING
PLANE
L
.10 (.004)
C
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
MK1714-02RLF
MK1714-01RLFTR
MK1714-02RILF
MK1714-02RILFTR
MK1714-02RL
MK1714-02RL
MK171402RIL
MK171402RIL
Tubes
Tape and Reel
Tubes
Tape and Reel
20-pin SSOP
20-pin SSOP
20-pin SSOP
20-pin SSOP
0 to +70° C
0 to +70° C
-40 to 85 ° C
-40 to 85 ° C
"LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
IDT™ SPREAD SPECTRUM MULTIPLIER CLOCK
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SPREAD SPECTRUM MULTIPLIER CLOCK
SSCG
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