UPA2727UT1A-E1-AY

DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2727T1A SWITCHING N-CHANNEL POWER MOSFET PACKAGE DRAWING (Unit: mm) DESCRIPTION 1.27 The μ PA2727T1A is N-channel MOSFET designed for DC/DC converter applications. 1 RDS(on)1 = 9.6 mΩ MAX. (VGS = 10 V, ID = 8 A) 6 4 5 +0.1 0.42 −0.05 6 ±0.2 • Built-in gate protection diode 0 +0.05 −0 • Thin type surface mount package with heat spreader (8-pin HVSON) • RoHS Compliant 1 0.2 Drain to Source Voltage (VGS = 0 V) VDSS 30 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) ID(DC) ±16 A ID(pulse) ±96 A PT1 1.5 W Drain Current (pulse) Note1 Total Power Dissipation Note2 Total Power Dissipation (PW =10 sec) Note2 PT2 4.6 W Channel Temperature Tch 150 °C Storage Temperature Tstg −55 to +150 °C Single Avalanche Current Note3 IAS 16 A Single Avalanche Energy Note3 EAS 26 mJ THERMAL RESISTANCE Channel to Ambient Thermal Resistance 1, 2, 3 : Source 4 : Gate 5, 6, 7, 8: Drain 4.1 ±0.2 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) 1.0 MAX. QGD = 3.5 nC TYP. (VDD = 15 V, ID = 16 A) 0.10 S 5.4 ±0.2 0.10 M • Low QGD 0.27 ±0.05 RDS(on)2 = 15 mΩ MAX. (VGS = 4.5 V, ID = 8 A) 7 3 5 ±0.2 • Low on-state resistance 8 2 3.65 ±0.2 0.6 ±0.15 0.7 ±0.15 EQUIVALENT CIRCUIT Drain Body Diode Gate Note2 Channel to Case (Drain) Thermal Resistance Rth(ch-A) 83.3 °C/W Rth(ch-C) 2.0 °C/W Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 5.15 ±0.2 FEATURES Gate Protection Diode Source 2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G18630EJ2V0DS00 (2nd edition) Date Published April 2007 NS CP(K) Printed in Japan The mark shows major revised points. The revised points can be easily searched by copying an "" in the PDF file and specifying it in the "Find what:" field. 2007 μ PA2727T1A ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT 10 μA ±10 μA 2.5 V Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V Gate Leakage Current IGSS VGS = ±16 V, VDS = 0 V VGS(off) VDS = 10 V, ID = 1 mA | yfs | VDS = 10 V, ID = 8 A RDS(on)1 VGS = 10 V, ID = 8 A 7.6 9.6 mΩ RDS(on)2 VGS = 4.5 V, ID = 8 A 11 15 mΩ Input Capacitance Ciss VDS = 15 V, 1170 pF Output Capacitance Coss VGS = 0 V, 250 pF Reverse Transfer Capacitance Crss f = 1 MHz 90 pF Turn-on Delay Time td(on) VDD = 15 V, ID = 8 A, 13 ns Rise Time tr VGS = 10 V, 3.6 ns Turn-off Delay Time td(off) RG = 10 Ω 41 ns Fall Time tf 8 ns Total Gate Charge QG VDD = 15 V, 11 nC Gate to Source Charge QGS VGS = 5 V, 3.8 nC QGD ID = 16 A 3.5 nC Gate to Source Cut-off Voltage Forward Transfer Admittance Note Drain to Source On-state Resistance Note Gate to Drain Charge Body Diode Forward Voltage Note 1.5 6 S VF(S-D) IF = 16 A, VGS = 0 V 0.83 V Reverse Recovery Time trr IF = 16 A, VGS = 0 V, 27 ns Reverse Recovery Charge Qrr di/dt = 100 A/μs 23 nC Gate Resistance RG f = 1 MHz 2.2 Ω Note Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω D.U.T. L 50 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME RL RG PG. VDD VGS VGS Wave Form 0 VGS 10% 90% VDD VDS 90% BVDSS IAS VDS ID VDS τ τ = 1 μs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 2 50 Ω 0 10% 10% tr td(off) Wave Form VDD Starting Tch 90% VDS VGS 0 RL VDD Data Sheet G18630EJ2V0DS td(on) ton tf toff μ PA2727T1A TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA FORWARD BIAS SAFE OPERATING AREA 1000 100 ID(DC) 10 30 0 μs s i 0 m s i d it e m Li V ) ) on 1i 0 S( = D R GS (V 1 Po w er D is si 1i 0 pa t io s n L im Single Pulse it e d Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm 20 0 1i 0 m = s 40 1i 0 i 60 PW m ID - Drain Current - A 80 ID(pulse) 100 1i dT - Percentage of Rated Power - % 120 0 20 40 60 80 100 0.1 0.01 120 140 160 0.1 1 10 100 VDS - Drain to Source Voltage - V TA - Ambient Temperature - °C TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 1000 Rth(ch-A) = 83.3°C/Wi 100 10 1 Rth(ch-C) = 2.0°C/Wi 0.1 Single Pulse Rth(ch-A): Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm 0.01 100 μ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 35 35 3.8 V 10 V 4.5 V 4.0 V 25 30 3.6 V 20 ID - Drain Current - A 30 ID - Drain Current - A 3.4 V 15 3.2 V 10 25 15 10 VGS = 3.0 V 5 TA = −55°C 25°C 75°C 125°C 20 VDS = 10 V Pulsed 5 Pulsed 0 0 0 0.2 0.4 0.6 0.8 1 VDS - Drain to Source Voltage - V 0 1 2 3 4 5 VGS - Gate to Source Voltage - V Data Sheet G18630EJ2V0DS 3 μ PA2727T1A | yfs | - Forward Transfer Admittance - S 3 2.5 2 1.5 1 0.5 VDS = 10 V ID =1 mA 0 -75 -25 25 75 125 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 TA = −55°C 25°C 75°C 125°C 10 1 VDS = 10 V Pulsed 0.1 175 0.1 100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 30 20 VGS = 4.5 V 10 10 V Pulsed 0 0.1 1 10 100 30 ID = 8 A Pulsed 20 10 0 0 5 10 15 20 VGS - Gate to Source Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 25 10000 ID = 8 A Pulsed 20 Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ 10 ID - Drain Current - A ID - Drain Current - A VGS = 4.5 V 15 10 10 V 5 0 Ciss 1000 Coss 100 Crss VGS = 0 V f = 1 MHz 10 -75 -25 25 75 125 175 Tch - Channel Temperature - °C 4 1 Tch - Channel Temperature - °C RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ VGS(off) - Gate to Source Cut-off Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 0.1 1 10 VDS - Drain to Source Voltage - V Data Sheet G18630EJ2V0DS 100 μ PA2727T1A DYNAMIC INPUT/OUTPUT CHARACTERISTICS SOURCE TO DRAIN DIODE FORWARD VOLTAGE 100 10 V VDD = 24 V 15 V 6V 4 IF - Diode Forward Current - A VGS - Gate to Source Voltage - V 6 2 VGS = 4.5 V 10 0V 1 ID = 16 A Pulsed 0.1 0 0 5 10 0 15 0.2 0.4 0.6 0.8 1 1.2 VF(S-D) - Source to Drain Voltage - V QG - Gate Charge - nC ORDERING INFORMATION PART NUMBER μ PA2727T1A-E1-AZ Note μ PA2727T1A-E2-AZ Note μ PA2727T1A-E1-AY Note μ PA2727T1A-E2-AY Note LEAD PLATING PACKING PACKAGE Sn-Bi Tape 3000 p/reel 8-pin HVSON 0.10 g TYP. Pure Sn Note Pb-free (This product does not contain Pb in the external electrode.) Data Sheet G18630EJ2V0DS 5 μ PA2727T1A • The information in this document is current as of April, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. 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