ZL8802ALAFT

DATASHEET ZL8802 FN8760 Rev.3.00 Nov 8, 2017 Dual Channel/Dual Phase PMBus ChargeMode Control DC/DC Digital Controller The ZL8802 is a dual output or dual phase digital DC/DC controller. Each output can operate independently or be used together in a dual phase configuration for high current applications supporting 2-, 4-, 6-, and 8-phase operation with up to four ZL8802 controllers. Features The ZL8802 supports a wide range of output voltages (0.54V to 5.5V) operating from input voltages as low as 4.5V up to 14V. • 1% output voltage accuracy over line, load, and temperature With the fully digital ChargeMode control, the ZL8802 will respond to a transient load step within a single switching cycle. This unique compensation-free modulation technique allows designs to meet transient specifications with minimum output capacitance, thus saving cost and board space. • Unique compensation-free design – always stable • Output voltage range: 0.54V to 5.5V • Input voltage range: 4.5V to 14V • ChargeMode control achieves fast transient response, reduced output capacitance, and provides output stability without compensation. • 2-channel output, 2-, 4-, 6-, or 8-phase output with two, three, or four devices • Switching frequency range 200kHz to 1.33MHz The proprietary single-wire Digital-DC™ (DDC) serial bus enables the ZL8802 to communicate between other Intersil digital power ICs. By using the DDC, the ZL8802 achieves complex functions such as inter-IC phase current balancing, sequencing, and fault spreading. This eliminates complicated power supply managers with numerous external discrete components. • Proprietary single-wire DDC (Digital-DC) serial bus enables voltage sequencing and fault spreading with other Intersil digital power ICs The ZL8802 features fast output overcurrent protection. The input voltage, output voltages, and DrMOS/MOSFET driver supply voltages are overvoltage and undervoltage protected. Two external temperature sensors and one internal temperature sensor are available for temperature monitoring, one of which can be configured for under- and overtemperature protection. A snapshot parametric capture feature allows users to take a snapshot of operating and fault data during normal or fault conditions. • Accurate average output current measurement with adjustable gain settings for sensing with SPS current monitor outputs or high current, low DCR inductors Integrated Low Dropout (LDO) regulators allow the ZL8802 to operate from a single input supply eliminating the need for additional linear regulators. The VDRV LDO output can be used to power external drivers or DrMOS devices. Applications With full PMBus compliance, the ZL8802 is capable of measuring and reporting input voltage, input current, output voltage, output current, as well as the device’s internal temperature, two external temperatures, and an auxiliary voltage or temperature input. • Power supplies (memory, DSP, ASIC, FPGA) • Inductor peak and averaged over and undercurrent protection • Digital fault protection for output voltage UV/OV, input voltage UV/OV, temperature, and MOSFET driver voltage • Monitor ADC measures input voltage, input current, output voltage, driver voltage, internal and external temperature • Nonvolatile memory for storing operating parameters and fault events • PMBus compliant • Servers and storage equipment • Telecom and datacom equipment Related Literature • For a full list of related documents, visit our website - ZL8802 product page TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS PART NUMBER DUAL OUTPUT DUAL PHASE DDC CURRENT SHARE SPS SUPPORT ZL8800 Yes Yes No No ZL8801 No Yes Yes No ZL8802 Yes Yes Yes Yes FN8760 Rev.3.00 Nov 8, 2017 Page 1 of 91 ZL8802 Table of Contents Two-Phase Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 ZL8802 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital-DC Architecture Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Management Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin-Strap Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configurable Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Device Address Selection (SA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Voltage and VOUT_MAX Selection (VSET0, 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Switching Frequency Setting (SYNC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Voltage Undervoltage Lockout Setting (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration Setting (CFG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ChargeMode Control (ASCR) Setting (ASCRCFG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Start-Up and Shutdown Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Bias Regulators and Input Supply Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Start-Up Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ton-Delay and Rise Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enable Pin Operation and Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power-Good . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 11 11 12 12 12 12 13 13 14 14 14 15 15 16 16 Power Management Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Overvoltage Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Prebias Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current Limit Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Current Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage Tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Voltage Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital-DC Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Phase Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fault Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Current Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Monitoring Using XTEMP Pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Nonvolatile Memory and Security Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Monitoring Through SMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16 16 17 18 18 18 18 19 19 19 20 20 20 20 21 21 21 PMBus Command Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PMBus Use Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PMBus Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PMBus Command Detail. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MFR_SMBALERT_MASK (DBh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 25 26 27 70 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 FN8760 Rev.3.00 Nov 8, 2017 Page 2 of 91 ZL8802 9,1 [—) —) PŸ 237,21$/ ,,13 ,,11 FN8760 Rev.3.00 Nov 8, 2017 Two-Phase Application 9'' 9'59 9 9 9&& —) =/ 9,1 9 39&& —) %227 —) 3+$6( &*1' ,6/% ,021 6 VTARGET V IN VIN ZL8802 L FIGURE 6. OUTPUT RESPONSES TO PREBIAS VOLTAGES If a prebias voltage higher than the target voltage exists after the preconfigured Ton-delay time and Ton-rise time have completed, the ZL8802 starts switching with a duty cycle that matches the prebias voltage. This ensures that the ramp-down from the prebias voltage is monotonic. The output voltage is then ramped down to the desired output voltage PWMH ISENA ISENB If a prebias voltage higher than the overvoltage limit exists, the device will not initiate a turn-on sequence and will stay off. Output Overcurrent Protection The ZL8802 can protect the power supply from damage from an overloaded or shorted output. When the current limit threshold has been selected (see “Current Limit Configuration” on page 18), the user can determine the desired response to the fault condition. The following overcurrent protection response options are available: • Shut down and stay off until the device has been disabled and reenabled. • Shut down and restart continuously after a delay. FN8760 Rev.3.00 Nov 8, 2017 DRMOS V OUT R1 C1 FIGURE 8. DCR CURRENT SENSING For the voltage across C1 to reflect the voltage across the DCR of the inductor, the time constant of the inductor must match the time constant of the RC network.  RC   L / DCR R1  C1  L DCR (EQ. 3) This capacitor, shown as C1 in Figure 8, should be an X7R or better dielectric, and C1 should be placed as close to the ZL8802 as possible for the best noise performance. The L and DCR values should be set using the INDUCTOR and IOUT(0/1)_CAL_GAIN Page 17 of 91 ZL8802 commands. For L, use the average of the nominal value and the minimum value. Include the effects of tolerance, DC bias, and switching frequency on the inductance when determining the minimum value of L. Use the typical room temperature value for DCR. Current Limit Configuration The ZL8802 gives the power supply designer several choices for the fault response during overcurrent or undercurrent conditions. The user can select the number of violations allowed before declaring fault, a blanking time, and the action taken when a fault is detected. These parameters can be configured using the ISENSE_CONFIG command. The blanking time represents the time when no current measurement is taken. This is to avoid taking a reading just after a current load step (less accurate due to potential ringing). It is a configurable parameter from 0 to 832ns. ZL8802 provides an adjustable maximum full scale sensing range. Three ranges are available: ±25mV, ±35mV, and ±50mV maximum input voltage. By default, current sensing is enabled during the inductor current down-slope period of the switching period (D’). In applications where the steady state duty cycle is >0.5, for example, a 5V to 3.3V converter, the ZL8802 can be configured to sense current during the inductor up-slope period of the switching cycle (D). The user has the option of selecting how many consecutive overcurrent readings must occur before an overcurrent fault and subsequent shutdown are initiated. Either 1, 3, 5, 7, 9, 11, or 13 consecutive faults can be selected. The current limit thresholds are set with four commands: 1. IOUT_OC_FAULT_LIMIT – This sets the overcurrent threshold that must be exceeded by the number of consecutive times chosen in ISENSE_CONFIG. 2. IOUT_UC_FAULT_LIMIT – This is the same as IOUT_OC_FAULT_LIMIT, but represents the negative current that flows lower FET during the D’ interval. Large negative currents can flow during faults such as a higher voltage rail being shorted to a lower voltage rail. 3. IOUT_AVG_OC_FAULT_LIMIT – This limit is similar to IOUT_OC_FAULT_LIMIT, but the limit represents an average reading over several switching cycles. Because it is an average, the response time is slower, but the limit can be set closer to the maximum average expected output current. 4. IOUT_AVG_UC_FAULT_LIMIT – This limit is similar to IOUT_AVG_OC_FAULT_LIMIT, but represents the negative current that flows lower FET during the D’ interval. Input Current Monitor The input current can be monitored through the IINN and IINP pins. The input current monitor input should be connected across a current sensing resistor in series with the input supply. The IINP pin is connected to the input supply side of the current sense resistor and the IINN pin is connected to the ZL8802 VDD side of the current sense resistor. Using the IIN_SCALE command, set the current sense resistor value. Select the current sense resistor value such that the maximum expected input current times the FN8760 Rev.3.00 Nov 8, 2017 current sense resistor value does not exceed the maximum current sensing input voltage of 20mV. If this feature is not used, IINN and IINP should be tied to VDD. Thermal Overload Protection The ZL8802 includes an on-chip thermal sensor that continuously measures the internal temperature of the die. This thermal sensor is used to provide both over-temperature and under-temperature protection. If the over-temperature limit is exceeded, or the temperature falls below the under-temperature limit, the ZL8802 is shut down. The over-temperature and under-temperature limits are set by the OT_FAULT_LIMIT and UT_FAULT_LIMIT respectively. The ZL8802 will not attempt to restart until the temperature has fallen below the OT_WARN_LIMIT for over-temperature faults or has risen above the UT_WARN_LIMIT for under-temperature faults. The default temperature limits are +125°C and -45°C, but the user can set the limits to different values if desired. Note that setting a higher over-temperature or under-temperature limit may result in permanent damage to the device. When the device has been disabled due to an internal temperature fault, the user can select one of several fault response options as follows: • Shut down and stay off until the fault has cleared and the device has been disabled and reenabled. • Shut down and restart continuously after a delay. Refer to “PMBus Command Detail” on page 27 for details on how to select specific overvoltage fault response options using the OT_FAULT_RESPONSE and UT_FAULT_ RESPONSE commands. Voltage Tracking Numerous high performance systems place stringent demands on the order in which the power supply voltages are turned on. This is particularly true when powering FPGAs, ASICs, and other advanced processor devices that require multiple supply voltages to power a single die. In most cases, the I/O interface operates at a higher voltage than the core and therefore the core supply voltage must not exceed the I/O supply voltage according to manufacturer specifications. The ZL8802 integrates a tracking scheme that allows one of its outputs (Channel 0 or Channel 1), or the single output in a dual phase application, to track a voltage that is applied to the VTRK pin with no external components required. The VTRK pin is an analog input that, when tracking mode is enabled, configures the voltage applied to the VTRK pin to act as a reference for the device’s output regulation. Coincident. This mode configures the ZL8802 to ramp its output voltage at the same rate as the voltage applied to the VTRK pin until it reaches its desired output voltage. The device that is tracking another output voltage (slave) must be set to its desired steady state output voltage, that is, the VOUT_COMMAND is set to the final output voltage. Ratiometric. This mode configures the ZL8802 to ramp its output voltage at a rate that is a percentage of the voltage applied to the VTRK pin. The default setting is 50%, but an external resistor string can be used to configure a different tracking ratio. The device that is tracking another output voltage (slave) must be set to its desired steady-state output voltage, that is, the VOUT_COMMAND is set to the final output voltage. Page 18 of 91 ZL8802 The master ZL8802 device in a tracking group is defined as the device that has the highest target output voltage within the group. This master device will control the ramp rate of all tracking devices and is not configured for tracking mode. The maximum tracking rise time is 1V/ms. The slave device must be enabled before the master. Any device that is configured for tracking mode will ignore its Ton-delay and Ton-rise settings and its output will take on the turn-on/turn-off characteristics of the reference voltage present at the VTRK pin. Tracking mode can be configured by using the TRACK_CONFIG command. Note that current sharing groups that are also configured to track another voltage do not offer prebias protection; a minimum load should therefore be enforced to avoid the output voltage from being held up by an outside force. V OUT Vo1 Vo2 TIME COINCIDENT V OUT Vo1 Vo2 TIME RATIOMETRIC FIGURE 9. TRACKING MODES External Voltage Monitoring The voltage monitoring (TMON) pin is available to monitor the voltage supply for the external driver IC. The TMON input must be scaled by a 16:1 ratio to read-back the TMON voltage correctly. A 100kΩ and 6.65kΩ resistor divider is recommended. Overvoltage and undervoltage fault thresholds can be set using MFR_TMON_OV_FAULT_LIMIT and MFR_ TMON_UV_FAULT_LIMIT commands. The response to these limits are set using the TMON_OV_FAULT_RESPONSE and TMON_ UV_FAULT_RESPONSE commands. To ignore the TMON input, set the TMON_OV and _UV_FAULT_RESPONSE to 00h. When the device has been disabled due to TMON fault, the user can select one of several fault response options as follows: • Shut down and stay off until the fault has cleared and the device has been disabled and reenabled. • Shut down and restart continuously after a delay. FN8760 Rev.3.00 Nov 8, 2017 SMBus Communications The ZL8802 provides a SMBus digital interface. The ZL8802 can be used with any standard 2-wire SMBus host device. In addition, the device is compatible with SMBus version 2.0 and includes an SALRT line to help mitigate bandwidth limitations related to continuous fault monitoring. Pull-up resistors are required on the SMBus. The pull-up resistor can be tied to VR5 or to an external 3.3V or 5V supply as long as this voltage is present before or during device power-up. The ideal design will use a central pull-up resistor that is well-matched to the total load capacitance. The minimum pull-up resistance should be limited to a value that enables any device to assert the bus to a voltage that will ensure a logic 0 (typically 0.8V at the device monitoring point) given the pull-up voltage (5V if tied to VR5) and the pull-down current capability of the ZL8802 (nominally 4mA). A pull-up resistor of 10kΩ is a good value for most applications. SMBus data and clock lines should be routed with a closely coupled return or ground plane to minimize coupled interference (noise). Excessive noise on the data and clock lines that cause the voltage on these lines to cross the high and low logic thresholds of 2.0V and 0.8V respectively will cause command transmissions to be interrupted and result in slow bus operation or missed commands. A 10kΩ resistor on each line provides good performance on an SMBus with fewer than 10 devices. The ZL8802 accepts most standard PMBus commands. When enabling the device with ON_OFF_CONFIG command, it is recommended that the enable pin is tied to SGND. In addition to bus noise considerations, it is important to ensure that user connections to the SMBus are compliant to the PMBus command standards. Any device that can malfunction in a way that permanently shorts SMBus lines will disable PMBus communications. Incomplete PMBus commands can also cause the ZL8802 to halt PMBus communications. This can be corrected by disabling, then reenabling the device. Digital-DC Bus The Digital-DC Communications (DDC) bus is used to communicate between Intersil Digital-DC devices, and within the ZL8802 itself. This dedicated bus provides the communication channel between devices for features such as sequencing, fault spreading and current sharing. The DDC pin must be pulled-up to an external 2.5V to 5.0V supply, (or configured as a push-pull output using the USER_GLOBAL_CONFIG command) even if the ZL8802 is operating stand-alone. In addition, the DDC pin must be pulled up or configured as a push-pull output before the Enable pin is set high. Push-pull mode can only be used when the ZL8802 is operating stand-alone. The DDC pin on all Digital-DC devices that utilize sequencing, fault spreading or current sharing must be connected together. The DDC pin on all Digital-DC devices in an application should be connected together. A pull-up resistor is required on the DDC bus to guarantee the rise time as follows: Riset time = R PU  C LOAD  1s (EQ. 4) Where RPU is the DDC bus pull-up resistance and CLOAD is the bus loading. The pull-up resistor can be tied to VR5 or to an external 3.3V or 5V supply as long as this voltage is present before or during device power-up. Generally, each device Page 19 of 91 ZL8802 Phase Spreading When multiple point-of-load converters share a common DC input supply, it is desirable to adjust the clock phase offset of each device such that not all devices have coincident rising edges. Setting each converter to start its switching cycle at a different point in time can dramatically reduce input capacitance requirements. Because the peak current drawn from the input supply is effectively spread out over a period of time, the peak current drawn at any given moment is reduced and the power losses proportional to IRMS2 are reduced. To enable phase spreading, all converters must be synchronized to the same switching clock. Configuring the SYNC pin is described in “Configurable Pins” on page 12. Selecting the phase offset for the device is accomplished by selecting a device address according to Equation 5: Phase offset = device address  45 (EQ. 5) The phase offset of each device can also be set to any value between 0° and 360° in 22.5° increments using the INTERLEAVE PMBus command. Output Sequencing A group of Intersil digital power devices can be configured to power up in a predetermined sequence. This feature is especially useful when powering advanced processors, FPGAs, and ASICs that require one supply to reach its operating voltage before another supply reaching its operating voltage to avoid latch-up from occurring. Multidevice sequencing can be achieved by configuring each device using the SEQUENCE PMBus command. Multiple device sequencing is achieved by issuing PMBus commands to assign the preceding device in the sequencing chain as well as the device that will follow in the sequencing chain. The enable (EN) pins of all devices in a sequencing group must be tied together and driven high to initiate a sequenced turn-on of the group. Enable must be driven low to initiate a sequenced turn-off of the group. To achieve sequenced turn-off of a group of sequenced devices, all the devices should be configured to turn FN8760 Rev.3.00 Nov 8, 2017 off using the “soft-off”, or ramped down behavior, in the ON_OFF_CONFIG PMBus command. When sequencing on, the first device to ramp up, called the “prequel”, sends a message through the DDC bus to the next device, called the “sequel” when the prequel’s Power-Good (PG) signal is driven high. When sequencing off, the sequel will send a message to the prequel to begin the prequel’s ramp down after the sequel has completed its own ramp down. Sequencing can also be accomplished by connecting the enable pin of a sequel device to the Power-Good pin of a prequel device. Sequencing is also achieved by using the TON_DELAY and TON_RISE commands and choosing appropriate delay and rise durations such that sequel devices start after their associated prequel devices. The drawback to this method is that if a prequel device fails to start properly, its sequel device will still start and ramp on according to its delay and rise time settings. Fault Spreading Digital-DC devices can be configured to broadcast a fault event over the DDC bus to the other devices in the group. When a fault occurs and the device is configured to shut down on a fault, the device will shut down and broadcast the fault event over the DDC bus. The other devices on the DDC bus will shut down together if configured to do so, and will attempt to restart in their prescribed order if configured to do so. Active Current Sharing The PWM outputs of the ZL8802 are used in parallel to create a dual phase power rail. The device outputs will share the current equally within a few percent, assuming all external sensing element variations and tolerances are negligible. Current sensing element tolerances must be taken into account, or adjusted for using the IOUT_CAL_GAIN and IOUT_CAL_OFFSET commands in any application. The ZL8802 will current share between phases without utilizing output voltage droop. Droop resistance is used in 4-phase current sharing to add artificial resistance in the output voltage path to control the slope of the load line curve, calibrating out the physical parasitic mismatches due to power train components and PCB layout. VREFERENCE -R VOUT connected to the DDC bus presents approximately 12pF of capacitive loading. The ideal design will use a central pull-up resistor that is well-matched to the total load capacitance. In power module applications, the user should consider whether to place the pull-up resistor on the module or on the PCB of the end application. The minimum pull-up resistance should be limited to a value that enables any device to assert the bus to a voltage that will ensure a logic 0 (typically 0.8V at the device monitoring point) given the pull-up voltage (5V if tied to VR5) and the pull-down current capability of the ZL8802 (nominally 4mA). As with SMBus data and clock lines, the DDC data line should be routed with a closely coupled return or ground plane to minimize coupled interference (noise). Excessive noise on the DDC signal can cause the voltage on this line to cross the high and low logic thresholds of 2.0V and 0.8V respectively and will cause command transmissions to be interrupted and result in slow bus operation or missed commands. For less than 10 devices on the DDC bus a 10kΩ resistor provides good performance. VMEMBER -R I MEMBER I OUT I REFERENCE FIGURE 10. ACTIVE CURRENT SHARING Page 20 of 91 ZL8802 When current sharing up to 2 ZL8802s (4 phases total), the ZL8802 uses a low-bandwidth, first-order digital current sharing technique to balance the unequal device output loading by aligning the load lines of member devices to a reference device. Upon system start-up, the lowest numbered phase is defined as the reference phase and all other phases are member phases. The reference phase broadcasts its current over the DDC bus. The member phases use the reference current information to trim their reference voltages (VMEMBER) to balance the current loading of each device in the system. Figure 10 on page 20 shows that, for load lines with identical slopes, the member reference voltage is increased towards the reference voltage which closes the gap between the inductor currents. The relation between reference and member current and voltage is given by the following Equation 6: VMEMBER  VOUT  R  I REFERENCE  I MEMBER  (EQ. 6) Where R is the value of the droop resistance. The VOUT_DROOP command is used to set the device output voltage droop to achieve 4-, 6- or 8-phase current sharing. 4-, 6-, and 8-phase current sharing groups must have their DDC and SYNC pins tied together to achieve current sensing and ensure accurate phase offsets between current sharing phases. Temperature Monitoring Using XTEMP Pin Each channel of the ZL8802 supports measurement of an external device temperature using either a thermal diode integrated in a processor, FPGA or ASIC, or using a discrete diode-connected 2N3904 NPN transistor. Figure 11 illustrates the typical connections required. A noise filtering capacitor, not exceeding 100pF, should be connected across the external temperature sensing device. The external temperature sensors can be used to provide the temperature reading for over-temperature and under-temperature faults. The external sensors can also be used to provide more accurate temperature compensation for inductor DCR current sensing by being placed close to the inductor. These options for the external temperature sensors are selected using the USER_CONFIG PMBus command. XTEMPxP ZL8802 100pF 2N3904 XTEMPxN DISCRETE NPN XTEMPxP ZL8802 100pF ASIC XTEMPxN EMBEDDED THERMAL DIODE FIGURE 11. EXTERNAL TEMPERATURE MONITORING FN8760 Rev.3.00 Nov 8, 2017 Nonvolatile Memory and Security Features The ZL8802 has internal nonvolatile memory where user configurations are stored. Integrated security measures ensure that the user can only restore the device to a level that has been made available to them. During the initialization process, the ZL8802 checks for stored values contained in its internal nonvolatile memory. The ZL8802 offers two internal memory storage units that are accessible by the user as follows: User Store: The user store is the most commonly used store. It provides the ability to modify certain power supply settings while still protecting the equipment from modifying values that can lead to a system level fault. The equipment manufacturer would use the user store to achieve this goal. Default Store: The default store is less commonly used. It provides a means to protect the circuit from damage by preventing the user from modifying certain values that are related to the physical construction of the circuit. In this case, the Original Equipment Manufacturer (OEM) would use the default store in a protected mode and allow the user to restore the device to its default settings. In this case the user store would be available to the end-user for making changes, but would restrict the user from restoring the device to the factory settings or modifying the default store. The user store takes priority over the Default Store. If there are no values set in the user or default store, then the device will use the pin-strap setting value. For details regarding protection of the user and default stores, see the PASSWORD PMBus command. Monitoring Through SMBus A system controller can monitor a wide variety of different ZL8802 parameters through the SMBus interface. The device can monitor for fault conditions by monitoring the SALRT pin, which will be asserted when any number of preconfigured fault conditions occur. The device can also be monitored continuously for any number of power conversion parameters including, but not limited to, the following: • • • • • • • • • Input voltage Output voltage Input current Output current Internal junction temperature Temperature of an external device Switching frequency Duty cycle Fault status information The PMBus Host should respond to SALRT as follows: 1. ZL device pulls SALRT low. 2. PMBus host detects that SALRT is now low, and performs transmission with Alert Response Address to find which ZL device is pulling SALRT low. Page 21 of 91 ZL8802 3. PMBus host talks to the ZL device that has pulled SALRT low. The actions that the host performs are up to the system designer. Refer to “PMBus Command Detail” on page 27 for details on how to monitor specific parameters through the SMBus interface. If multiple devices are faulting, SALRT will still be low after doing the above steps and will require transmission with the Alert Response Address repeatedly until all faults are cleared. PMBus Command Summary CODE COMMAND NAME DESCRIPTION DATA TYPE FORMAT DEFAULT VALUE DEFAULT SETTING 00h PAGE Selects Controller 0, 1, or both R/W BIT 00h Page 0 Controller addressed 01h OPERATION Enable/disable, margin settings R/W BIT 00h Immediate off, nominal margin 02h ON_OFF_CONFIG On/off configuration settings R/W BIT 17h ENABLE pin control, active high 03h CLEAR_FAULTS Clears faults Write N/A N/A N/A 11h STORE_DEFAULT_ALL Stores values to default store Write N/A N/A N/A 12h RESTORE_DEFAULT_ALL Restores values from default store Write N/A N/A N/A 15h STORE_USER_ALL Stores values to user store Write N/A N/A N/A 16h RESTORE_USER_ALL Restores values from user store Write N/A N/A N/A 20h VOUT_MODE Reports VOUT mode and exponent Read BIT 13h Linear mode, exponent = -13 21h VOUT_COMMAND Sets nominal VOUT set-point R/W L16u N/A Pin-strap setting 22h VOUT_TRIM Applies offset voltage to VOUT set-point R/W L16s 0000h 0V 23h VOUT_CAL_OFFSET Applies offset voltage to VOUT set-point R/W L16s 0000h 0V 24h VOUT_MAX Sets maximum VOUT set-point R/W L16u N/A 1.15 x VSET pin-strap setting 25h VOUT_MARGIN_HIGH Sets VOUT set-point during margin high R/W L16u N/A 1.05 x VSET pin-strap setting 26h VOUT_MARGIN_LOW Sets VOUT set-point during margin low R/W L16u N/A 0.95 x VSET pin-strap setting 27h VOUT_TRANSITION_RATE Sets VOUT transition rate during margin commands R/W L11 BA00h 28h VOUT_DROOP Sets V/I slope for total rail output current (all phases combined) R/W L11 N/A CFG pin-strap setting 33h FREQUENCY_SWITCH Sets switching frequency R/W L11 N/A SYNC pin-strap setting 37h INTERLEAVE Configures phase offset during group operation R/W BIT N/A CFG pin-strap setting 38h IOUT_CAL_GAIN Sets impedance of current sense circuit R/W L11 B2AEh 0.67mΩ 39h IOUT_CAL_OFFSET Sets an offset to IOUT sense circuit R/W L11 BD00h -1.5A 40h VOUT_OV_FAULT_LIMIT Sets the VOUT overvoltage fault threshold R/W L16u N/A 1.10 x VSET pin-strap setting 41h VOUT_OV_FAULT_RESPONSE Sets the VOUT overvoltage fault response R/W BIT 80h Disable, no retry 44h VOUT_UV_FAULT_LIMIT Sets the VOUT undervoltage fault threshold R/W L16u N/A 0.85 x VSET pin-strap setting 45h VOUT_UV_FAULT_RESPONSE Sets the VOUT undervoltage fault response R/W BIT 80h Disable, no retry 46h IOUT_OC_FAULT_LIMIT Sets the IOUT peak overcurrent fault threshold for each phase R/W L11 N/A CFG pin-strap setting 4Bh IOUT_UC_FAULT_LIMIT Sets the IOUT valley undercurrent fault threshold for each phase R/W L11 N/A -1*IOUT_OC_FAULT_LIMIT from CFG pin-strap setting 4Fh OT_FAULT_LIMIT Sets the over-temperature fault limit R/W L11 EBE8h 50h OT_FAULT_RESPONSE Sets the over-temperature fault response R/W BIT BFh 51h OT_WARN_LIMIT Sets the over-temperature warning limit R/W L11 EB70h +110°C 52h UT_WARN_LIMIT Sets the under-temperature warning limit R/W L11 DC40h -30°C FN8760 Rev.3.00 Nov 8, 2017 1V/ms +125°C Continuous retry, 280ms retry delay Page 22 of 91 ZL8802 PMBus Command Summary CODE COMMAND NAME (Continued) DESCRIPTION DATA TYPE FORMAT DEFAULT VALUE DEFAULT SETTING 53h UT_FAULT_LIMIT Sets the under-temperature fault limit R/W L11 E530h 54h UT_FAULT_RESPONSE Sets the under-temperature fault response R/W BIT BFh 55h VIN_OV_FAULT_LIMIT Sets the VIN overvoltage fault threshold R/W L11 D380h 56h VIN_OV_FAULT_RESPONSE Sets the VIN overvoltage fault response R/W BIT 80h 57h VIN_OV_WARN_LIMIT Sets the VIN overvoltage warning threshold R/W L11 D360h 58h VIN_UV_WARN_LIMIT Sets the VIN undervoltage warning threshold R/W L11 N/A 1.1 x UVLO pin-strap setting 59h VIN_UV_FAULT_LIMIT Sets the VIN undervoltage fault threshold R/W L11 N/A UVLO pin-strap setting 5Ah VIN_UV_FAULT_RESPONSE Sets the VIN undervoltage fault response R/W BIT BFh Continuous retries, 280ms retry delay 5Eh POWER_GOOD_ON Sets the voltage threshold for Power-Good R/W indication L16u N/A 0.9 x VSET pin-strap setting 60h TON_DELAY Sets the delay time from enable to VOUT rise R/W L11 CA80h 5ms 61h TON_RISE Sets the rise time of VOUT after ENABLE and TON_DELAY R/W L11 CA80h 5ms 64h TOFF_DELAY Sets the delay time from DISABLE to start of VOUT fall R/W L11 CA80h 5ms 65h TOFF_FALL Sets the fall time for VOUT after DISABLE and TOFF_DELAY R/W L11 CA80h 5ms 78h STATUS_BYTE First byte of STATUS_WORD Read BIT 00h No faults 79h STATUS_WORD Summary of critical faults Read BIT 0000h No faults 7Ah STATUS_VOUT Reports VOUT warnings/faults Read BIT 00h No faults 7Bh STATUS_IOUT Reports IOUT warnings/faults Read BIT 00h No faults 7Ch STATUS_INPUT Reports input warnings/faults Read BIT 00h No faults 7Dh STATUS_TEMP Reports temperature warnings/faults Read BIT 00h No faults 7Eh STATUS_CML Reports communication, memory, logic errors Read BIT 00h No faults 80h STATUS_MFR_SPECIFIC Reports voltage monitoring/clock synchronization faults Read BIT 00h no faults 88h READ_VIN Reports input voltage measurement Read L11 N/A N/A 89h READ_IIN Reports input current measurement Read L11 N/A N/A 8Bh READ_VOUT Reports output voltage measurement Read L16u N/A N/A 8Ch READ_IOUT Reports output current measurement Read L11 N/A N/A 8Dh READ_TEMPERATURE_1 Reports internal temperature measurement Read L11 N/A N/A 8Eh READ_TEMPERATURE_2 Reports external temperature measurement from XTEMP pins Read L11 N/A N/A 8Fh READ_TEMPERATURE_3 Reports external temperature measurement from VMON/TMON pin. Read L11 N/A N/A 94h READ_DUTY_CYCLE Reports actual duty cycle Read L11 N/A N/A 95h READ_FREQUENCY Reports actual switching frequency Read L11 N/A N/A 98h PMBUS_REVISION Reports the PMBUS revision used Read BIT 22h P1 R1.2, P2 R1.2 FN8760 Rev.3.00 Nov 8, 2017 -45°C Continuous retry, 280ms retry delay 14V Disable, no retry 13.5V Page 23 of 91 ZL8802 PMBus Command Summary CODE COMMAND NAME (Continued) DESCRIPTION DATA TYPE FORMAT DEFAULT VALUE DEFAULT SETTING 99h MFR_ID Sets a user defined identification R/W ASC N/A 9Ah MFR_MODEL Sets a user defined model R/W ASC N/A 9Bh MFR_REVISION Sets a user defined revision R/W ASC N/A 9Ch MFR_LOCATION Sets a user defined location identifier R/W ASC N/A 9Dh MFR_DATE Sets a user defined date R/W ASC N/A 9Eh MFR_SERIAL Sets a user defined serialized identifier R/W ASC N/A ADh IC_DEVICE_ID Reports device identification information Read CUS 49A02D00h Intersil ZL8802 AEh IC_DEVICE_REV Reports device revision information Read CUS 01000000h Initial Release B0h USER_DATA_00 Sets user defined data R/W ASC N/A CEh MIN_VOUT_REG Sets a minimum start-up voltage R/W L11 0000h 0mV D0h ISENSE_CONFIG Configures current sensing circuitry R/W BIT 620Eh Downslope, 5 fault count, 384ns blanking, high range D1h USER_CONFIG Configures several user-level features R/W BIT N/A D2h IIN_CAL_GAIN Sets the resistance of the input current sensing resistor R/W L11 C200h D3h DDC_CONFIG Configures the DDC addressing and current R/W sharing BIT N/A D4h POWER_GOOD_DELAY Sets the delay between PG threshold and PG assertion R/W L11 BA00h D5h MULTI_PHASE_RAMP_GAIN Adjusts the ramp-up and ramp-down rate by setting the feedback gain R/W CUS 03h D6h INDUCTOR Sets the inductor value R/W L11 B133h 0.3µH D7h SNAPSHOT_FAULT_MASK Masks faults that cause a snapshot to be taken R/W BIT 0000h No faults masked D8h OVUV_CONFIG Configures output voltage OV/UV fault detection R/W BIT 00h D9h XTEMP_SCALE Calibrates external temperature sensor R/W L11 BA00h 1/degree C DAh XTEMP_OFFSET Offset calibration for external temperature R/W sensor L11 0000h No offset DBh MFR_SMBALERT_MASK Identifies which fault limits will not assert SALRT R/W Custom 00..00h N/A DCh TEMPCO_CONFIG Sets tempco settings R/W BIT 00h 0ppm/°C DDh PINSTRAP_READ_STATUS Reads pin-strap settings Read BIT N/A Set by pin-straps DFh ASCR_CONFIG Configures the ASCR settings R/W BIT N/A ASCRCFG pin-strap setting E0h SEQUENCE DDC rail sequencing configuration R/W BIT 00h Prequel and sequel disabled E1h TRACK_CONFIG Configures voltage tracking R/W BIT 00h Tracking disabled E2h DDC_GROUP Configures group ID, fault spreading, OPERATION, and VOUT R/W BIT N/A Set by CFG pin-strap E4h DEVICE_ID Returns the device identifier string Read ASC TBD ZL8802, current revisions E5h MFR_IOUT_OC_FAULT_RESPONSE Configures the IOUT overcurrent fault response R/W BIT 80h Disable, no retry E6h MFR_IOUT_UC_FAULT_RESPONSE Configures the IOUT undercurrent fault response R/W BIT 80h Disable, no retry FN8760 Rev.3.00 Nov 8, 2017 Set by CFG pin-strap setting 2mΩ Set by pin-strapped PMBus address and CFG pin-strap setting 1ms 3 Low side FET off on fault, 1 violation triggers fault. Page 24 of 91 ZL8802 PMBus Command Summary CODE COMMAND NAME (Continued) DESCRIPTION DATA TYPE FORMAT DEFAULT VALUE DEFAULT SETTING E7h IOUT_AVG_OC_FAULT_LIMIT Sets the IOUT average overcurrent fault threshold R/W L11 N/A Set by CFG pin-strap E8h IOUT_AVG_UC_FAULT_LIMIT Sets the IOUT average undercurrent fault threshold R/W L11 N/A -1* IOUT_AVG_OC_FAULT_LIMIT from CFG pin-strap setting E9h USER_GLOBAL_CONFIG Sets options pertaining to advanced features R/W BIT N/A Set by CFG pin-strap setting EAh SNAPSHOT 32-byte read-back of parametric and status values Read BIT N/A F0h LEGACY_FAULT_GROUP Configures fault group compatibility with older Intersil digital power devices R/W BIT F3h SNAPSHOT_CONTROL Snapshot feature control command R/W BIT 00h N/A F4h RESTORE_FACTORY Restores device to the hard-coded default Write values N/A N/A N/A F5h MFR_VMON_OV_FAULT_LIMIT Sets the VMON overvoltage fault threshold R/W L11 C266h 2.4V, SPS OT trip voltage F6h MFR_VMON_UV_FAULT_LIMIT Sets the VMON undervoltage fault threshold R/W L11 B0CCh 0.2V, corresponds to -50°C F7h MFR_READ_VMON Reads the VMON voltage Read L11 N/A N/A F8h VMON_OV_FAULT_RESPONSE Configures the VMON overvoltage fault response R/W BIT BFh Continuous retry F9h VMON_UV_FAULT_RESPONSE Configures the VMON undervoltage fault response R/W BIT BFh Continuous retry FAh SECURITY_LEVEL Reports the security level Read Hex 01h Public security level FBh PRIVATE_PASSWORD Sets the private password string R/W ASC 00…00h FCh PUBLIC_PASSWORD Sets the public password string R/W ASC 00…00h FDh UNPROTECT Identifies which commands are protected R/W Custom FF…FFh No commands are protected 00000000h PMBus Use Guidelines The PMBus is a powerful tool that allows the user to optimize circuit performance by configuring the ZL8802 for their application. When configuring the ZL8802 in a circuit, the ZL8802 should be disabled whenever most settings are changed with PMBus commands. Some exceptions to this recommendation are OPERATION, ON_OFF_CONFIG, CLEAR_FAULTS, VOUT_COMMAND, VOUT_MARGIN_HIGH, VOUT_MARGIN_LOW, and ASCCR_CONFIG. While the device is enabled any command can be read. Many commands do not take effect until after the device has been reenabled, hence the recommendation that commands that change device settings are written while the device is disabled. When sending the STORE_DEFAULT_ALL, STORE_USER_ALL, RESTORE_DEFAULT_ALL, and RESTORE_USER_ALL commands, it is recommended that no other commands are sent to the device for 100ms after sending STORE or RESTORE commands. In addition, there should be a 2ms delay between repeated READ commands sent to the same device. When sending any other command, a 5ms delay is recommended between repeated commands sent to the same device. SUMMARY: All commands can be read at any time. Always disable the ZL8802 when writing commands that change device settings. Exceptions to this rule are commands intended to be written while the device is enabled, for example, VOUT_MARGIN_HIGH. To be sure a change to a device setting has taken effect, write the STORE_USER_ALL command, then cycle input power and reenable the device. FN8760 Rev.3.00 Nov 8, 2017 Page 25 of 91 ZL8802 PMBus Data Formats Linear-11 (L11) The L11 data format uses 5-bit two’s complement exponent (N) and 11-bit two’s complement mantissa (Y) to represent real world decimal value (X). Data Byte High 7 6 5 4 3 2 1 0 Exponent (N) Data Byte Low 7 6 5 4 3 2 1 0 Mantissa (Y) Relation between real world decimal value (X), N, and Y is: X = Y·2N Linear-16 Unsigned (L16u) The L16u data format uses a fixed exponent (hard-coded to N = -13h) and a 16-bit unsigned integer mantissa (Y) to represent real world decimal value (X). Relation between real world decimal value (X), N, and Y is: X = Y·2-13 Linear-16 Signed (L16s) The L16s data format uses a fixed exponent (hard-coded to N = -13h) and a 16-bit two’s complement mantissa (Y) to represent real world decimal value (X). The relation between real world decimal value (X), N, and Y is: X = Y·2-13 Bit Field (BIT) An explanation of Bit Field is provided in “PMBus Command Detail” starting on page 27. Custom (CUS) An explanation of the Custom data format is provided in “PMBus Command Detail”. A combination of Bit Field and integer are a common type of Custom data format. ASCII (ASC) A variable length string of text characters in the ASCII data format. FN8760 Rev.3.00 Nov 8, 2017 Page 26 of 91 ZL8802 PMBus Command Detail PAGE (00h) Definition: Selects Controller 0, Controller 1, or both Controllers 0 and 1 to receive commands. All commands following this command will be received and acted on by the selected controller or controllers. Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: No Default Value: 00h (Page 0) Units: N/A COMMAND PAGE (00h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function See Following Table Default Value 0 0 0 0 0 BITS 7:4 BITS 3:0 PAGE 0000 0000 0 0000 0001 1 1111 1111 Both FN8760 Rev.3.00 Nov 8, 2017 Page 27 of 91 ZL8802 OPERATION (01h) Definition: Sets Enable, Disable, and VOUT Margin settings. This command can also be monitored to read the operating state of the device on bits 7:6. Writing immediate off will turn off the output and ignore TOFF_DELAY and TOFF_FALL settings. This command is not stored like other PMBus commands. The value read reflects the current state of the device. When this command is written the command takes effect, but if a STORE _USER_ALL written and the device is reenabled, the OPERATION settings may not be the same settings that were written before the device was reenabled. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 00h (immediate off) Units: N/A COMMAND OPERATION (01h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function See Following Table Default Value 0 0 0 0 0 BITS 7:6 BITS 5:4 BITS 3:0 (NOT USED) UNIT ON OR OFF MARGIN STATE 00 00 0000 Immediate off (No sequencing) N/A 01 00 0000 Soft off (With sequencing) N/A 10 00 0000 On Nominal 10 01 0000 On Margin Low 10 10 0000 On Margin High NOTE: Bit combinations not listed above may cause command errors. FN8760 Rev.3.00 Nov 8, 2017 Page 28 of 91 ZL8802 ON_OFF_CONFIG (02h) Definition: Configures the interpretation and coordination of the OPERATION command and the ENABLE pin (EN). When bit 0 is set to 1 (turn off the output immediately), the TOFF_FALL setting is ignored. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 17h (ENABLE pin control, active high, turn off output immediately – no ramp down) Units: N/A COMMAND ON_OFF_CONFIG (02h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 1 1 1 Function See Following Table Default Value BIT NUMBER 0 0 PURPOSE 0 1 BIT VALUE 0 MEANING 7:5 Not Used 000 Not used 000 Not used 4:2 Sets the default to either operate any time power is present or for the on/off to be controlled by ENABLE pin or OPERATION command 101 Device starts from ENABLE pin only. 110 Device starts from OPERATION command only. 1 (Polarity of ENABLE pin - not used) 1 Active high only. 0 ENABLE pin action when commanding the unit to turn off 0 Use the configured ramp-down settings (“soft-off”). 1 Turn off the output immediately. CLEAR_FAULTS (03h) Definition: Clears all fault bits in all registers and releases the SALRT pin (if asserted) simultaneously. If a fault condition still exists, the bit will reassert immediately. This command will not restart a device if it has shut down, it will only clear the faults. Paged or Global: Global Data Length in Bytes: 0 Byte Data Format: N/A Type: Write Only Protectable: Yes Default Value: N/A Units: N/A STORE_DEFAULT_ALL (11h) Definition: Stores all current PMBus values from the operating memory into the nonvolatile DEFAULT store memory. To clear the DEFAULT store, perform a RESTORE_FACTORY then STORE_DEFAULT_ALL. To add to the DEFAULT store, perform a RESTORE_DEFAULT_ALL, write commands to be added, then STORE_DEFAULT_ALL. This command should not be used during device operation. The device will be unresponsive for 100ms while storing values. Paged or Global: Global Data Length in Bytes: 0 Data Format: N/A Type: Write Only Default Value: N/A Units: N/A FN8760 Rev.3.00 Nov 8, 2017 Page 29 of 91 ZL8802 RESTORE_DEFAULT_ALL (12h) Definition: Restores PMBus settings from the nonvolatile DEFAULT store memory into the operating memory. These settings are loaded during power-up if not superseded by settings in USER store. Security level is changed to level 1 following this command. This command should not be used during device operation. The device will be unresponsive for 100ms while storing values. Paged or Global: Global Data Length in Bytes: 0 Data Format: N/A Type: Write Only Default Value: N/A Units: N/A STORE_USER_ALL (15h) Definition: Stores all PMBus settings from the operating memory to the nonvolatile USER store memory. To clear the USER store, perform a RESTORE_FACTORY then STORE_USER_ALL. To add to the USER store, perform a RESTORE_USER_ALL, write commands to be added, then STORE_USER_ALL. This command should not be used during device operation. The device will be unresponsive for 100ms while storing values. Paged or Global: Global Data Length in Bytes: 0 Data Format: N/A Type: Write Only Default Value: N/A Units: N/A RESTORE_USER_ALL (16h) Definition: Restores all PMBus settings from the USER store memory to the operating memory. Command performed at power-up. Security level is changed to Level 1 following this command. This command should not be used during device operation. The device will be unresponsive for 100ms while restoring values. Paged or Global: Global Data Length in Bytes: 0 Data Format: N/A Type: Write Only Default Value: N/A Units: N/A VOUT_MODE (20H) Definition: Reports the VOUT mode and provides the exponent used in calculating several VOUT settings. Data Length in Bytes: 1 Data Format: BIT Type: Read Only Default Value: 13h (Linear Mode, Exponent = -13) Units: N/A COMMAND VOUT_MODE (20h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 1 1 Function See Following Table Default Value 0 MODE BITS 7:5 Linear 000 FN8760 Rev.3.00 Nov 8, 2017 0 0 1 0 BITS 4:0 (PARAMETER) 5-bit two’s complement exponent for the mantissa delivered as the data bytes for an output voltage related command. Page 30 of 91 ZL8802 VOUT_COMMAND (21h) Definition: Sets or reports the target output voltage. The integer value is multiplied by 2 raised to the power of -13h. This command cannot be set to be higher than 115% of the pin-strap VSET setting, or VOUT_MAX if VOUT_MAX is set higher than 115% of the pin-strap VSET setting. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear -16 Unsigned Type: R/W Protectable: Yes Default Value: VSET pin-strap setting Units: Volts Equation: VOUT = VOUT_COMMAND × 2-13 Range: 0 to VOUT_MAX Example: VOUT_COMMAND = 699Ah = 27,034 Target voltage equals 27034 × 2-13 = 3.3V COMMAND VOUT_COMMAND (21h) Format Linear-16 Unsigned Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default Value VSET Pin-strap Setting VOUT_TRIM (22h) Definition: Applies a fixed trim voltage to the output voltage command value. This command is typically used by the manufacturer of a power supply subassembly to calibrate a device in the subassembly circuit. The two bytes are formatted as a two’s complement binary mantissa, used in conjunction with the exponent of -13h. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear -16 Signed Type: R/W Protectable: Yes Default Value: 0000h Units: Volts Equation: VOUT trim = VOUT_TRIM×2-13 Range: ±150mV COMMAND VOUT_TRIM (22h) Format Linear-16 Signed Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default Value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FN8760 Rev.3.00 Nov 8, 2017 Page 31 of 91 ZL8802 VOUT_CAL_OFFSET (23h) Definition: Applies a fixed offset voltage to the output voltage command value. This command is typically used to calibrate a device in the application circuit. The two bytes are formatted as a two’s complement binary mantissa, used in conjunction with the exponent of -13h. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear -16 Signed Type: R/W Protectable: Yes Default Value: 0000h Units: Volts Equation: VOUT calibration offset = VOUT_CAL_OFFSET×2-13 Range: ±150mVV COMMAND VOUT_CAL_OFFSET (23h) Format Linear-16 Signed Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default Value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VOUT_MAX (24h) Definition: Sets an upper limit on the output voltage the unit can command regardless of any other commands or combinations. The intent of this command is to provide a safeguard against a user accidentally setting the output voltage to a possibly destructive level rather than to be the primary output overprotection. If a VOUT_COMMAND is sent with a value higher than VOUT_MAX, the device will set the output voltage to VOUT_MAX. Note that this command setting does not automatically scale with a stored VOUT_COMMAND setting. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear -16 Unsigned Type: R/W Protectable: Yes Default Value: 1.15 x VSET pin-strap setting Units: Volts Equation: VOUT max = VOUT_MAX × 2-13 Range: 0V to 5.5V COMMAND VOUT_MAX (24h) Format Linear-16 Unsigned Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default Value FN8760 Rev.3.00 Nov 8, 2017 1.15 x VSET Pin-strap Setting Page 32 of 91 ZL8802 VOUT_MARGIN_HIGH (25h) Definition: Sets the value of the VOUT during a margin high. This VOUT_MARGIN_HIGH command loads the unit with the voltage to which the output is to be changed when the OPERATION command is set to “Margin High”. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-16 Unsigned Type: R/W word Protectable: Yes Default Value: 1.05 x VSET pin-strap setting Units: V Equation: VOUT margin high = VOUT_MARGIN_HIGH x 2-13 Range: 0V to VOUT_MAX COMMAND VOUT_MARGIN_HIGH (25h) Format Linear-16 Unsigned Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default Value 1.05 x VSET Pin-strap Setting VOUT_MARGIN_LOW (26h) Definition: Sets the value of the VOUT during a margin low. This VOUT_MARGIN_LOW command loads the unit with the voltage to which the output is to be changed when the OPERATION command is set to “Margin Low”. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-16 Unsigned Type: R/W Protectable: Yes Default Value: 0.95 x VSET pin-strap setting Units: V Equation: VOUT margin low = VOUT_MARGIN_LOW Range: 0V to VOUT_MAX COMMAND VOUT_MARGIN_LOW (26h) Format Linear-16 Unsigned Bit Position 15 14 13 12 11 10 Access R/W R/W R/W R/W R/W R/W Default Value FN8760 Rev.3.00 Nov 8, 2017 9 8 7 6 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0.95 x VSET Pin-strap Setting Page 33 of 91 ZL8802 VOUT_TRANSITION_RATE (27h) Definition: Sets the rate at which the output should change voltage when the device receives an OPERATION command (Margin High, Margin Low) that causes the output voltage to change. The maximum possible positive value of the two data bytes indicates that the device should make the transition as quickly as possible. This commanded rate does not apply when the device is commanded to turn on or to turn off. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: BA00h (1.0V/ms) Units: V/ms Equation: VOUT_TRANSITION_RATE = Y×2N Range: 0.1 to 4V/ms COMMAND VOUT_TRANSITION_RATE (27h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Signed Exponent, N Default Value 1 0 1 Signed Mantissa, Y 1 1 0 1 0 0 0 0 0 VOUT_DROOP (28h) Definition: Sets the effective load line (V/I slope) for the rail in which the device is used. It is the rate, in mV/A, at which the output voltage decreases with increasing output current for use with passive current sharing schemes. For devices that are set to sink output current (negative output current), the output voltage continues to increase as the output current is negative. VOUT_DROOP is not needed with a single (2-phase) ZL8802. VOUT_DROOP is needed when multiple ZL8802s are operated in current sharing mode, that is, 4-, 6-, and 8-phase configurations. In this case, VOUT_DROOP is calculated based on the combined output current of all phases as applicable. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: Set by CFG pin-strap setting Units: mV/A Equation: VOUT_DROOP = Y×2N Range: 0 to 40mV/A COMMAND VOUT_DROOP (28h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Default Value FN8760 Rev.3.00 Nov 8, 2017 Signed Exponent, N Signed Mantissa, Y Set by CFG Pin-strap Setting Page 34 of 91 ZL8802 FREQUENCY_SWITCH (33h) Definition: Sets the switching frequency of the device. Initial default value is defined by a pin-strap and this value can be overridden by writing this command. If an external SYNC is utilized, this value should be set as close as possible to the external clock value. The output must be disabled when writing this command. Available frequencies are defined by the equation fSW = 16MHz/n where 12 ≤ n ≤ 80. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: SYNC pin-strap setting Units: kHz Equation: FREQUENCY_SWITCH = Y×2N Range: 200kHz-1.33MHz COMMAND FREQUENCY_SWITCH (33h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Signed Exponent, N Signed Mantissa, Y Default Value SYNC Pin-strapped Value INTERLEAVE (37h) Definition: Configures the phase offset of a device that is sharing a common SYNC clock with other devices. A desired phase position is specified. Interleave is used for setting the phase offset between individual devices, current sharing groups, and/or combinations of devices and current sharing groups. For devices within single current sharing group the phase offset is set automatically. In a multiphase current share group the same interleave settings must be stored in all devices in the current sharing group to phase spread properly. Interleave Offset refers to the phase offset of Phase 0 of the device; Phase 1 is always Phase 0 + 180 degrees. INTERLEAVE Phase offset is calculated with Equation 7: Phase Offset (in degrees) =  Rounded  Position  16  Number    22.5 (EQ. 7) Phase offsets greater than 360 degrees are “wrapped around” by subtracting 360 degrees. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: Set by CFG pin-strap setting. Units: N/A COMMAND INTERLEAVE (37h) Format Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function See Following Table Default Value Set by CFG Pin-strap Setting BITS PURPOSE VALUE 15:8 Not Used 0 7:4 Number In Group 0 to 15d Sets the number of devices in the interleave group. A value of 0 is interpreted as 16. 3:0 Position in Group (Interleave Order) 0 to 15d FN8760 Rev.3.00 Nov 8, 2017 DESCRIPTION Not used Sets position of the device’s rail within the group. A value of 0 is interpreted as 16. Position 1 will have a 22.5 degree offset. Page 35 of 91 ZL8802 IOUT_CAL_GAIN (38h) Definition: Sets the effective impedance across the current sense circuit for use in calculating output current at +25°C. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: B2AEh (0.67mΩ) Units: mΩ Equation: IOUT_CAL_GAIN = Y×2N COMMAND IOUT_CAL_GAIN (38h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 1 1 1 0 Function Default Value Signed Exponent, N 1 0 1 1 Signed Mantissa, Y 0 0 1 0 1 0 1 0 IOUT_CAL_OFFSET (39h) Definition: Used to null out any offsets in the output current sensing circuit, and to compensate for delayed measurements of current ramp due to the current sense blanking time (see “ISENSE_CONFIG (D0h)” on page 62). Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: BD00h (-1.5A) Units: A Equation: IOUT_CAL_OFFSET = Y×2N COMMAND IOUT_CAL_OFFSET (39h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value Signed Exponent, N 1 FN8760 Rev.3.00 Nov 8, 2017 0 1 1 Signed Mantissa, Y 1 1 0 1 0 0 0 0 Page 36 of 91 ZL8802 VOUT_OV_FAULT_LIMIT (40h) Definition: Sets the VOUT overvoltage fault threshold. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-16 Unsigned Type: R/W Protectable: Yes Default Value: 1.10 x VSET pin-strap setting Units: V Equation: VOUT OV fault limit = VOUT_OV_FAULT_LIMIT×2-13 Range: 0V to 7.99V COMMAND VOUT_OV_FAULT_LIMIT (40h) Format Linear-16 Unsigned Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default Value 1.10 x VSET Pin-strap Setting VOUT_OV_FAULT_RESPONSE (41h) Definition: Configures the VOUT overvoltage fault response. The retry time is the time between restart attempts. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 80h (shut down immediately, no retries) Units: Retry time = 35ms increments COMMAND VOUT_OV_FAULT_RESPONSE (41h) Format Bit Field Bit Position Access 7 6 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function See Following Table Default Value BIT 1 FIELD NAME Response behavior, the device: • Pulls SALRT low 7:6 • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 0 VALUE 00-01 0 0 0 DESCRIPTION Not used Disable and retry according to the setting in Bits [5:3]. 10-11 000 No retry. The output remains disabled until the device is restarted. 001-110 Not used 5:3 2:0 Retry Setting Retry Delay FN8760 Rev.3.00 Nov 8, 2017 111 Attempts to restart continuously, until it is commanded OFF (by the ENABLE pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. The time between the start of each attempt to restart is set by the value in Bits [2:0] multiplied by 35ms. 000-111 Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Page 37 of 91 ZL8802 VOUT_UV_FAULT_LIMIT (44h) Definition: Sets the VOUT undervoltage fault threshold. This fault is masked during ramp, before Power-Good is asserted or when the device is disabled. VOUT_UV_FAULT_LIMIT should be set to a value below POWER_GOOD. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-16 Unsigned Type: R/W Protectable: Yes Default Value: 0.85 x VSET pin-strap setting Units: V Equation: VOUT UV fault limit = VOUT_UV_FAULT_LIMIT×2-13 Range: 0V to 7.99V COMMAND VOUT_UV_FAULT_LIMIT (44h) Format Linear-16 Unsigned Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default Value 0.85 x VSET Pin-strap Setting VOUT_UV_FAULT_RESPONSE (45h) Definition: Configures the VOUT undervoltage fault response. Note that VOUT UV faults can only occur after Power-Good (PG) has been asserted. Under some circumstances this will cause the output to stay fixed below the Power-Good threshold indefinitely. If this behavior is undesired, use setting 80h. The retry time is the time between restart attempts. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 80h (shut down immediately, no retries) Units: Retry time unit = 35ms COMMAND VOUT_UV_FAULT_RESPONSE (45h) Format Bit Field Bit Position Access 7 6 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function See Following Table Default Value BIT 1 FIELD NAME Response Behavior: the device: • Pulls SALRT low 7:6 • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 0 0 VALUE 00-01 0 0 DESCRIPTION Not used Disable and Retry according to the setting in Bits [5:3]. 10-11 000 No retry. The output remains disabled until the fault is cleared. 001-110 Not used 5:3 Retry Setting 111 2:0 FN8760 Rev.3.00 Nov 8, 2017 Retry Delay 000-111 Attempts to restart continuously, until it is commanded OFF (by the ENABLE pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. The time between the start of each attempt to restart is set by the value in Bits [2:0] multiplied by 35ms. Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Page 38 of 91 ZL8802 IOUT_OC_FAULT_LIMIT (46h) Definition: Sets the IOUT peak overcurrent fault threshold. This limit is applied to current measurement samples taken after the Current Sense Blanking Time has expired (see “ISENSE_CONFIG (D0h)” on page 62)). A fault occurs after this limit is exceeded for the number of consecutive samples as defined in ISENSE_CONFIG. This feature shares the OC fault bit operation (in STATUS_IOUT) and OC fault response with IOUT_AVG_OC_FAULT_LIMIT. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: CFG pin-strap setting Units: A Equation: IOUT_OC_FAULT_LIMIT = Y×2N Range: -100A to 100A COMMAND IOUT_OC_FAULT_LIMIT (46h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Signed Exponent, N Signed Mantissa, Y Default Value CFG Pin-strap Setting IOUT_UC_FAULT_LIMIT (4Bh) Definition: Sets the IOUT valley undercurrent fault threshold. This limit is applied to current measurement samples taken after the Current Sense Blanking Time has expired. A fault occurs after this limit is exceeded for the number of consecutive sample as defined in ISENSE_CONFIG. This feature shares the UC fault bit operation (in STATUS_IOUT) and UC fault response with IOUT_AVG_UC_FAULT_LIMIT. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: -1 * IOUT_OC_FAULT_LIMIT from CFG pin-strap setting Units: A Equation: IOUT_OC_FAULT_LIMIT = Y×2N Range: -100A to 100A COMMAND IOUT_UC_FAULT_LIMIT (4Bh) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Default Value FN8760 Rev.3.00 Nov 8, 2017 Signed Exponent, N Signed Mantissa, Y -1 * IOUT_OC_FAULT_LIMIT from CFG Pin-strap Setting Page 39 of 91 ZL8802 OT_FAULT_LIMIT (4Fh) Definition: Sets the temperature at which the device should indicate an over-temperature fault. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: EBE8h (+125°C) Units: Celsius Equation: OT_FAULT_LIMIT = Y×2N Range: 0 to 175°C COMMAND OT_FAULT_LIMIT (4Fh) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 1 0 1 1 1 1 0 0 0 Function Signed Exponent, N Default Value 1 1 1 Signed Mantissa, Y 0 1 1 0 OT_FAULT_RESPONSE (50h) Definition: Instructs the device on what action to take in response to an over-temperature fault. The retry time is the time between restart attempts. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: BFh (Continuous retries, retry delay 280ms) Units: Retry time unit = 35ms COMMAND OT_FAULT_RESPONSE (50h) Format Bit Field Bit Position 7 6 5 Access R/W R/W R/W Function Default Value BIT 3 2 1 0 R/W R/W R/W R/W R/W 1 1 1 See Following Table 1 FIELD NAME Response behavior, the device: • Pulls SALRT low 7:6 4 • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 0 VALUE 00-01 1 1 1 DESCRIPTION Not used 10 Disable and Retry according to the setting in Bits [5:3]. 11 Output is disabled while the fault is present. Operation resumes and the output is enabled when the temperature falls below the OT_WARN_LIMIT. 000 No retry. The output remains disabled until the fault is cleared. 001-110 Not used 5:3 2:0 111 Attempts to restart continuously, until it is commanded OFF (by the ENABLE pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. A retry is attempted after the temperature falls below the OT_WARN_LIMIT. The time between the start of each attempt to restart is set by the value in Bits [2:0] multiplied by 35ms. 000-111 Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Retry Setting Retry Delay FN8760 Rev.3.00 Nov 8, 2017 Page 40 of 91 ZL8802 OT_WARN_LIMIT (51h) Definition: Sets the temperature at which the device should indicate an over-temperature warning alarm. In response to the OT_WARN_LIMIT being exceeded, the device sets the TEMPERATURE bit in STATUS_WORD, sets the OT_WARNING bit in STATUS_TEMPERATURE, and notifies the host. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: EB70h (+110°C) Units: Celsius Equation: OT_WARN_LIMIT = Y×2N Range: 0 to 175°C COMMAND OT_WARN_LIMIT (51h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value Signed Exponent, N 1 1 1 0 Signed Mantissa, Y 1 0 1 1 0 1 1 1 UT_WARN_LIMIT (52h) Definition: Sets the temperature at which the device should indicate an under-temperature warning alarm. In response to the UT_WARN_LIMIT being exceeded, the device sets the TEMPERATURE bit in STATUS_WORD, sets the UT_WARNING bit in STATUS_TEMPERATURE, and notifies the host. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: DC40h (-30°C) Units: Celsius Equation: UT_WARN_LIMIT = Y×2N Range: -55°C to +25°C COMMAND UT_WARN_LIMIT (52h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value FN8760 Rev.3.00 Nov 8, 2017 Signed Exponent, N 1 1 0 1 Signed Mantissa, Y 1 1 0 0 0 1 0 0 Page 41 of 91 ZL8802 UT_FAULT_LIMIT (53h) Definition: Sets the temperature, in degrees Celsius, of the unit at which it should indicate an under-temperature fault. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: E530h (-45°C) Units: Celsius Equation: UT_FAULT_LIMIT = Y×2N Range: -55°C to +25°C COMMAND UT_FAULT_LIMIT (53h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 1 0 1 0 0 0 0 0 Function Signed Exponent, N Default Value 1 1 1 Signed Mantissa, Y 0 0 1 1 UT_FAULT_RESPONSE (54h) Definition: Configures the under-temperature fault response as defined by the table below. The retry time is the time between restart attempts. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: BFh (Continuous retries, 280ms retry delay) Units: Retry time unit = 35ms COMMAND UT_FAULT_RESPONSE (54h) Format Bit Field Bit Position 7 6 5 Access R/W R/W R/W Function Default Value BIT 4 3 2 1 0 R/W R/W R/W R/W R/W 1 1 1 See Following Table 1 FIELD NAME Response behavior, the device: • Pulls SALRT low 7:6 • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 0 VALUE 00-01 1 1 1 DESCRIPTION Not used 10 Disable and Retry according to the setting in Bits [5:3]. 11 Output is disabled while the fault is present. Operation resumes and the output is enabled when the temperature rises above the UT_WARN_LIMIT. 000 No retry. The output remains disabled until the device is restarted. 001-110 Not used 5:3 2:0 Retry Setting Retry Delay FN8760 Rev.3.00 Nov 8, 2017 111 Attempts to restart continuously, until it is commanded OFF (by the ENABLE pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. A retry is attempted after the temperature rises above UT_WARN_LIMIT. The time between the start of each attempt to restart is set by the value in Bits [2:0] multiplied by 35ms. 000-111 Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Page 42 of 91 ZL8802 VIN_OV_FAULT_LIMIT (55h) Definition: Sets the VIN overvoltage fault threshold. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: D380h (14V) Units: V Equation: VIN_OV_FAULT_LIMIT = Y×2N Range: 0 to 19V COMMAND VIN_OV_FAULT_LIMIT (55h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 1 1 0 1 1 1 0 0 0 0 0 Function Signed Exponent, N Default Value 1 0 Signed Mantissa, Y 0 0 0 VIN_OV_FAULT_RESPONSE (56h) Definition: Configures the VIN overvoltage fault response as defined by the table below. Paged or Global: Global Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 80h (Disable, no retry) Units: N/A COMMAND VIN_OV_FAULT_RESPONSE (56h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function Default Value BIT See Following Table 1 FIELD NAME Response behavior, the device: • Pulls SALRT low 7:6 • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 0 VALUE 00-01 0 0 0 DESCRIPTION Not used 10 Disable and Retry according to the setting in bits [5:3]. 11 Output is disabled while the fault is present. Operation resumes and the output is enabled when VIN falls below the VIN_OV_WARN_LIMIT. 000 No retry. The output remains disabled until the fault is cleared. 001-110 Not used 5:3 2:0 111 Attempts to restart continuously, until it is commanded OFF (by the ENABLE pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. A retry is attempted after the output falls below the VIN_OV_WARN_LIMIT. The time between the start of each attempt to restart is set by the value in bits [2:0] multiplied by 35ms. 000-111 Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Retry Setting Retry Delay FN8760 Rev.3.00 Nov 8, 2017 Page 43 of 91 ZL8802 VIN_OV_WARN_LIMIT (57h) Definition: Sets the VIN overvoltage warning threshold as defined by the table below. In response to the OV_WARN_LIMIT being exceeded, the device sets the NONE OF THE ABOVE and INPUT bits in STATUS_WORD, sets the VIN_OV_WARNING bit in STATUS_INPUT, and notifies the host. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: D360h (13.5V) Units: V Equation: VIN_OV_FAULT_LIMIT = Y×2N Range: 0 to 19V COMMAND VIN_OV_WARN_LIMIT (57h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value Signed Exponent, N 1 1 0 1 Signed Mantissa, Y 0 0 1 1 0 1 1 0 VIN_UV_WARN_LIMIT (58h) Definition: Sets the VIN undervoltage warning threshold. If a VIN_UV_FAULT occurs, the input voltage must rise above VIN_UV_WARN_LIMIT to clear the fault, which provides hysteresis to the fault threshold. In response to the UV_WARN_LIMIT being exceeded, the device sets the NONE OF THE ABOVE and INPUT bits in STATUS_WORD, sets the VIN_UV_WARNING bit in STATUS_INPUT, and notifies the host. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: 1.10 x UVLO pin-strap setting Units: V Equation: VIN_UV_WARN_LIMIT = Y×2N Range: 0 to 19V COMMAND VIN_UV_WARN_LIMIT (58h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Default Value FN8760 Rev.3.00 Nov 8, 2017 Signed Exponent, N Signed Mantissa, Y 1.10 x UVLO Pin-strap Setting Page 44 of 91 ZL8802 VIN_UV_FAULT_LIMIT (59h) Definition: Sets the VIN undervoltage fault threshold. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: UVLO pin-strap setting Units: V Equation: VIN_UV_FAULT_LIMIT = Y×2N Range: 0 to 19V COMMAND VIN_UV_FAULT_LIMIT (59h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Signed Exponent, N Signed Mantissa, Y Default Value UVLO pin-strapped value VIN_UV_FAULT_RESPONSE (5Ah) Definition: Configures the VIN undervoltage fault response as defined by the table below. The retry time is the time between restart attempts. Paged or Global: Global Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: BFh (continuous retries, 280ms retry delay) Units: Retry time unit = 35ms COMMAND VIN_UV_FAULT_RESPONSE (5Ah) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function Default Value BIT See Following Table 1 FIELD NAME Response behavior, the device: • Pulls SALRT low 7:6 • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 0 VALUE 00-01 0 0 0 DESCRIPTION Not used 10 Disable and retry according to the setting in Bits [5:3]. 11 Output is disabled while the fault is present. Operation resumes and the output is enabled when VIN rises above the VIN_UV_WARN_LIMIT. 000 No retry. The output remains disabled until the fault is cleared. 001-110 Not used 5:3 2:0 Retry Setting Retry Delay FN8760 Rev.3.00 Nov 8, 2017 111 Attempts to restart continuously, until it is commanded OFF (by the ENABLE pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. A retry is attempted after the input voltage rises above the VIN_UV_WARN_LIMIT. The time between the start of each attempt to restart is set by the value in Bits [2:0] multiplied by 35ms. 000-111 Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Page 45 of 91 ZL8802 POWER_GOOD_ON (5Eh) Definition: Sets the voltage threshold for Power-Good indication. Power-good asserts when the output voltage exceeds POWER_GOOD_ON and deasserts when the output voltage is less than VOUT_UV_FAULT_LIMIT. POWER_GOOD_ON should be set to a value above VOUT_UV_FAULT_LIMIT. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-16 Unsigned Type: R/W Protectable: Yes Default Value: 0.9 x VSET pin-strap setting. Units: V COMMAND POWER_GOOD_ON (5Eh) Format Linear-16 Unsigned Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default Value 0.9 x VSET Pin-strap Setting TON_DELAY (60h) Definition: Sets the delay time from when the device is enabled to the start of VOUT rise. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: CA80h (5ms) Units: ms Equation: TON_DELAY = Y×2N Range: 0 to 5 seconds COMMAND TON_DELAY (60h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value FN8760 Rev.3.00 Nov 8, 2017 Signed Exponent, N 1 1 0 0 Signed Mantissa, Y 1 0 1 0 1 0 0 0 Page 46 of 91 ZL8802 TON_RISE (61h) Definition: Sets the rise time of VOUT after ENABLE and TON_DELAY for single and dual channel operation. To adjust the rise time in 4-, 6- or 8-phase operation, use MULTI_PHASE_RAMP_GAIN (D5h). Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: CA80h (5ms) Units: ms Equation: TON_RISE = Y×2N Range: 0 to 100ms. Although values can be set below 0.50ms, rise time accuracy cannot be guaranteed. In addition, short rise times may cause excessive input and output currents to flow, thus triggering overcurrent faults at start-up. COMMAND TON_RISE (61h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Default Value Signed Exponent, N 1 1 0 0 Signed Mantissa, Y 1 0 1 0 1 0 0 0 0 0 0 0 TOFF_DELAY (64h) Definition: Sets the delay time from DISABLE to start of VOUT fall. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: CA80h (5ms) Units: ms Equation: TON_DELAY = Y×2N Range: 0 to 5 seconds COMMAND TOFF_DELAY (64h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value FN8760 Rev.3.00 Nov 8, 2017 Signed Exponent, N 1 1 0 0 Signed Mantissa, Y 1 0 1 0 1 0 0 0 Page 47 of 91 ZL8802 TOFF_FALL (65h) Definition: Sets the fall time for VOUT after DISABLE and TOFF_DELAY. This setting is only valid in single or 2-phase operation. Setting the TOFF_FALL to values less than 0.5ms will cause the ZL8802 to turn-off both the high and low-side FETs (or disable the DrMOS device) immediately after the expiration of the TOFF_DELAY time. In 4-, 6- or 8-phase operation, the ZL8802 will always turn-off both the high and low-side FETs (or disable the DrMOS device) immediately after the expiration of the TOFF_DELAY time. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: CA80h (5ms) Units: ms Equation: TOFF_FALL = Y×2N Range: 0 to 100ms. Values less than 0.5ms will cause the ZL8802 to tri-state the PWM signal (turn-off both the high and low-side FETs) immediately after the expiration of the TOFF_DELAY time. COMMAND TOFF_FALL (65h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value FN8760 Rev.3.00 Nov 8, 2017 Signed Exponent, N 1 1 0 0 Signed Mantissa, Y 1 0 1 0 1 0 0 0 Page 48 of 91 ZL8802 STATUS_BYTE (78h) Definition: Returns two bytes of information with a summary of the unit’s fault condition. Based on the information in these bytes, the host can get more information by reading the appropriate status registers. The low byte of the STATUS_WORD is the same register as the STATUS_BYTE (78h) command. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Bit Field Type: Read Only Protectable: No Default Value: 00h Units: N/A COMMAND STATUS_BYTE (78h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 0 0 Function Default Value BIT NUMBER STATUS BIT NAME 7 BUSY 6 OFF See Following Table 0 0 0 A fault was declared because the device was busy and unable to respond. This bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. VOUT_OV_FAULT An output overvoltage fault has occurred. 4 IOUT_OC_FAULT An output overcurrent fault has occurred. 3 VIN_UV_FAULT An input undervoltage fault has occurred. 2 TEMPERATURE A temperature fault or warning has occurred. CML 0 None of the above FN8760 Rev.3.00 Nov 8, 2017 0 MEANING 5 1 0 A communications, memory, or logic fault has occurred. A fault other than the faults listed in Bits 7:1 above has occurred. The source of the fault will be in bits 15:8 of the STATUS_WORD Page 49 of 91 ZL8802 STATUS_WORD (79h) Definition: Returns two bytes of information with a summary of the unit’s fault condition. Based on the information in these bytes, the host can get more information by reading the appropriate status registers. The low byte of the STATUS_WORD is the same register as the STATUS_BYTE (78h) command. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Bit Field Type: Read Only Protectable: No Default Value: 0000h Units: N/A COMMAND STATUS_WORD (79h) Format Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R 0 0 0 0 0 0 0 Function See Following Table Default Value 0 0 0 0 0 0 0 0 0 BIT NUMBER STATUS BIT NAME 15 VOUT An output voltage fault or warning has occurred. An output current fault has occurred. 14 IOUT 13 INPUT 12 MFG_SPECIFIC 11 POWER_GOOD # 10 NOT USED MEANING An input voltage fault or warning has occurred. A manufacturer specific fault or warning has occurred. The POWER_GOOD signal, if present, is negated. (Note 15) Not used A bit in STATUS_VOUT, STATUS_IOUT, STATUS_INPUT, STATUS_TEMPERATURE, STATUS_CML, or STATUS_MFR_SPECIFIC is set. 9 OTHER 8 Not Used 7 BUSY A fault was declared because the device was busy and unable to respond. 6 OFF This bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. 5 VOUT_OV_FAULT An output overvoltage fault has occurred. 4 IOUT_OC_FAULT An output overcurrent fault has occurred. 3 VIN_UV_FAULT An input undervoltage fault has occurred. 2 TEMPERATURE 1 CML 0 None of the above Not used A temperature fault or warning has occurred. A communications, memory, or logic fault has occurred. A fault other than the faults listed in Bits 7:1 above has occurred. The source of the fault will be in Bits 15:8 of the STATUS_WORD NOTE: 15. If the POWER_GOOD# bit is set, this indicates that the POWER_GOOD signal, if present, is signaling that the output power is not good. FN8760 Rev.3.00 Nov 8, 2017 Page 50 of 91 ZL8802 STATUS_VOUT (7Ah) Definition: Returns one data byte with the status of the output voltage. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: Read Only Protectable: No Default Value: 00h Units: N/A COMMAND STATUS_VOUT (7Ah) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 0 0 Function Default Value See Following Table 0 0 0 0 0 BIT NUMBER STATUS BIT NAME MEANING 7 VOUT_OV_FAULT 6 VOUT_OV_WARNING Not used 5 VOUT_UV_WARNING Not used 4 VOUT_UV_FAULT 3:0 Not Used Indicates an output overvoltage fault. Indicates an output undervoltage fault. Not used STATUS_IOUT (7Bh) Definition: Returns one data byte with the status of the output current. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: Read Only Protectable: No Default Value: 00h Units: N/A COMMAND STATUS_IOUT (7Bh) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 0 0 Function Default Value See Following Table 0 0 0 BIT NUMBER STATUS BIT NAME 7 IOUT_OC_FAULT 6 Not Used Not used 5 Not Used Not used 4 IOUT_UC_FAULT 3:0 Not Used FN8760 Rev.3.00 Nov 8, 2017 0 0 MEANING An output overcurrent fault has occurred. An output undercurrent fault has occurred. Not used Page 51 of 91 ZL8802 STATUS_INPUT (7Ch) Definition: Returns input voltage and input current status information. Paged or Global: Global Data Length in Bytes: 1 Data Format: Bit Field Type: Read-only Protectable: No Default Value: 00h Units: N/A COMMAND STATUS_INPUT (7Ch) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 0 0 Function See Following Table Default Value 0 0 0 0 0 BIT NUMBER STATUS BIT NAME MEANING 7 VIN_OV_FAULT 6 VIN_OV_WARNING An input overvoltage warning has occurred. 5 VIN_UV_WARNING An input undervoltage warning has occurred. 4 VIN_UV_FAULT 3:0 Not Used An input overvoltage fault has occurred. An input undervoltage fault has occurred. Not used STATUS_TEMPERATURE (7Dh) Definition: Returns one byte of information with a summary of any temperature related faults or warnings. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: Read-only Protectable: No Default Value: 00h Units: N/A COMMAND STATUS_TEMP (7Dh) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 0 0 Function Default Value See Following Table 0 0 0 0 0 BIT NUMBER STATUS BIT NAME 7 OT_FAULT 6 OT_WARNING An over-temperature warning has occurred. 5 UT_WARNING An under-temperature warning has occurred. 4 UT_FAULT An under-temperature fault has occurred. 3:0 Not Used Not used FN8760 Rev.3.00 Nov 8, 2017 MEANING An over-temperature fault has occurred. Page 52 of 91 ZL8802 STATUS_CML (7Eh) Definition: Returns one byte of information with a summary of any communications, logic, and/or memory errors. Paged or Global: Global Data Length in Bytes: 1 Data Format: Bit Field Type: Read Only Protectable: No Default Value: 00h Units: N/A COMMAND STATUS_CML (7Eh) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 0 0 Function See Following Table Default Value 0 0 0 BIT NUMBER 0 MEANING 7 Invalid or unsupported PMBus command was received. 6 The PMBus command was sent with invalid or unsupported data. 5 A packet error was detected in the PMBus command. 4:2 0 Not used 1 A PMBus command tried to write to a read-only or protected command, or a communication fault other than the ones listed in this table has occurred. 0 Not used FN8760 Rev.3.00 Nov 8, 2017 Page 53 of 91 ZL8802 STATUS_MFR_SPECIFIC (80h) Definition: Returns one byte of information providing the status of the device’s voltage monitoring and clock synchronization faults. Paged or Global: Global Data Length in Bytes: 1 Data Format: Bit Field Type: Read Only Protectable: No Default Value: 00h Units: N/A COMMAND STATUS_MFR_SPECIFIC (80h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 0 0 Function See Following Table Default Value 0 0 0 0 0 BIT FIELD NAME MEANING 7 Not Used 6 DDC Warning 5 VMON UV Warning The voltage on the VMON pin has dropped 10% below the level set by MFR_VMON_UV_FAULT. 4 VMON OV Warning The voltage on the VMON pin has risen 10% above the level set by MFR_VMON_OV_FAULT. 3 External Switching Period Fault 2 Not Used 1 VMON UV Fault The voltage on the VMON pin has dropped below the level set by MFR_VMON_UV_FAULT. 0 VMON OV Fault The voltage on the VMON pin has risen above the level set by MFR_VMON_OV_FAULT. Not used An error was detected on the DDC bus. Loss of external clock synchronization has occurred. Not used READ_VIN (88h) Definition: Returns the input voltage reading. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: Read Only Protectable: No Default Value: N/A Units: V Equation: READ_VIN = Y×2N Range: N/A COMMAND READ_VIN (88h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R N/A N/A N/A N/A Function Default Value Signed Exponent, N N/A FN8760 Rev.3.00 Nov 8, 2017 N/A N/A N/A Signed Mantissa, Y N/A N/A N/A N/A N/A N/A N/A N/A Page 54 of 91 ZL8802 READ_IIN (89h) Definition: Returns the input current reading. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: Read Only Protectable: No Default Value: N/A Units: A Equation: READ_IIN = Y×2N Range: N/A COMMAND READ_IIN (89h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R N/A N/A Function Default Value Signed Exponent, N N/A N/A N/A Signed Mantissa, Y N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A READ_VOUT (8Bh) Definition: Returns the output voltage reading. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-16 Unsigned Type: Read Only Protectable: No Default Value: N/A Equation: READ_VOUT = READ_VOUT × 2-13 Units: V COMMAND READ_VOUT (8Bh) Format Linear-16 Unsigned Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R Default Value N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A FN8760 Rev.3.00 Nov 8, 2017 Page 55 of 91 ZL8802 READ_IOUT (8Ch) Definition: Returns the output current reading. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: Read Only Protectable: No Default Value: N/A Units: A Equation: READ_IOUT = Y×2N Range: N/A COMMAND READ_IOUT (8Ch) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R Function Default Value Signed Exponent, N N/A N/A N/A N/A Signed Mantissa, Y N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A READ_TEMPERATURE_1 (8Dh) Definition: Returns the temperature reading internal to the device. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: Read Only Protectable: No Default Value: N/A Units: °C Equation: READ_TEMPERATURE_1 = Y×2N Range: N/A COMMAND READ_TEMPERATURE_1 (8Dh) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R N/A N/A N/A N/A Function Default Value Signed Exponent, N N/A FN8760 Rev.3.00 Nov 8, 2017 N/A N/A N/A Signed Mantissa, Y N/A N/A N/A N/A N/A N/A N/A N/A Page 56 of 91 ZL8802 READ_TEMPERATURE_2 (8Eh) Definition: Returns the temperature reading from the external temperature device connected to XTEMP. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: Read Only Protectable: No Default Value: N/A Units: °C Equation: READ_TEMPERATURE_2 = Y×2N Range: N/A COMMAND READ_TEMPERATURE_2 (8Eh) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R N/A N/A N/A N/A Function Default Value Signed Exponent, N N/A N/A N/A N/A Signed Mantissa, Y N/A N/A N/A N/A N/A N/A N/A N/A READ_TEMPERATURE_3 (8Fh) Definition: Returns the temperature reading from the VMON/TMON pin when the device is configured to read temperature on the VMON/TMON pin by setting bit 12 in the USER_GLOBAL_CONFIG command to 1. The voltage on the VMON/TMON pin is converted to °C by the equation TEMPERTATURE 3 = (VMON voltage - 0.6V)/0.008. See MFR_VMON commands starting on page 85 (F5h, F6h, F8h, F9H) for fault limits when reading temperature on the VMON/TMON pin. When using the Intersil ISL9922X smart power stage, a 2:1 voltage divider is needed between the TMON pin of the ISL9922X and the VMON/TMON pin of the ZL8802. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: Read Only Protectable: No Default Value: N/A Units: °C Equation: READ_TEMPERATURE_3 = Y×2N Range: N/A COMMAND READ_TEMPERATURE_3 (8Fh) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R N/A N/A N/A N/A Function Default Value Signed Exponent, N N/A FN8760 Rev.3.00 Nov 8, 2017 N/A N/A N/A Signed Mantissa, Y N/A N/A N/A N/A N/A N/A N/A N/A Page 57 of 91 ZL8802 READ_DUTY_CYCLE (94h) Definition: Reports the actual duty cycle of the converter during the enable state. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: Read Only Protectable: No Default Value: N/A Units: % Equation: READ_DUTY_CYCLE = Y×2N Range: 0 to 100% COMMAND READ_DUTY_CYCLE (94h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R Function Default Value Signed Exponent, N N/A N/A N/A N/A Signed Mantissa, Y N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A READ_FREQUENCY (95h) Definition: Reports the actual switching frequency of the converter during the enable state. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: Read Only Default Value: N/A Units: kHz Equation: READ_FREQUENCY = Y×2N Range: N/A COMMAND READ_FREQUENCY (95h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R N/A N/A N/A N/A Function Default Value Signed Exponent, N N/A FN8760 Rev.3.00 Nov 8, 2017 N/A N/A N/A Signed Mantissa, Y N/A N/A N/A N/A N/A N/A N/A N/A Page 58 of 91 ZL8802 PMBUS_REVISION (98h) Definition: Returns the revision of the PMBus specification to which the device is compliant. Data Length in Bytes: 1 Data Format: Bit Field Type: Read Only Protectable: N/A Default Value: 22h (Part 1 Revision 1.2, Part 2 Revision 1.2) Units: N/A COMMAND PMBUS_REVISION (98h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R R R R R R R R 0 1 0 Function Default Value BITS 7:4 See Following Table 0 0 1 0 0 PART 1 REVISION BITS 3:0 PART 2 REVISION 0000 1.0 0000 1.0 0001 1.1 0001 1.1 0010 1.2 0010 1.2 MFR_ID (99h) Definition: Sets a user defined identification string not to exceed 32bytes. The sum total of characters in MFR_ID, MFR_MODEL, MFR_REVISION, MFR_LOCATION, MFR_DATE, MFR_SERIAL, and USER_DATA_00 plus one byte per command cannot exceed 128bytes. This limitation includes multiple writes of this command before a STORE command. To clear multiple writes, perform a RESTORE, write this command then perform a STORE/RESTORE. Paged or Global: Global Data Length in Bytes: User defined Data Format: ASCII, ISO/IEC 8859-1 Type: Block R/W Protectable: Yes Default Value: Null Units: N/A MFR_MODEL (9Ah) Definition: Sets a user defined model string not to exceed 32bytes. The sum total of characters in MFR_ID, MFR_MODEL, MFR_REVISION, MFR_LOCATION, MFR_DATE, MFR_SERIAL, and USER_DATA_00 plus one byte per command cannot exceed 128bytes. This limitation includes multiple writes of this command before a STORE command. To clear multiple writes, perform a RESTORE, write this command then perform a STORE/RESTORE. Paged or Global: Global Data Length in Bytes: User defined Data Format: ASCII, ISO/IEC 8859-1 Type: Block R/W Protectable: Yes Default Value: Null Units: N/A FN8760 Rev.3.00 Nov 8, 2017 Page 59 of 91 ZL8802 MFR_REVISION (9Bh) Definition: Sets a user defined revision string not to exceed 32bytes. The sum total of characters in MFR_ID, MFR_MODEL, MFR_REVISION, MFR_LOCATION, MFR_DATE, MFR_SERIAL, and USER_DATA_00 plus one byte per command cannot exceed 128bytes. This limitation includes multiple writes of this command before a STORE command. To clear multiple writes, perform a RESTORE, write this command then perform a STORE/RESTORE. Paged or Global: Global Data Length in Bytes: User defined Data Format: ASCII. ISO/IEC 8859-1 Type: Block R/W Protectable: Yes Default Value: Null Units: N/A MFR_LOCATION (9Ch) Definition: Sets a user defined location identifier string not to exceed 32bytes. The sum total of characters in MFR_ID, MFR_MODEL, MFR_REVISION, MFR_LOCATION, MFR_DATE, MFR_SERIAL, and USER_DATA_00 plus one byte per command cannot exceed 128bytes. This limitation includes multiple writes of this command before a STORE command. To clear multiple writes, perform a RESTORE, write this command then perform a STORE/RESTORE. Paged or Global: Global Data Length in Bytes: User defined Data Format: ASCII. ISO/IEC 8859-1 Type: Block R/W Protectable: Yes Default Value: Null Units: N/A MFR_DATE (9Dh) Definition: Sets a user defined date string not to exceed 32bytes. The sum total of characters in MFR_ID, MFR_MODEL, MFR_REVISION, MFR_LOCATION, MFR_DATE, MFR_SERIAL, and USER_DATA_00 plus one byte per command cannot exceed 128bytes. This limitation includes multiple writes of this command before a STORE command. To clear multiple writes, perform a RESTORE, write this command then perform a STORE/RESTORE. Paged or Global: Global Data Length in Bytes: User defined Data Format: ASCII. ISO/IEC 8859-1 Type: Block R/W Protectable: Yes Default Value: Null Units: N/A MFR_SERIAL (9Eh) Definition: Sets a user defined serialized identifier string not to exceed 32bytes. The sum total of characters in MFR_ID, MFR_MODEL, MFR_REVISION, MFR_LOCATION, MFR_DATE, MFR_SERIAL, and USER_DATA_00 plus one byte per command cannot exceed 128bytes. This limitation includes multiple writes of this command before a STORE command. To clear multiple writes, perform a RESTORE, write this command then perform a STORE/RESTORE. Paged or Global: Global Data Length in Bytes: User defined Data Format: ASCII. ISO/IEC 8859-1 Type: Block R/W Protectable: Yes Default Value: Null Units: N/A FN8760 Rev.3.00 Nov 8, 2017 Page 60 of 91 ZL8802 IC_DEVICE_ID (ADh) Definition: Reports device identification information. Data Length in Bytes: 4 Data Format: CUS Type: Block Read Protectable: No Default Value: 49A02D00h (ZL8802) Units: N/A COMMAND IC_DEVICE_ID (ADh) Format Block Read Byte Position 3 2 1 0 Function MFR code ID High Byte ID Low Byte Reserved Default Value 49h A0h 2Ah 00h IC_DEVICE_REV (AEh) Definition: Reports device revision information. Data Length in Bytes: 4 Data Format: CUS Type: Block Read Protectable: No Default Value: 01000000h (initial release) Units: N/A COMMAND IC_DEVICE_REV (AEh) Format Block Read Byte Position 3 2 1 0 Function Firmware Major Firmware Minor Factory Configuration Reserved Default Value 01h 00h 00h 00h USER_DATA_00 (B0h) Definition: Sets a user defined data string not to exceed 32bytes. The sum total of characters in MFR_ID, MFR_MODEL, MFR_REVISION, MFR_LOCATION, MFR_DATE, MFR_SERIAL, and USER_DATA_00 plus one byte per command cannot exceed 128bytes. This limitation includes multiple writes of this command before a STORE command. To clear multiple writes, perform a RESTORE, write this command then perform a STORE/RESTORE. Paged or Global: Global Data Length in Bytes: User defined Data Format: ASCII. ISO/IEC 8859-1 Type: Block R/W Protectable: Yes Default Value: Null Units: N/A FN8760 Rev.3.00 Nov 8, 2017 Page 61 of 91 ZL8802 MIN_VOUT_REG (CEh) Definition: Sets the minimum output voltage in millivolts (mV) that the device will attempt to regulate to during start-up and shutdown ramps. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: 0000h (0mV) Units: A Equation: MIN_VOUT_REG = Y x 2N COMMAND MIN_VOUT_REG (CEh) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Default Value Signed Exponent, N 1 1 1 1 Signed Mantissa, Y 0 0 1 0 0 1 0 1 1 0 0 0 ISENSE_CONFIG (D0h) Definition: Configures current sense circuitry. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Bit Field Type: R/W word Protectable: Yes Default Value: 620Eh (384ns blanking, SPS sensing, high range) Units: N/A Range: N/A COMMAND ISENSE_CONFIG (D0h) Format Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 1 1 1 0 Function Default Value See Following Table 0 FN8760 Rev.3.00 Nov 8, 2017 1 1 0 0 0 1 0 0 Page 62 of 91 ZL8802 BIT 15:11 10:8 7:4 3:2 1:0 FIELD NAME Current Sense Blanking Time Current Sense Fault Count Not Used Current Sense Control Current Sense Range FN8760 Rev.3.00 Nov 8, 2017 VALUE SETTING 00000 0 00001 32 00010 64 00011 96 00100 128 00101 160 00110 192 00111 224 01000 256 01001 288 01010 320 01011 352 01100 384 01101 416 01110 448 01111 480 10000 512 10001 544 10010 576 10011 608 10100 640 10101 672 10110 704 10111 736 11000 768 11001 800 11010 832 000 1 001 3 010 5 011 7 100 9 101 11 110 13 111 15 0000 Not Used 00 Not Used 01 DCR (Down Slope) 10 DCR (Up Slope) 11 SPS 00 Low Range 01 Medium Range 10 High Range 11 Not Used DESCRIPTION Sets the blanking time current sense blanking time in increments of 32ns Sets the number of consecutive overcurrent (OC) or undercurrent (UC) events required for a fault. An event can occur once during each switching cycle. For example, if 5 is selected, an OC or UC event must occur for 5 consecutive switching cycles, resulting in a delay of at least 5 switching periods. Not used Selection of current sensing method (SPS IMON) Low range ±25mV, medium range ±35mV, high range ±50mV Page 63 of 91 ZL8802 USER_CONFIG (D1h) Definition: Configures several user-level features. This command should be saved immediately after being written to the desired user or default store. This is recommended when written as an individual command or as part of a series of commands in a configuration file or script. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: Set by CFG pin-strap setting Units: N/A COMMAND USER_CONFIG (D1h) Format Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function See Following Table Default Value CFG Pin-strap Setting BIT FIELD NAME 15:11 Minimum Duty Cycle VALUE SETTING 00000 0-31d DESCRIPTION Sets the minimum duty-cycle to 2X(VALUE+1)/512. Must be enabled with Bit 7 10 Not Used 1 Not Used Not used 9:8 Not Used 00 Not Used Not used 7 Minimum Duty Cycle Control 0 Disable 1 Enable 6 Not Used 0 Not Used 5 VSET Select 0 VSET0 0 = Uses only VSET0 to set the pin-strapped output voltage 1 VSET1 1 = Uses only VSET1 to set the pin-strapped output voltage 4 Not Used 0 Not Used 3 PWML disabled state 0 Low when disabled 1 High when disabled 2 Power-good Configuration 0 Open-Drain 1 Push-Pull 1 XTEMP Enable 0 Disable 1 Enable 0 XTEMP Fault Select 0 Disable 1 Enable FN8760 Rev.3.00 Nov 8, 2017 Control for minimum duty cycle Not used Not used PWML is low (off) when device is disabled (Bit 3 set to 0), or high (on) when device is disabled (Bit 3 set to 1) 0 = PG is open-drain output 1 = PG is push-pull output Enable external temperature sensor Selects external temperature sensor to determine temperature faults Page 64 of 91 ZL8802 IIN_CAL_GAIN (D2h) Definition: Sets the effective impedance across the current sense circuit for use in calculating input current at +25°C. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: C200h (2mΩ) Units: mΩ Equation: IIN_CAL_GAIN = Y×2N COMMAND IIN_CAL_GAIN (D2h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Signed Exponent, N Default Value 1 1 0 Signed Mantissa, Y 0 0 0 1 0 0 0 0 0 DDC_CONFIG (D3h) Definition: Configures DDC addressing and current sharing for up to 8 phases. To operate as a 2-phase controller, set both phases to the same rail ID, set phases in rail to 2, then set each phase ID sequentially as 0 and 1. To operate as a 4-phase controller, set all phases to the same rail ID, set phases in rail to 4, then set each phase ID alternately, for example, the first ZL8802 will be set to 0 and 2, the second ZL8802 will be set to 1 and 3. The ZL8802 will automatically equally offset the phases in the rail. Phase spreading is done automatically as part of the DDC_CONFIG command. When using CFG pin-strap settings, the DDC_CONFIG command is set automatically. NOTE: The output MUST be connected to VSEN0P and VSEN0N when operating as a 2-phase controller. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: PMBus address pin-strap dependent. Units: N/A COMMAND DDC_CONFIG (D3h) Format Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 Function See Following Table Default Value 0 0 0 Lower 5 bits of device address 0 BIT FIELD NAME VALUE SETTING 15:13 Phase ID 0 to 7 0 Sets the output's phase position within the rail 12:8 Rail ID 0 to 31d 0 Identifies the device as part of a current sharing rail (shared output) 7:3 Not Used 00 00 Not used 2:0 Phases In Rail 0 to 7 0 Identifies the number of phases on the same rail (+1) FN8760 Rev.3.00 Nov 8, 2017 DESCRIPTION Page 65 of 91 ZL8802 POWER_GOOD_DELAY (D4h) Definition: Sets the delay applied between the output exceeding the PG threshold (POWER_GOOD_ON) and asserting the PG pin. The delay time can range from 0ms up to 500ms, in steps of 125ns. A 1ms minimum configured value is recommended to apply proper debounce to this signal. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: BA00h, 1ms Units: ms Equation: POWER_GOOD_DELAY = Y×2N Range: 0 to 500ms COMMAND POWER_GOOD_DELAY (D4h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Signed Exponent, N Default Value 1 0 1 1 Signed Mantissa, Y 1 0 1 0 0 0 0 0 MULTI_PHASE_RAMP_GAIN (D5h) Definition: Indirectly determines the output voltage rise time during the turn-on ramp. Typical gain values range from 1 to 10. Lower gain values produce longer ramp times. MULTI_PHASE_RAMP_GAIN mode is automatically selected when the ZLS8802 is configured to operate in a 4-phase current sharing group. When in MULTI_PHASE_RAMP_GAIN mode, the turn-on ramp up is done with the high bandwidth ASCR control circuitry disabled, resulting in a lower loop bandwidth during start-up ramps. After POWER_GOOD has been asserted, ASCR circuitry is enabled and the ZLS8802 operates normally. When MULTI_PHASE_RAMP_GAIN mode is enabled, soft-off ramps are not allowed (TOFF_FALL is ignored). When the ZL8802 is commanded to shutdown, the PWMHO/1 output is tri-stated, turning both the high-side and low-side MOSFETs off, and the PWML0/1 pin is pulled low (DrMOS disabled). Large load current transitions during multiphase ramp-ups will cause output voltage discontinuities. When the phase count is 2; that is, when the ZL8802 is operating standalone, ASCR is enabled at all times and all commands associated with turn-on and turn-off (TON_RISE, TOFF_FALL, Soft-Off) operate normally. Rise time can be calculated using Equation 8: RiseTime = VOUT_COMMAND   14  Input Voltage  FREQUENCY_SWITCH (in MHz)  MULTI_PHASE_RAMP_GAIN  (EQ. 8) Paged or Global: Global Data Length in Bytes: 1 Data Format: Custom Type: R/W Protectable: Yes Default Value: 03h Units: N/A COMMAND MULTI_PHASE_RAMP_GAIN (D5h) Format 1 Byte Binary Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W Default Value 0 0 0 0 0 0 1 1 BIT FIELD NAME VALUE 7:0 Gain 00-FF FN8760 Rev.3.00 Nov 8, 2017 DESCRIPTION Start-up ramp gain Page 66 of 91 ZL8802 INDUCTOR (D6h) Definition: Informs the device of the circuit’s inductor value. This is used in adaptive algorithm calculations relating to the inductor ripple current. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: B133h (0.3µH) Units: µH Equation: INDUCTOR = Y×2N Range: 0 to 100µH COMMAND INDUCTOR (D6h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 1 0 0 0 1 1 Function Signed Exponent, N Default Value 1 0 1 Signed Mantissa, Y 1 0 1 1 SNAPSHOT_FAULT_MASK (D7h) Definition: Prevents faults from causing a SNAPSHOT event (and store) from occurring. Data Length in Bytes: 2 Data Format: BIT Type: R/W Protectable: Yes Default Value: 0000h Units: NA Range: NA COMMAND SNAPSHOT_FAULT_MASK (D7h) Format Bit Field Bit Position 15 14 13 12 11 10 9 Access R R R R R R R Function 8 7 6 5 4 3 2 1 0 R R R R R R R R R 0 0 0 0 0 0 0 See Following Table Default Value 0 0 0 0 0 0 BIT NUMBER STATUS BIT NAME 15:14 Not Used 0 0 0 MEANING Not used 13 Group Ignore Fault Spreading faults 12 Phase Ignore Other Phase faults 11 CPU Ignore CPU faults 10 CRC 9 Not Used Not used Ignore CRC Memory faults 8 Not Used Not used 7 IOUT_UC_FAULT 6 IOUT_OC_FAULT Ignore output overcurrent faults 5 VIN_UV_FAULT Ignore input undervoltage faults 4 VIN_OV_FAULT Ignore Input undervoltage faults Ignore output undercurrent faults 3 UT_FAULT Ignore under-temperature faults 2 OT_FAULT Ignore over-temperature faults 1 VOUT_UV_FAULT Ignore output undervoltage faults 0 VOUT_OV_FAULT Ignore output overvoltage faults FN8760 Rev.3.00 Nov 8, 2017 Page 67 of 91 ZL8802 OVUV_CONFIG (D8h) Definition: Configures the output voltage OV and UV fault detection feature Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 00h Units: N/A COMMAND OVUV_CONFIG (D8h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function See Following Table Default Value 0 BITS 0 0 0 PURPOSE 0 VALUE DESCRIPTION Controls how an OV fault response shutdown sets the output driver state 0 1 An OV fault enables the low-side power device 6:4 Not Used 0 Not used 3:0 Defines the number of consecutive limit violations required to declare an OV or UV fault N N+1 consecutive OV or UV violations initiate a fault response 7 An OV fault does not enable low-side power device XTEMP_SCALE (D9h) Definition: Sets a scalar value that is used for calibrating the external temperature. The constant is applied in the equation below to produce the read value of XTEMP through the PMBus command READ_TEMPERATURE_2. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: BA00h (1.0) Units: 1/°C  1 Equation: READ_TEMPERATURE_2   ExternalTemperature    XTEMP_OFFSET XTEMP_SCALE   Range: 0.1 to 10 COMMAND XTEMP_SCALE (D9h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value Signed Exponent, N 1 FN8760 Rev.3.00 Nov 8, 2017 0 1 1 Signed Mantissa, Y 1 0 1 0 0 0 0 0 Page 68 of 91 ZL8802 XTEMP_OFFSET (DAh) Definition: Sets an offset value that is used for calibrating the external temperature. The constant is applied in the equation below to produce the read value of XTEMP through the PMBus command READ_TEMPERATURE_2. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: 0000h (0) Units: °C  1 Equation: READ_TEMPERATURE_2  ExternalTemperature    XTEMP_OFFSET XTEMP_SCALE   Range: -100°C to +100°C COMMAND XTEMP_OFFSET (DAh) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 Function Default Value Signed Exponent, N 0 FN8760 Rev.3.00 Nov 8, 2017 0 0 0 Signed Mantissa, Y 0 0 0 0 0 0 0 0 Page 69 of 91 ZL8802 MFR_SMBALERT_MASK (DBh) Definition: Used to prevent faults from activating the SALRT pin. The bits in each byte correspond to a specific fault type as defined in the STATUS command. Data Length in Bytes: 7 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 00 00 00 00 00 00 00h (No faults masked) Units: N/A COMMAND MFR_SMBALT_MASK (DBh) Format Bit Field Access R/W R/W R/W Function R/W R/W R/W R/W R/W See following table Bit Position 55 54 53 52 51 50 49 48 Default Value Byte 6 0 0 0 0 0 0 0 0 Bit Position 47 46 45 44 43 42 41 40 Default Value Byte 5 0 0 0 0 0 0 0 0 Bit Position 39 38 37 36 35 34 33 32 Default Value Byte 4 0 0 0 0 0 0 0 0 Bit Position 31 30 29 28 27 26 25 24 Default Value Byte 3 0 0 0 0 0 0 0 0 Bit Position 23 22 21 20 19 18 17 16 Default Value Byte 2 0 0 0 0 0 0 0 0 Bit Position 15 14 13 12 11 10 9 8 Default Value Byte 1 0 0 0 0 0 0 0 0 Bit Position 7 6 5 4 3 2 1 0 Default Value Byte 0 0 0 0 0 0 0 0 0 BYTE STATUS BYTE NAME 6 STATUS_MFR_SPECIFIC 5 STATUS_OTHER 4 STATUS_CML 3 STATUS_TEMPERATURE 2 STATUS_INPUT 1 STATUS_IOUT Mask output current specific faults as identified in the STATUS_IOUT byte. 0 STATUS_VOUT Mask output voltage specific faults as identified in the STATUS_VOUT byte. FN8760 Rev.3.00 Nov 8, 2017 MEANING Mask manufacturer specific faults as identified in the STATUS_MFR_SPECIFIC byte. Not used Mask communications, memory, or logic specific faults as identified in the STATUS_CML byte. Mask temperature specific faults as identified in the STATUS_TEMPERATURE byte. Mask input specific faults as identified in the STATUS_INPUT byte. Page 70 of 91 ZL8802 TEMPCO_CONFIG (DCh) Definition: Configures the correction factor and temperature measurement source when performing temperature coefficient correction for current sense. TEMPCO_CONFIG values are applied as negative correction to a positive temperature coefficient. TEMPCO_CONFIG should be set to 3900ppm (27h) when using inductor DCR current sensing to compensate for the variation in inductor resistance due to the temperature coefficient of copper. When using the ISL9922X Smart Power Stage, TEMPCO_CONFIG should be set to 0ppm (00h) because the IMON signal from the ISL9922X is internally compensated for temperature. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 00h (0ppm/°C, copper) Equation: To determine the hex value of the Tempco Correction factor (TC) for current scale of a power stage current sensing, first determine the temperature coefficient of resistance for the sensing element, α. This is found with Equation 9: RREF  R  (EQ. 9) RREF (TREF  T ) Where: R = Sensing element resistance at temperature “T” RREF = Sensing element resistance at reference temperature TREF α = Temperature coefficient of resistance for the sensing element material T = Temperature measured by temperature sensor, in degrees Celsius TREF = Reference temperature that α is specified at for the sensing element material After α is determined, convert the value in units of 100ppm/°C. This value is then converted to a hex value with Equation 10: TC   106 (EQ. 10) 100 Range: 0 to 12700ppm/˚C COMMAND TEMPCO_CONFIG (DCh) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function See Following Table Default Value 0 0 BITS PURPOSE 7 Selects the temp sensor source for tempco correction 6:0 Sets the tempco correction in units of 100ppm/˚C for IOUT_CAL_GAIN FN8760 Rev.3.00 Nov 8, 2017 0 VALUE 0 0 DESCRIPTION 0 Selects the internal temperature sensor. 1 Selects the XTEMP pin for temperature measurements (2N3904 Junction). Note that XTEMP must be enabled in USER_CONFIG, Bit 1. TC RSEN (DCR) = IOUT_CAL_GAIN x (1+TC x (T-25)) where RSEN = resistance of sense element. Page 71 of 91 ZL8802 PINSTRAP_READ_STATUS (DDh) Definition: Reads back 7 bytes of 8-bit values that represent the pin-strap settings of each of the device’s pin-strap pins. This value corresponds to a resistor value, a high, a low, or an open condition. The pin decode values correspond to pin-strap settings according to Table 9: TABLE 9. PIN DECODE VALUES R (kΩ) DECODE R (kΩ) DECODE 10 00 51.1 11 11 01 56.2 12 12.1 02 61.9 13 13.3 03 68.1 14 14.7 04 75 15 16.2 05 82.5 16 17.8 06 90.9 17 19.6 07 100 18 21.5 08 110 19 23.7 09 121 1A 26.1 0A 133 1B 28.7 0B 147 1C 31.6 0C 162 1D 34.8 0D 178 1E 38.3 0E LOW F1 42.2 0F OPEN F2 46.4 10 HIGH F3 Unmeasured F4 Paged or Global: Global Data Length in Bytes: 7 Data Format: Bit Field Type: Read Only Protectable: Yes Default Value: Pin-strap settings Units: N/A COMMAND READ_PINSTRAP (DDh) Format Bit Field Bit Position 55 54 53 52 51 50 49 48 Access R R R R R R R R Function ASCRCFG Pin Decode Default Value ASCRCFG Pin-strap Setting Format Bit Field Bit Position 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 Access R R R R R R R R R R R R R R R R Function CFG Pin Decode SYNC Pin Decode Default Value CFG Pin-strap Setting SYNC Pin-strap Setting Format FN8760 Rev.3.00 Nov 8, 2017 Bit Field Page 72 of 91 ZL8802 COMMAND READ_PINSTRAP (DDh) (Continued) Bit Position 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Access R R R R R R R R R R R R R R R R Function UVLO Pin Decode VSET0 Pin Decode Default Value UVLO Pin-strap Setting VSET0 Pin-strap Setting Format Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R Function VSET1 Pin Decode Reserved Default Value VSET1 Pin-strap Setting N/A BITS PURPOSE VALUE 55:48 ASCRCFG Pin Decode 00-F4h Decode value of ASCRCFG pin-strap setting. 47:40 CFG Pin Decode 00-F4h Decode value of CFG pin-strap setting. 39:32 SYNC Pin Decode 00-F4h Decode value of SYNC pin-strap setting. 31:24 UVLO Pin Decode 00-F4h Decode value of UVLO pin-strap setting. 23:16 VSET0 Pin Decode 00-F4h Decode value of VSET0 pin-strap setting. 15:8 VSET1 Pin Decode 00-F4h Decode value of VSET1 pin-strap setting. 7:0 Not Used FF FN8760 Rev.3.00 Nov 8, 2017 DESCRIPTION Not used Page 73 of 91 ZL8802 ASCR_CONFIG (DFh) Definition: Allows user configuration of ASCR settings. ASCR gain and residual value are automatically set by the ZL8802 based on input voltage and output voltage. ASCR gain is analogous to bandwidth, ASCR residual is analogous to damping. To improve load transient response performance, increase ASCR gain. To lower transient response overshoot, increase ASCR residual. Increasing ASCR gain can result in increased PWM jitter and should be evaluated in the application circuit. Excessive ASCR gain can lead to excessive output voltage ripple. Increasing ASCR residual to improve transient response damping can result in slower recovery times, but will not affect the peak output voltage deviation. Typical ASCR gain settings range from 100 to 1000, and ASCR residual settings range from 10 to 90. Paged or Global: Paged Data Length in Bytes: 4 Data Format: Bit Field and nonsigned binary Type: R/W Protectable: Yes Default Value: ASCRCFG pin-strap setting Units: N/A COMMAND ASCR_CONFIG (DFh) Format Bit Field/Linear-8 Unsigned Bit Position 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Default Value See Following Table 0 0 0 0 0 0 0 1 Format ASCRCFG Pin-strap Setting (residual) Linear-16 Unsigned Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function See Following Table Default Value ASCRCFG Pin-strap Setting (gain) BITS PURPOSE VALUE 31:25 Not Used 0000000h 24 ASCR Enable 23:16 ASCR Residual Setting 0 - 7Fh ASCR residual 15:0 ASCR Gain Setting 0-FFh ASCR gain FN8760 Rev.3.00 Nov 8, 2017 DESCRIPTION Not used 1 Enable 0 Disable Page 74 of 91 ZL8802 SEQUENCE (E0h) Definition: Identifies the Rail DDC ID of the prequel and sequel rails when performing multirail sequencing. The device will enable its output when its EN or OPERATION enable state, as defined by ON_OFF_CONFIG, is set and the prequel device has issued a Power-Good event on the DDC bus as a result of the prequel’s Power-good (PG) signal going high. The device will disable its output (using the programmed delay values) when the sequel device has issued a power-down event on the DDC bus at the completion of its ramp-down (its output voltage is 0V). The data field is a two-byte value. The most-significant byte contains the 5-bit Rail DDC ID of the prequel device. The least-significant byte contains the 5-bit Rail DDC ID of the sequel device. The most significant bit of each byte contains the enable of the prequel or sequel mode. This command overrides the corresponding sequence configuration set by the CONFIG pin settings. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 00h (prequel and sequel disabled) Units: N/A COMMAND SEQUENCE (E0h) Format Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 Function See Following Table Default Value 0 BIT FIELD NAME 15 Prequel Enable 14:13 0 0 0 0 0 0 0 0 VALUE SETTING 0 Disable Disable, no prequel preceding this rail. 1 Enable Enable, prequel to this rail is defined by Bits 12:8. Not Used 0 Not Used 12:8 Prequel Rail DDC ID 0-31d DDC ID Set to the DDC ID of the prequel rail. 7 Sequel Enable 0 Disable Disable, no sequel following this rail. 1 Enable Enable, sequel to this rail is defined by Bits 4:0. 6:5 Not Used 0 Not Used 4:0 Sequel Rail DDC ID 0-31d DDC ID FN8760 Rev.3.00 Nov 8, 2017 DESCRIPTION Not used Not used Set to the DDC ID of the sequel rail. Page 75 of 91 ZL8802 TRACK_CONFIG (E1h) Definition: Configures the voltage tracking modes of the device. Single device (Channel 0, Channel 1 or 2-phase) tracking is supported. Tracking as part of a 4-, 6- or 8-phase current sharing group is not supported. When tracking, the TOFF_DELAY in the tracking device must be greater than TOFF_DELAY + TOFF_FALL in the device being tracked. When configured to track, VOUT_COMMAND must be set to the desired steady state output voltage. Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 00h Units: N/A COMMAND TRACK_CONFIG (E1h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function Default Value BIT FIELD NAME 7 Voltage Tracking Control 6:3 Not Used 2 Tracking Ratio Control 1 Tracking Upper Limit 0 Not Used FN8760 Rev.3.00 Nov 8, 2017 See Following Table 0 0 0 0 0 VALUE SETTING DESCRIPTION 0 Disable Tracking is disabled. 1 Enable Tracking is enabled. 0000 Not Used 0 100% Output Tracks at 100% ratio of VTRK input. 1 50% Output Tracks at 50% ratio of VTRK input. 0 Target Voltage Output Voltage is Limited by Target Voltage. 1 VTRK Voltage Output Voltage is Limited by VTRK Voltage. 0 Not Used Not used Not used Page 76 of 91 ZL8802 DDC_GROUP (E2h) Definition: Rails (output voltages) are assigned Group numbers to share specified behaviors. The DDC_GROUP command configures fault spreading group ID and enable, broadcast OPERATION group ID and enable, and broadcast VOUT_COMMAND group ID and enable. Note that DDC Groups are separate and unique from DDC Rail IDs (see “DDC_CONFIG (D3h)” on page 65). Current sharing rails need to be in the same DDC Group to respond to broadcast VOUT_COMMAND and OPERATION commands. Power fail event responses (and phases) are automatically spread in Phase 0 and 1 when the ZL8802 is operating in 2-phase current sharing mode when it is configured using DDC_CONFIG, regardless of its setting in DDC_GROUP. Paged or Global: Paged Data Length in Bytes: 34 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: Set by CFG pin-strap setting Units: N/A COMMAND DDC_GROUP (E2h) Format Bit Field Bit Position 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Not Used EN> Default Value Set by CFG Pin-strap Setting Format Bit Field VOUT_COMMAND Group ID Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Not Used EN> OPERATION Group ID Default Value Not Used EN> Power Fail Group ID Set by CFG Pin-strap Setting BITS PURPOSE VALUE 31:22 Not Used 00 Not used 21 BROADCAST_VOUT_COMMAND response 1 Responds to broadcast VOUT_COMMAND with same Group ID. 0 Ignores broadcast VOUT_COMMAND. 20:16 BROADCAST_VOUT_COMMAND group ID 0-31d 15:14 Not Used 00 Not used 13 BROADCAST_OPERATION response 1 Responds to broadcast OPERATION with same Group ID. 0 Ignores broadcast OPERATION. 12:8 BROADCAST_OPERATION group ID 0-31d 7:6 Not Used 00 Not used 5 POWER_FAIL response 1 Responds to POWER_FAIL events with same Group ID by shutting down immediately. 0 Responds to POWER_FAIL events with same Group ID with sequenced shutdown. 4:0 POWER_FAIL group ID FN8760 Rev.3.00 Nov 8, 2017 0-31d DESCRIPTION Group ID sent as data for broadcast VOUT_COMMAND events. Group ID sent as data for broadcast OPERATION events. Group ID sent as data for broadcast POWER_FAIL events. Page 77 of 91 ZL8802 DEVICE_ID (E4h) Definition: Returns the 16-byte (character) device identifier string. The format is: Part number, Major Revision, (period), Minor Revision, Engineering version letter Paged or Global: Global Data Length in Bytes: 16 Data Format: ASCII. ISO/IEC 8859-1 Type: Block Read Protectable: Read Only Default Value: ZL8802, current major revision, (period), current minor revision, current engineering version letter Units: N/A COMMAND DEVICE_ID (E4h) Format Characters (Bytes) Characters 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R R R R R R R R R R R R R R R R Z L 8 8 Function Part Number Default Value 0 0 Maj. Rev. . Min. Rev * * * * Engr. * * * Current revision at time of manufacture MFR_IOUT_OC_FAULT_RESPONSE (E5h) Definition: Configures the IOUT overcurrent fault response as defined by the table below. The command format is the same as the PMBus standard fault responses except that it sets the overcurrent status bit in STATUS_IOUT. The retry time is the time between restart attempts. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 80h (immediate shutdown, no retries) Units: Retry time unit = 35ms COMMAND MFR_IOUT_OC_FAULT_RESPONSE (E5h) Format Bit Field Bit Position 7 6 5 Access R/W R/W R/W Function 4 3 2 1 0 R/W R/W R/W R/W R/W 0 0 0 See Following Table Default Value 1 0 0 0 0 BIT FIELD NAME VALUE 00 Not used 01 Not used 7:6 Response behavior, for all modes, the device: • Pulls SALRT low • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. DESCRIPTION 10 Disable without delay and retry according to the setting in bits 5:3. 11 Output is disabled while the fault is present. Operation resumes and the output is enabled when the fault is no longer present. 000 No retry. The output remains disabled until the fault is cleared. 001-110 Not used 5:3 Retry Setting 2:0 FN8760 Rev.3.00 Nov 8, 2017 Retry Delay 111 Attempts to restart continuously, without checking if the fault is still present, until it is commanded OFF (by the CONTROL pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. The time between the start of each attempt to restart is set by the value in bits [2:0] multiplied by 35ms. 000-111 Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Page 78 of 91 ZL8802 MFR_IOUT_UC_FAULT_RESPONSE (E6h) Definition: Configures the IOUT undercurrent fault response as defined by the table below. The command format is the same as the PMBus standard fault responses except that it sets the undercurrent status bit in STATUS_IOUT. The retry time is the time between restart attempts. Data Length in Bytes: 1 Paged or Global: Paged Data Format: Bit Field Type: R/W Protectable: Yes Default Value: 80h (Immediate shutdown, no retries) Units: Retry time unit = 35ms COMMAND MFR_IOUT_UC_FAULT_RESPONSE (E6h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 Function See Following Table Default Value 1 0 0 0 0 BIT FIELD NAME VALUE DESCRIPTION 7:6 Response behavior, for all modes, the device: • Pulls SALRT low • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 00 Not used 01 Not used 10 Disable without delay and retry according to the setting in bits 5:3. 11 Output is disabled while the fault is present. Operation resumes and the output is enabled when the fault is no longer present. 000 No retry. The output remains disabled until the fault is cleared. 001-110 Not used 5:3 Retry Setting 111 2:0 FN8760 Rev.3.00 Nov 8, 2017 Retry Delay 000-111 Attempts to restart continuously, without checking if the fault is still present, until it is commanded OFF (by the CONTROL pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. The time between the start of each attempt to restart is set by the value in bits [2:0] multiplied by 35ms. Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Page 79 of 91 ZL8802 IOUT_AVG_OC_FAULT_LIMIT (E7h) Definition: Sets the IOUT average overcurrent fault threshold. For down-slope sensing, this corresponds to the average of all the current samples taken during the (1-D) time interval, excluding the current sense blanking time (which occurs at the beginning of the 1-D interval). For up-slope sensing, this corresponds to the average of all the current samples taken during the D time interval, excluding the current sense blanking time (which occurs at the beginning of the D interval). This feature shares the OC fault bit operation (in STATUS_IOUT) and OC fault response with IOUT_ OC_FAULT_LIMIT. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: CFG pin-strap setting Units: Amperes Equation: IOUT_AVG_OC_FAULT_LIMIT = Y×2N Range: -100A to 100A COMMAND IOUT_AVG_OC_FAULT_LIMIT (E7h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Signed Exponent, N Signed Mantissa, Y Default Value CFG Pin-strap Setting IOUT_AVG_UC_FAULT_LIMIT (E8h) Definition: Sets the IOUT average undercurrent fault threshold. For down-slope sensing, this corresponds to the average of all the current samples taken during the (1-D) time interval, excluding the current sense blanking time (which occurs at the beginning of the 1-D interval). For up-slope sensing, this corresponds to the average of all the current samples taken during the D time interval, excluding the current sense blanking time (which occurs at the beginning of the D interval). This feature shares the UC fault bit operation (in STATUS_IOUT) and UC fault response with IOUT_ UC_FAULT_LIMIT. Paged or Global: Paged Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: -1 X IOUT_AVG_OC_FAULT_LIMIT as set by CFG pin-strap setting Units: Amperes Equation: IOUT_AVG_UC_FAULT_LIMIT = Y×2N Range: -100A to 100A COMMAND IOUT_AVG_UC_FAULT_LIMIT (E8h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function Default Value FN8760 Rev.3.00 Nov 8, 2017 Signed Exponent, N Signed Mantissa, Y -1 X IOUT_AVG_OC_FAULT_LIMIT as set by CFG Pin-strap Setting Page 80 of 91 ZL8802 USER_GLOBAL_CONFIG (E9h) Definition: Used to set options for output voltage sensing, VMON/TMON pin configuration, SMBus time-out, and DDC and SYNC output configurations. Paged or Global: Global Data Length in Bytes: 2 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: Set by CFG pin-strap setting Units: N/A COMMAND USER_GLOBAL_CONFIG (E9h) Format Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Function See Following Table Default Value Set by CFG Pin-strap Setting BITS PURPOSE VALUE 15:13 Not Used 000000 12 VMON/TMON Config 0 MFR_READ_VMON returns voltage on VMON pin in Volts. External 16:1 voltage divider needed on VMON/TMON pin (pin 6) to voltage being monitored. 1 READ_TEMPERATURE_3 returns TMON in °C. External 2:1 voltage divider needed on VMON/TMON pin (pin 6) to SPS TMON pin. 11:10 Not Used 9:8 VSENSE Select for monitoring and fault detection 7 Not Used 6 DDC output Configuration 5 Not Used 4 Disable SMBus Time-Outs 3 Not Used 2:1 0 FN8760 Rev.3.00 Nov 8, 2017 Sync I/O Control Not Used DESCRIPTION Not used 00 Not used 00 Output 0 uses VSEN0, Output 1 uses VSEN1 01 Both outputs use VSEN0 10-11 Not used 0 Not used 0 DDC output open-drain 1 DDC output push-pull 0 Not used 0 SMBus time-outs enabled 1 SMBus time-outs disabled 0 Not used 00 Use internal clock (frequency initially set with pin-strap) 01 Use internal clock and output internal clock (not for use with pin-strap) 10 Use external clock 11 Not used 0 Not used Page 81 of 91 ZL8802 SNAPSHOT (EAh) Definition: A 32-byte read-back of parametric and status values. It allows monitoring and status data to be stored to flash either during a fault condition or through a system-defined time using the SNAPSHOT_CONTROL command. Snapshot is continuously updated in RAM and can be read using the SNAPSHOT command. When a fault occurs, the latest snapshot in RAM is stored to flash. Snapshot data can read back by writing a 01h to the SNAPSHOT_CONTROL command, then reading SNAPSHOT. Paged or Global: Paged Data Length in Bytes: 32 Data Format: Bit Field Type: Block Read Protectable: No Default Value: N/A Units: N/A BYTE NUMBER VALUE PMBus COMMAND FORMAT 31:23 Not Used Not Used 0000h 22 Flash Memory Status Byte N/A Bit Field 21 Manufacturer Specific Status Byte STATUS_MFR_SPECIFIC (80h) 1 Byte Bit Field 20 CML Status Byte STATUS_CML (7Eh) 1 Byte Bit Field 19 Temperature Status Byte STATUS_TEMPERATURE (7Dh) 1 Byte Bit Field 18 Input Status Byte STATUS_INPUT (7Ch) 1 Byte Bit Field 17 IOUT Status Byte STATUS_IOUT (7Bh) 1 Byte Bit Field 16 VOUT Status Byte STATUS_VOUT (7Ah) 1 Byte Bit Field 15:14 Switching Frequency READ_FREQUENCY (95h) 2 Byte Linear-11 13:12 External Temperature READ_TEMPERATURE_2 (8Eh) 2 Byte Linear-11 11:10 Internal Temperature READ_TEMPERATURE_1 (8Dh) 2 Byte Linear-11 9:8 Duty Cycle READ_DUTY_CYCLE (94h) 2 Byte Linear-11 7:6 Highest Measured Output Current N/A 2 Byte Linear-11 5:4 Output Current READ_IOUT (8Ch) 2 Byte Linear-11 3:2 Output Voltage READ_VOUT (8Bh) 2 Byte Linear-16 Unsigned 1:0 Input Voltage READ_VIN (88h) 2 Byte Linear-11 FN8760 Rev.3.00 Nov 8, 2017 Page 82 of 91 ZL8802 LEGACY_FAULT_GROUP (F0h) Definition: Allows the ZL8802 to sequence and fault spread with devices other than the ZL8800 family of ICs. This command sets which rail DDC IDs should be listened to for fault spreading information. The data sent is a 4-byte, 32-bit bit vector where every bit represents a rail’s DDC ID. A bit set to 1 indicates a device DDC ID to which the configured device will respond upon receiving a fault spreading event. In this vector, bit 0 of byte 0 corresponds to the rail with DDC ID 0. Following through, Bit 7 of byte 3 corresponds to the rail with DDC ID 31. NOTE: The device/rail’s own DDC ID should not be set within the LEGACY_FAULT_GROUP command for that device/rail. All devices in a current share rail (devices other than the ZL8800 family ICs) must shut down for the rail to report a shutdown. If fault spread mode is enabled in USER_CONFIG, the device will immediately shut down if on of its DDC_GROUP members fail. The device/rail will attempt its configured restart only after all devices/rails within the DDC_GROUP have cleared their faults. If fault spread mode is disabled in USER_CONFIG, the device will perform a sequenced shutdown as defined by the SEQUENCE command setting. The rails/devices in a sequencing set only attempt their configured restart after all faults have cleared within the DDC_GROUP. If fault spread mode is disabled and sequencing is also disabled, the device will ignore faults from other devices and stay enabled. Paged or Global: Paged Data Length in Bytes: 4 Data Format: Bit field Type: Block R/W Protectable: Yes Default Value: 00000000h Units: N/A COMMAND LEGACY_FAULT_GROUP (F0h) Format Bit Field Bit Position 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 Function See Following Table Default Value 0 0 0 0 0 0 0 Format 0 0 Bit Field Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 Function See Following Table Default Value 0 0 0 0 0 0 BIT FIELD NAME VALUE SETTING 31:0 Fault Group NA 00000000h FN8760 Rev.3.00 Nov 8, 2017 0 0 0 DESCRIPTION Identifies the devices in the fault spreading group. Page 83 of 91 ZL8802 SNAPSHOT_CONTROL (F3h) Definition: Writing a 01h will cause the device to copy the current SNAPSHOT values from NVRAM to the 32-byte SNAPSHOT command parameter. Writing a 02h will cause the device to write the current SNAPSHOT values to NVRAM, 03h will erase all SNAPSHOT values from NVRAM. Write (02h) and Erase (03h) can only be used when the device is disabled. All other values will be ignored. SNAPSHOT 03h must be written to the device when the device is DISABLED. Data will not be updated, or written to NVRAM after a fault occurs until the SNAPSHOT 03h command has been written. Paged or Global: Paged Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Byte Protectable: Yes Default Value: 00h Units: N/A COMMAND SNAPSHOT_CONTROL (F3h) Format Bit Field Bit Position 7 6 5 Access R/W R/W R/W Function Default Value 4 3 2 1 0 R/W R/W R/W R/W R/W 0 0 0 See Following Table 0 0 0 VALUE 0 0 DESCRIPTION 01 Read SNAPSHOT values from NVRAM 02 Write SNAPSHOT values to NVRAM 03 Erase SNAPSHOT values from NVRAM RESTORE_FACTORY (F4h) Definition: Restores the device to the hard-coded factory default values and pin-strap definitions. The device retains the DEFAULT and USER stores for restoring. Security level is changed to Level 1 following this command. Paged or Global: Global Data Length in Bytes: 0 Data Format: N/A Type: Write Only Protectable: Yes Default Value: N/A Units: N/A FN8760 Rev.3.00 Nov 8, 2017 Page 84 of 91 ZL8802 MFR_VMON_OV_FAULT_LIMIT (F5h) Definition: Sets the VMON over-temperature fault threshold. The VMON overvoltage warn limit is automatically set to 90% of this fault value. If VMON is not used, set VMON_OV_FAULT_RESPONSE to 00h, which will disable VMON OV faults entirely. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: C266h (2.4V) Units: Volts Equation: MFR_VMON_OV_FAULT_LIMIT = Y×2N Range: 0 to 20V COMMAND MFR_VMON_OV_FAULT_LIMIT (F5h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 1 1 0 Function Default Value Signed Exponent, N 1 1 1 0 Signed Mantissa, Y 0 0 1 0 0 1 1 0 MFR_VMON_UV_FAULT_LIMIT (F6h) Definition: Sets the VMON undervoltage fault threshold. The VMON undervoltage warn limit is automatically set to 110% of this fault value. If VMON is not used, set VMON_UV_FAULT_RESPONSE to 00h, which will disable VMON UV faults entirely. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: Yes Default Value: B0CCh (0.2V) Units: Volts Equation: MFR_VMON_UV_FAULT_LIMIT = Y x 2N Range: 0 to 20V COMMAND MFR_VMON_UV_FAULT_LIMIT (F6h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 1 1 0 0 Function Default Value Signed Exponent, N 1 FN8760 Rev.3.00 Nov 8, 2017 0 1 1 Signed Mantissa, Y 0 0 0 0 1 1 0 0 Page 85 of 91 ZL8802 MFR_READ_VMON (F7h) Definition: Reads the voltage on the VMON pin. Paged or Global: Global Data Length in Bytes: 2 Data Format: Linear-11 Type: R/W Protectable: No Default Value: N/A Units: °C Equation: MFR_READ_VMON = Y x 2N Range: -200°C to +200°C COMMAND MFR_READ_VMON (F7h) Format Linear-11 Bit Position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A Function Signed Exponent, N Default Value N/A Signed Mantissa, Y N/A N/A N/A VMON_OV_FAULT_RESPONSE (F8h) Definition: Configures the VMON overvoltage fault response as defined by the table below. Note: The retry time is the time between restart attempts. If VMON is not used, set this response to 00h, which will disable VMON OV faults entirely. Paged or Global: Global Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: BFh (continuous retries) Units: N/A COMMAND VMON_OV_FAULT_RESPONSE (F8h) Format Bit Field Bit Position 7 6 5 4 3 2 1 0 Access R/W R/W R/W R/W R/W R/W R/W R/W 1 1 1 Function Default Value BIT See Following Table 1 FIELD NAME Response behavior, the device: • Pulls SALRT low 7:6 • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 0 1 VALUE 1 1 DESCRIPTION 00 Ignore faults 01 Not used 10 Disable without delay and retry according to the setting in bits 5:3. 11 Output is disabled while the fault is present. Operation resumes and the output is enabled when VMON falls below 95% of the VMON_OV_FAULT_LIMIT setting. 000 No retry. The output remains disabled until the fault is cleared. 001-110 Not used 5:3 2:0 111 Attempts to restart continuously, without checking if the fault is still present, until it is commanded OFF (by the CONTROL pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. A retry is attempted after VMON falls below 95% of the VMON_OV_FAULT_LIMIT. The time between the start of each attempt to restart is set by the value in bits [2:0] multiplied by 35ms. 000-111 Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Retry Setting Retry Delay FN8760 Rev.3.00 Nov 8, 2017 Page 86 of 91 ZL8802 VMON_UV_FAULT_RESPONSE (F9h) Definition: Configures the VMON undervoltage fault response as defined by the table below. Note: The retry time is the time between restart attempts. If VMON is not used, set this response to 00h, which will disable VMON UV faults entirely. Paged or Global: Global Data Length in Bytes: 1 Data Format: Bit Field Type: R/W Protectable: Yes Default Value: BFh (continuous retries) Units: Retry time unit = 35ms COMMAND VMON_UV_FAULT_RESPONSE (F9h) Format Bit Field Bit Position 7 6 5 Access R/W R/W R/W Function 7:6 3 2 1 0 R/W R/W R/W R/W R/W 1 1 1 See Following Table Default Value BIT 4 1 FIELD NAME Response behavior, the device: • Pulls SALRT low • Sets the related fault bit in the status registers. Fault bits are only cleared by the CLEAR_FAULTS command. 0 1 VALUE 1 1 DESCRIPTION 00 Fault ignored 01 Not used 10 Disable without delay and retry according to the setting in bits 5:3. 11 Output is disabled while the fault is present. Operation resumes and the output is enabled when VMON rises above 105% of the VMON_UV_FAULT_LIMIT setting. 000 No retry. The output remains disabled until the fault is cleared. 001-110 Not used 5:3 111 Attempts to restart continuously, without checking if the fault is still present, until it is commanded OFF (by the CONTROL pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. A retry is attempted after VMON has risen above 105% of VMON_UV_FAULT_LIMIT. The time between the start of each attempt to restart is set by the value in bits [2:0] multiplied by 35ms. 000-111 Retry delay time = (Value +1)*35ms. Sets the time between retries in 35ms increments. Range is 35ms to 280ms. Retry Setting 2:0 Retry Delay SECURITY_LEVEL (FAh) Definition: The device provides write protection for individual commands. Each bit in the UNPROTECT parameter controls whether its corresponding command is writable (commands are always readable). If a command is not writable, a password must be entered to change its parameter (that is, to enable writes to that command). Passwords can be either public or private. The public password provides a simple lock-and-key protection against accidental changes to the device. It would typically be sent to the device in the application before making changes. Private passwords allow commands marked as nonwritable in the UNPROTECT parameter to be changed. Private passwords are intended for protecting default-installed configurations and would not typically be used in the application. Each store (USER and DEFAULT) can have its own UNPROTECT string and private password. If a command is marked as nonwritable in the DEFAULT UNPROTECT parameter (its corresponding bit is cleared), the private password in the DEFAULT store must be sent to change that command. If a command is writable according to the default UNPROTECT parameter, it may still be marked as nonwritable in the user store UNPROTECT parameter. In this case, the user private password can be sent to make the command writable. The device supports four levels of security. Each level is designed to be used by a particular class of users, ranging from module manufacturers to end users, as discussed below. Levels 0 and 1 correspond to the public password. All other levels require a private password. Writing a private password can only raise the security level. Writing a public password will reset the level down to 0 or 1. Figure 12 on page 88 shows the algorithm used by the device to determine if a particular command write is allowed. Paged or Global: Global Data Length in Bytes: 1 Data Format: Hex Type: Read Byte Protectable: No Default Value: 01h Units: N/A FN8760 Rev.3.00 Nov 8, 2017 Page 87 of 91 ZL8802 Write Attempted Always Writeable ? Y N Read Only ? Y N Security Level == 3 ? Y N Default UNPROTECT == 0 ? Y N Security Level == 2 ? Y N User UNPROTECT == 0 ? Y N Write Prohibited N Security Level == 1 ? Y Write Allowed FIGURE 12. ALGORITHM TO DETERMINE WHEN A COMMAND IS WRITABLE Security Level 3 – Module Vendor Level 3 is intended primarily for use by module vendors to protect device configurations in the default store. Clearing a UNPROTECT bit in the default store implies that a command is writable only at Level 3 and above. The device’s security level is raised to Level 3 by writing the private password value previously stored in the default store. To be effective, the module vendor must clear the UNPROTECT bit corresponding to the STORE_DEFAULT_ALL and RESTORE_DEFAULT commands. Otherwise, Level 3 protection is ineffective because the entire store could be replaced by the user, including the enclosed private password. FN8760 Rev.3.00 Nov 8, 2017 Page 88 of 91 ZL8802 Security Level 2 – User Level 2 is intended for use by the end user of the device. Clearing a UNPROTECT bit in the user store implies that a command is writable only at Level 2 and above. The device’s security level is raised to Level 2 by writing the private password value previously stored in the User Store. To be effective, the user must clear the UNPROTECT bit corresponding to the STORE_USER_ALL, RESTORE_DEFAULT_ALL, STORE_DEFAULT_ALL, and RESTORE_DEFAULT commands. Otherwise, Level 2 protection is ineffective because the entire store could be replaced, including the enclosed private password. Security Level 1 – Public Level 1 is intended to protect against accidental changes to ordinary commands by providing a global write-enable. It can be used to protect the device from erroneous bus operations. It provides access to commands whose UNPROTECT bit is set in both the default and User Store. Security is raised to Level 1 by writing the public password stored in the user store using the PUBLIC_PASSWORD command. The public password stored in the default store has no effect. Security Level 0 - Unprotected Level 0 implies that only commands which are always writable (e.g., PUBLIC_PASSWORD) are available. This represents the lowest authority level and hence the most protected state of the device. The level can be reduced to 0 by using PUBLIC_PASSWORD to write any value which does not match the stored public password. PRIVATE_PASSWORD (FBh) Definition: Sets the private password string. Paged or Global: Global Data Length in Bytes: 9 Data Format: ASCII. ISO/IEC 8859-1 Type: Block R/W Protectable: No Default Value: 000000000000000000h Units: N/A PUBLIC_PASSWORD (FCh) Definition: Sets the public password string. Paged or Global: Global Data Length in Bytes: 4 Data Format: ASCII. ISO/IEC 8859-1 Type: Block R/W Protectable: No Default Value: 00000000h Units: N/A UNPROTECT (FDh) Definition: Sets a 256-bit (32-byte) parameter which identifies which commands are to be protected against write-access at lower security levels. Each bit in this parameter corresponds to a command according to the command’s code. The command with a code of 00h (PAGE) is protected by the least-significant bit of the least-significant byte, followed by the command with a code of 01h and so forth. Note that all possible commands have a corresponding bit regardless of whether they are protectable or supported by the device. Clearing a command’s UNPROTECT bit indicates that write-access to that command is only allowed if the device’s security level has been raised to an appropriate level. The UNPROTECT bits in the default store require a security level 3 or greater to be writable. The UNPROTECT bits in the user store require a security level of 2 or higher. Data Length in Bytes: 32 Paged or Global: Global Data Format: Custom Type: Block R/W Protectable: No Default Value: FF…FFh Units: N/A FN8760 Rev.3.00 Nov 8, 2017 Page 89 of 91 ZL8802 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit our website to make sure you have the latest revision. DATE REVISION CHANGE Nov 8, 2017 FN8760.3 Changed all SPS references from ISL99227 to ISL99227B. Added an explanation of the EN0 and EN1 timing restrictions to “Enable Pin Operation and Timing” on page 16. Updated to the current Renesas format. May 25, 2017 FN8760.2 Changed ISL99226 to ISL99227 in Figure 1 on page 3. Added Related Literature section. Updated disclaimer. Dec 11, 2015 FN8760.1 Added Junction Temperature to the “Thermal Information” on page 8. Added ZL8802ALAFT7A to the ordering information table on page 7. Aug 6, 2015 FN8760.0 Initial release About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing, and high-end consumer markets. For the most updated datasheet, application notes, related documentation, and related parts, see the respective product information page found at www.intersil.com. For a listing of definitions and abbreviations of common terms used in our documents, visit www.intersil.com/glossary. You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. © Copyright Intersil Americas LLC 2015-2017. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8760 Rev.3.00 Nov 8, 2017 Page 90 of 91 ZL8802 Package Outline Drawing For the most recent package outline drawing, see L44.7x7B. L44.7x7B 44 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 10/09 7.00 A 5.00 TYP 40X 0.50 B 6 PIN 1 INDEX AREA 6 PIN #1 INDEX 1 AREA 44 34 7.00 33 5.20 ±0.1 EXP. DAP 23 (4X) 44X 0.25 4 0.10 M C A B 0.15 TOP VIEW 11 22 SIDE VIEW 12 5.20 ±0.1 EXP. DAP 44X 0.55 ±0.1 BOTTOM VIEW ( 6.65 ) SEE DETAIL "X" ( 5.20) 0.10 C 1.00 MAX C 0.08 C SIDE VIEW ( 6.65 ) ( 5.20 ) ( 40X 0.50) C (44X .25) 0.2 REF 5 0 . 00 MIN. 0 . 05 MAX. ( 44 X 0.75) TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be 7. Complies to JEDEC MO220 VKKD-1. either a mold or mark feature. FN8760 Rev.3.00 Nov 8, 2017 Page 91 of 91