RT8012AGQW

® RT8012A Dual 1A/1.5A-1.2MHz Synchronous Step-Down Converters General Description Features The RT8012A is a dual PWM, current mode, stepdown converter. Its input voltage range is from 2.6V to 5.5V and has a constant 1.2MHz switching frequency, allowing the use of tiny, low cost capacitors and inductors 2mm or less in height. Each output voltage is adjustable from 0.8V to 5V. Internal power switches with low on-resistance of the dual step-down regulators increase efficiency and eliminate the need for external Schottky diodes. The RT8012A can run at 100% duty cycle for low dropout operation that extends battery life in portable systems. With independent Enable and Power Good pins, it is easy to control the power up sequence of the two converters, which is important in some applications. z High Efficiency : Up to 95% z 1.2MHZ Constant Switching Frequency 1A and 1.5A Load Current on Each Channel Respectively Low RDS(ON) Internal Switches No Schottky Diode Required 0.8V Reference Allows Low Output Voltage Low Dropout Operation : 100% Duty Cycle Internally Compensated < 2μ μA Shutdown Current Power Good Output Voltage Monitor Internal Soft-Start Easy Power Sequence Control Over temperature Protection Short Circuit Protection Thermally Enhanced 16-Lead WQFN Package RoHS Compliant and 100% Lead (Pb)-Free z z z z z z z z z z z Ordering Information z RT8012A z z Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) Richtek products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. z Suitable for use in SnPb or Pb-free soldering processes. z z z Portable Instruments Microprocessors and DSP Core Supplies Cellular Phones Wireless and DSL Modems PC Cards Digital Cameras Pin Configurations (TOP VIEW) Marking Information YMDNN : Date Code 16 15 14 13 1 12 FB1 2 11 EN1 VDD PVDD1 PGND 3 10 17 4 5 6 LX2 PGOOD2 PVDD2 PVDD2 PGND LX2 BH=YM DNN FB2 EN2 BH= : Product Code 7 9 8 LX1 PGND ` z z Note : ` Applications GND PGOOD1 Package Type QW : WQFN-16L 4x4 (W-Type) WQFN-16L 4x4 Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8012A-06 September 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT8012A Typical Application Circuit VIN 5V L1 2.2uH 5, 6 R3 100k 16 C3 22uF EN2 VDD RT8012A LX2 C2 10uF PGOOD1 FB2 14 R4 200k R2 100k 13 PGOOD1 Chip Enable EN1 11 LX1 PGND 15 GND Chip Enable 9 PVDD1 1 PGOOD2 PGOOD2 PVDD2 R1 100k VOUT2 1.2V/1.5A 2, 3 10 C1 10uF FB1 7 L2 3.3uH 12 R6 625k 4, 17 (Exposed Pad) VOUT1 3.3V/1.0A C4 10uF R5 200k Figure 1. Dual Output 3.3V and 1.2V Step Down Regulators 1 PGOOD2 C5 0.1uF L1 2.2uH 5, 6 R2 100k C3 22uF 16 EN2 VDD C2 10uF PGOOD1 R3 200k 14 13 Chip Enable EN1 11 LX1 LX2 FB2 9 RT8012A PGND 15 GND PGOOD2 VOUT2 1.2V/1.5A 2, 3 10 C1 10uF PVDD2 R1 100k PVDD1 VIN 5V FB1 4, 17 (Exposed Pad) 7 L2 3.3uH 12 R5 625k R4 200k VOUT1 3.3V/1.0A C4 10uF Figure 2. Dual Output 3.3V and 1.2V Step Down Regulators (Power up sequence is 3.3V first and then 1.2V). Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS8012A-06 September 2012 RT8012A Functional Pin Description Pin No. 1 2, 3 Pin Name PGOOD2 PVDD2 4, 8, PGND 17 (Exposed Pad) 5,6 LX2 7 LX1 9 PVDD1 10 VDD 11 EN1 12 FB1 13 PGOOD1 14 GND Pin Function Power Good Indicator of Regulator 2. Open-drain logic output that is opened when the output voltage exceeds 90% of the regulation point. Power Input Supply of Regulator 2. Decouple this pin to PGND with a capacitor. Power Ground. The exposed pad must be soldered to a large PCB and connected to PGND for maximum power dissipation. Internal Power MOSFET Switches Output of Regulator 2. Connect this pin to the inductor. Internal Power MOSFET Switches Output of Regulator 1. Connect this pin to the inductor. Power Input Supply of Regulator 1. Decouple this pin to PGND with a capacitor. Signal Input Supply. Decouple this pin to GND with a capacitor. Normally V DD is equal to PVDD1 and PVDD2. Keep the voltage difference between VDD, PVDD1 and PVDD2 less than 0.5V. Regulator 1 Chip Enable. A logic high level at this pin enables Regulator 1, while a logic low level causes Regulator 1 to shut down. Feedback Pin of Regulator 1. Receives the feedback voltage from a resistive divider connected across the output. Power Good Indicator of Regulator 1. Open-drain logic output that is opened when the output voltage exceeds 90% of the regulation point. Signal Ground. Return the feedback resistive dividers to this ground, which in turn connects to PGND at one point. Regulator 2 Chip Enable. A logical high level at this pin enables regulator 2, while a logic low level causes Regulator 2 to shut down. A 1μA pull up current from VDD 15 EN2 will be injected to EN2 pin when Regulator 1 is ready (VFB1 exceeds 90% of regulation point). Tie this pin to PGOOD1 and add a capacitor between this pin and GND will introduce a delay time before enabling Regulator 2. The delay time can be adjusted by different capacitance. 16 FB2 Feedback Pin of Regulator 2. Receives the feedback voltage from a resistive divider connected across the output. Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8012A-06 September 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT8012A Function Block Diagram Regulator 1, 2 PVDD1/ PVDD2 ISEN Slope Compensation OSC 0.8V FB1/ FB2 Output Clamp EA OC Limit InternalSoft Start 0.72V PGOOD Driver Control Logic PGND 0.4V OTP UVP VDD EN & SHDN Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 VREF PGOOD1/ PGOOD2 POR GND EN1/ EN2 LX1/ LX2 EN1 EN2 Shutdown is a registered trademark of Richtek Technology Corporation. DS8012A-06 September 2012 RT8012A Absolute Maximum Ratings z z z z z z z z z (Note 1) Supply Input Voltage, VDD, PVDD1, PVDD2 --------------------------------------------------------------- −0.3V to 6V LX1, LX2 Pin Voltage --------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.3V) < 20ns ---------------------------------------------------------------------------------------------------------------- −5V to 8V Other I/O Pin Voltages ------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.3V) Power Dissipation, PD @ TA = 25°C WQFN-16L 4x4 ---------------------------------------------------------------------------------------------------- 1.852W Package Thermal Resistance (Note 2) WQFN-16L 4x4, θJA ----------------------------------------------------------------------------------------------- 54°C/W WQFN-16L 4x4, θJC ---------------------------------------------------------------------------------------------- 7°C/W Junction Temperature --------------------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------- 260°C Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Model) -------------------------------------------------------------------------------------- 2kV Recommended Operating Conditions z z z (Note 4) Supply Input Voltage, VDD, PVDD1, PVDD2 --------------------------------------------------------------- 2.6V to 5.5V Junction Temperature Range ------------------------------------------------------------------------------------ −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------ −40°C to 85°C Electrical Characteristics (PVDD1 = PVDD2 = VDD = 3.6V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Input Voltage Range VDD 2.6 -- 5.5 V Feedback Reference Voltage VREF 0.784 0.8 0.816 V 500 830 1100 μA -- -- 2 μA 2.3 2.43 2.55 V -- 150 -- mV 0.68 0.72 0.76 V -- -- 100 Ω 1 1.2 1.4 MHz EN1 Input High 1.4 -- -- V EN1 Input Low -- -- 0.4 V 0.85 1 1.15 V EN2 Hysteresis -- 200 -- mV C5 = 0.1μF 70 100 130 ms -- 1 -- μA DC Bias Current (PVDD1, PVDD2, VDD total) Under Voltage Lockout Threshold Active, not Switching, VFB1, VFB1 = 0.75V EN1, EN2 = 0 VDD Rising VDD Hysteresis FB Threshold for PGOOD Transition PGOOD Pull-Down Resistance Switching Frequency Switching Frequency EN2 Rising EN2 Threshold EN2 Delay EN2 Pull-up current (Note 5) Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS8012A-06 September 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT8012A Parameter Symbol Test Conditions Min Typ Max Unit Regulator 1 Switch On Resistance, High R FET_H ISW = 0.2A -- 300 450 mΩ Switch On Resistance, Low R FET_L ISW = 0.2A -- 260 390 mΩ Peak Current Limit I LIM 1.2 1.6 2.2 A -- -- 1 %V -- -- 1 % Output Voltage Line Regulation VIN = 2.6V to 5.5V Measured by sever loop, EA Output Voltage Load Regulation output from 0.773V to 1.376V Regulator 2 Switch On Resistance, High R FET_H ISW = 0.5A -- 180 300 mΩ Switch On Resistance, Low R FET_L ISW = 0.5A -- 90 150 mΩ Peak Current Limit I LIM 1.7 2.2 3 A -- -- 1 %V -- -- 1 % Output Voltage Line Regulation Output Voltage Load Regulation VIN = 2.6V to 5.5V Measured by sever loop, EA output from 0.336V to 0.948V Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. EN2 pull-up current only is activated when Regulator-1 is ready (VFB1 > 0.72V). No pull-up current (