RT9917GQW

RT9917 7 Channel DC/DC Converters General Description Features The RT9917 is a complete power-supply solution for digital 1 Channel Boost/Buck Selectable by SEL Pin still cameras and other hand-held devices. 2 Selectable On/Off Sequence Set by SEQ Pin It integrates : 4 Channels with Internal Compensation Provide Charge Pump Voltage to Enhance NMOS CH1 : Boost DC-DC converter with load disconnect Gate Driving Capability for Alkaline Battery Input controller (SW1). All Power Switches Integrated CH2 : Selectable Boost/Buck DC-DC converter Syn Step-Down DC/DC Converter Up to 95% Efficiency CH3 : Step-down DC-DC converter with internal compensation. CH4 : Step-down DC-DC converter with internal compensation. CH5 : DC/DC converter with HV NMOS, internal compensation and load disconnect (SW5) for CCD positive 100% (MAX) Duty Cycle Syn Step-Up DC/DC Converter Adjustable Output Voltage Up to 95% Efficiency Open LED Protection supply. Transformerless Inverting Converter for CCD Fixed 1MHz Switching Frequency CH6 : DC/DC converter with HV PMOS for CCD negative Compact 40-Lead WQFN Package supply. RoHS Compliant and 100% Lead (Pb)-Free CH7 : WLED driver with HV NMOS, internal compensation and allow for PWM dimming. Applications SW1 : Load disconnect controller for CH1. Digital Still Camera PDA SW5 : Load disconnect switch for CH5. Portable Device Ordering Information Pin Configurations (TOP VIEW) RT9917 Package Type QW : WQFN-40L 5x5 (W-Type) Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) Note : Richtek products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 40 39 38 37 36 35 34 33 32 31 PVDD1 LX6 PVDD6 CP CN CPO FB6 FB4 COMP6 LX4 1 30 2 29 3 28 4 27 5 6 26 GND 25 24 7 8 23 41 9 22 21 10 PVDD2 VDDM CFB7 GND LX7 LX5 VOUT7 FB3 EN7 LX3 11 12 13 14 15 16 17 18 19 20 WQFN-40L 5x5 DS9917-03 April 2011 www.richtek.com 1 RT9917 Typical Application Circuit For Li-ion : CH2 3.3V is from VOUT of CH1 VBAT C24 10uF VBAT 1uF L1 2.2uH 40 LX1 LX5 25 1 PVDD1 5V C1 10uF x 2 R1 37 150k C16 R15 560pF 39k R14 88.7k 5V C3 10uF 3.3V C17 10uF L4 4.7uH 31 LX2 C18 10pF R17 150k C19 R18 2.2nF 15k 34 33 20 C20 10uF L2 4.7uH 2.5V C4 22pF C5 10uF R3 768k RT9917 FB2 COMP2 23 C9 1nF R8 75k LX6 2 27 R11 C13 10.5k 0.1uF VREF 16 COMP6 PVDD6 R12 75k 9 C11 47pF 3 C26 1uF FB3 L6 10uH C14 1nF VBAT C27 1uF 11 VBAT L3 4.7uH C7 10uF R5 470k R6 374k -8V C12 4.7uF/16V R10 68k FB6 7 R4 360k C21 1.8V 10uF C6 33pF R7 887k L7 10uH PVDD3 21 LX3 C24 10uF/25V FB5 15 GND R16 470k VBAT SW5O 13 SW5I 14 FB1 38 COMP1 36 OK134 35 VOUT1 30 PVDD2 16V C8 10uF/25V C15 4.7pF R13 470k C25 1uF L5 10uH 29 VDDM 10 LX4 ON OFF Dimming LX7 26 D1 VOUT7 24 D2 D3 8 Power On PVDD4 39 32 12 19 22 FB4 EN134 EN2 EN5 EN6 EN7 VBAT 28 CFB7 4 CP CN 5 CPO 6 18 SEQ 17 SEL C10 1uF/16V D4 R9 10 VBAT Timing Diagram Power On Sequence : CH1 Boost 5V Power Off Sequence : CH2 Buck 3.3V VDDM EN134, EN2 CH1 VOUT 5V CH3 VOUT 2.5V CH4 VOUT 1.8V CH2 VOUT 3.3V www.richtek.com 2 CH3 Buck 2.5V CH4 Buck 1.8V CH4 Buck 1.8V CH3 Buck 2.5V CH2 Buck 3.3V CH1 Boost 5V User define 3.5ms 3.5ms 3.5ms 3.5ms IC shutdown Wait until FB3 < 0.1V Wait until FB4 < 0.1V Wait until FB2 < 0.1V DS9917-03 April 2011 RT9917 For Li-ion : CH2 3.3V is from VBAT VBAT C24 10uF VBAT 1uF L1 2.2uH 40 LX1 C25 1uF L5 10uH 29 VDDM LX5 25 16V 1 PVDD1 5V C1 10uF x 2 R1 150k C15 4.7pF R13 470k VBAT C3 10uF 3.3V C17 10uF L4 4.7uH C18 10pF R16 470k C19 R18 2.2nF 15k R17 150k FB1 38 COMP1 36 OK134 35 VOUT1 30 PVDD2 31 LX2 VBAT L2 4.7uH 2.5V C4 22pF C5 10uF R3 768k RT9917 FB5 34 33 FB2 COMP2 23 11 C21 1.8V 10uF C6 33pF L3 4.7uH C7 10uF R5 470k R6 374k ON OFF Dimming R11 C13 10.5k 0.1uF VREF 16 COMP6 PVDD6 -8V C12 4.7uF/16V R10 68k FB6 7 R12 75k 9 C11 47pF C14 1nF 3 VBAT C26 L6 1uF 10uH FB3 VBAT C27 1uF PVDD4 10 LX4 LX7 26 D1 VOUT7 24 D2 D3 8 Power On R7 887k R8 75k 27 R4 360k VBAT C9 1nF 15 LX6 2 PVDD3 21 LX3 C24 10uF/25V L7 10uH GND 20 C20 10uF SW5O 13 SW5I 14 37 C16 R15 560pF 39k R14 88.7k C8 10uF/25V 39 32 12 19 22 FB4 EN134 EN2 EN5 EN6 EN7 28 CFB7 4 CP CN 5 6 CPO 18 SEQ 17 SEL C10 1uF/16V D4 R9 10 VBAT Timing Diagram Power On Sequence : CH1 Boost 5V CH3 Buck 2.5V CH4 Buck 1.8V CH2 Buck 3.3V Power Off Sequence : CH2 Buck 3.3V CH4 Buck 1.8V CH3 Buck 2.5V CH1 Boost 5V VDDM EN134, EN2 CH1 VOUT 5V CH3 VOUT 2.5V CH4 VOUT 1.8V CH2 VOUT 3.3V DS9917-03 April 2011 User define 3.5ms 3.5ms 3.5ms 3.5ms IC shutdown Wait until FB3 < 0.1V Wait until FB4 < 0.1V Wait until FB2 < 0.1V www.richtek.com 3 RT9917 For 2AA VBAT C24 10uF L1 2.2uH 3.3V 1uF 40 LX1 AO3415 VOUT 3.3V C1 10uF 1 R1 1M Q1 R13 470k C17 4.7pF R14 150k C18 R15 560pF 39k 37 L4 2.2uH VBAT 5V C19 10uF VBAT R16 470k C3 10uFx2 33 L2 4.7uH 2.5V C5 10uF R3 768k 25 RT9917 FB2 COMP2 PVDD3 C23 10uF L3 4.7uH 27 1.8V C7 10uF R5 470k C6 33pF -8V C12 4.7uF/16V R10 68k R11 C13 10.5k 0.1uF VREF 16 PVDD6 10 LX4 R8 75k FB6 7 23 PVDD4 R7 887k LX6 2 R12 75k 9 C14 1nF C11 47pF 3 VBAT C26 L6 1uF 10uH R4 360k 3.3V C9 1nF L7 10uH COMP6 FB3 C24 10uF/25V FB5 15 21 LX3 11 16V C8 10uF/25V SW5O 13 SW5I 14 FB1 31 LX2 30 PVDD2 20 3.3V C4 22pF LX5 GND C21 560pF R18 39k C25 1uF L5 10uH PVDD1 38 COMP1 36 OK134 35 VOUT1 34 R17 88.7k C22 10uF 29 VDDM VBAT C27 1uF LX7 26 D1 VOUT7 24 D2 D3 8 R6 374k Power On ON OFF 39 32 12 19 22 Dimming FB4 EN134 EN2 EN5 EN6 EN7 28 CFB7 CP 4 CN 5 CPO 6 18 SEQ 17 SEL C10 1uF/16V D4 R9 10 C15 0.1uF VBAT C16 1uF Note : A schottky diode connect from LX1 to PVDD1 is required for low-voltage start up. Timing Diagram Power On Sequence : CH1 Boost 3.3V CH3 Buck 2.5V CH4 Buck 1.8V (CH2 Boost 5V and SW1 3.3V) Power Off Sequence : (CH2 Boost 5V and SW1 3.3V) CH4 Buck 1.8V CH3 Buck 2.5V CH1 Boost 3.3V VDDM EN134, EN2 CH1 VOUT 3.3V CH3 VOUT 2.5V CH4 VOUT 1.8V VOUT1 3.3V CH2 VOUT 5V www.richtek.com 4 User define 3.5ms 3.5ms 3.5ms 3.5ms 3.5ms IC shutdown Wait until FB3 < 0.1V Wait until FB4 < 0.1V Wait until VOUT1 < 0.4V Depends on loading DS9917-03 April 2011 RT9917 Channel CH3 Formula VOUT = (1+R3/R4) x 0.8 VOUT (V) 2.5 1.8 1.3 1.2 1.0 L(uH) 4.7 4.7 4.7 4.7 4.7 R3(k ) 768 470 237 187 23.2 R4(k ) 360 374 374 374 93.1 C4(pF) 22 33 68 82 47 COUT (uF) 10 10 10 10 10 Channel CH4 Formula VOUT = (1+R5/R6) x 0.8 VOUT (V) 2.5 1.8 1.3 1.2 1.0 L(uH) 4.7 4.7 4.7 4.7 4.7 R5(k ) 768 470 237 187 23.2 R6(k ) 360 374 374 374 93.1 C6(pF) 22 33 68 82 47 COUT (uF) 10 10 10 10 10 Channel CH5 Formula VOUT = (1+R7/R8) x 1.25 VOUT (V) 12 13 15 15.5 16 L(uH) 10 10 10 10 10 R7(k ) 820 820 1000 820 886 R8(k ) 95.3 86.6 90.9 71.5 75 C9(pF) 1000 1000 1000 1000 1000 COUT (uF) 10/16V 10/16V 10/25V 10/25V 10/25V Channel CH6 Formula VOUT = (R10/R11)*(-1.25) * R10+R11 CH3 -> CH4 -> (SW1 and CH2) SW1 is an open drain controller to drive an external PMOS and then functions as a load disconnect switch for CH1. Low CH3 -> CH4 -> CH1 -> (SW1 and CH2) This switch features soft start, Power On/Off Sequence SEQ Power OFF Sequence and under voltage protection functions. OK134 is an open drain control pin. Once CH1, CH3 and CH4's soft start High (SW1 and CH2) -> CH4 -> CH3 -> CH1 Low (SW1 and CH2) -> CH1 -> CH4 -> CH3 are completed, SW1 is on. The OK134 pin is slowly pulled low and controlled with soft start to suppress the inrush current. VOUT1 is used for SW1 soft start and under voltage protection. If SW1 is not used, connect a resistor to VOUT1 (Refer to Typical Application Circuit for Li-ion). SW5 SW5 is an internal switch enabled by EN5 and functions as a load disconnection for CH5. This switch features soft start, Powe On Sequence, over voltage (for SW5I) and under voltage (for SW5O) protection functions. Sequence setting is decided by “SEQ” pin.Please note that the logic state can not be changed during operation. SEQ = High The Power On Sequence is : While EN134 goes high, CH1 will be turned on to wait for the completion of CH1's soft start. After that, CH3 will be turned on to wait for the completion of CH3's soft start. And then, CH4 will be turned on to wait for the completion Charge Pumps of CH4's soft start. The charge pump function is enabled while battery type Then, SW1 will be turned on and CH2 is allowed to be turned on by EN2 at any time. is alkaline battery. This channel provides pump voltage to enhance MOS gate driving capability. This function is not necessary while battery is Li-ion type. Finally, SW1's soft start will be completed. The Power-Off Sequence is : Reference Voltage At first, while EN134 goes low, (SW1 is showdown and The RT9917 provides a precise 1.25V reference voltage with sourcing capability 100™A. Connect a 0.1™F ceramic internally pulled low, CH2 must be turned off by EN2) capacitor from VREF pin to GND. Reference voltage is enabled by connecting EN6 to logic high. Furthermore, this reference voltage is internally pulled to GND in shutdown. www.richtek.com 16 SW1 (note 1) and CH2 (note 2) will be shutdown. After that, CH4 will be turned off and internally pulled low to wait for the completion of CH4's shutdown. And then, CH3 will be turned off and internally pulled low to wait for CH3's shutdown completion. DS9917-03 April 2011 RT9917 Then, CH1 will be turned off and internally pulled low of CH1's soft start. (note 3) to wait for CH1's shutdown completion. Finally, the whole IC will be shutdown (if EN5, EN6 and Then, SW1 will be turned on and CH2 is allowed to be turned on by EN2 at any time. EN7 already go low). Finally, SW1's soft start will be completed. Note 1 : The SW1 is designed for CH1. The Power-Off Sequence is : Note 2 : If CH2 is configured as a Boost, then the CH2 will not be internally pulled low and the completion of shutdown will not be checked. Note3 : CH1 is configured as a Boost, so the CH1 will not be internally pulled low and the completion of shutdown will not be checked. At first, while EN134 goes low, (SW1 is showdown and internally pulled low, CH2 must be turned off by EN2) SW1 (note 1) and CH2 (note 2) will be shutdown. Then, CH1 will be turned off and internally pulled low (note 3) to wait for CH1's shutdown completion. After that, CH4 will be turned off and internally pulled SEQ = Low low to wait for the completion of CH4's shutdown. The Power On Sequence is : And then, CH3 will be turned off and internally pulled low to wait for CH3's shutdown completion. While EN134 goes high, CH3 will be turned on to wait for the completion of CH3's soft start. After that, CH4 will be be turned on to wait for the Finally, the whole IC will be shutdown (if EN5, EN6 and EN7 already go low). completion of CH4's soft start. And then, CH1 will be turned on to wait for the completion Protection VDDM CH1:Boost CH2:Boost Protection Threshold (typical) Protection methods type Refer to Electrical spec Over Voltage Disable all channels VDDM > 6V Protection (except CH7) Restart if VDDM < 5.6V (with hysteresis) Current Limit NMOS current> 3A NMOS off, PMOS on Automatic reset at next clock cycle PVDD1 OVP PVDD1 > 6V IC shutdown (except CH7) VDDM pow er reset Current Limit NMOS current> 3A NMOS off, PMOS on PVDD2 OVP PVDD2 > 6V IC shutdown (except CH7) VDDM pow er reset Reset m ethod Automatic reset at next clock cycle CH2:Buck OCP PMOS current > 1.5A IC shutdown (except CH7) VDDM pow er reset CH3:Buck OCP PMOS current > 1.5A IC shutdown (except CH7) VDDM power reset CH4:Buck OCP PMOS current > 1.5A IC shutdown (except CH7) VDDM power reset CH5: OCP NMOS current > 1.5A NMOS off CH6: OCP PMOS current > 1.5A IC shutdown (except CH7) VDDM pow er reset OCP NMOS current > 0.8A NMOS off Automatic reset at next clock cycle OVP VOUT7 > 19V Shutdown CH7 Reset by toggling EN7 CH7:WLED SW1 UVP OVP SW5 Thermal UVP Thermal shutdown DS9917-03 April 2011 Automatic reset at next clock cycle VOUT1 < 1.75V IC shutdown (except CH7) VDDM pow er reset after SW1 soft start end SW5I > 19V IC shutdown (except CH7) VDDM pow er reset SW5O < 0.4V IC shutdown (except CH7) VDDM pow er reset after SW5 soft start end All channels stop Temperature > 160 C Temperature < 140 C switching www.richtek.com 17 RT9917 Layout Consideration Thermal Considerations For continuous operation, do not exceed absolute All the traces of the compensation components should maximum operation junction temperature. The maximum be short to reduce the parasitic connection resistance power dissipation depends on the thermal resistance of and isolated from other noisy device traces. The ground IC package, PCB layout, the rate of surroundings airflow traces must be connected to ground plane and temperature difference between junction to ambient. independently. The maximum power dissipation can be calculated by Compensative parts: R15, C16, R18, C19, R12, C11, following formula : C14. PD(MAX) = ( TJ(MAX) - TA ) / JA Where T J(MAX) is the maximum operation junction All the traces of the feedback components should be short to reduce the parasitic connection resistance and temperature 125”C, TA is the ambient temperature and isolated from other noisy device traces. The ground the traces must be connected to ground plane JA is the junction to ambient thermal resistance. For recommended operating conditions specification, independently. Output sense trace must be kept away where TJ(MAX) is the maximum junction temperature of the from the noisy device (inductor). die (125”C) and TA is the ambient temperature. The junction Feedback parts: to ambient thermal resistance JA is layout dependent. For WQFN-40L 5x5 packages, the thermal resistance JA is 36”C/W on the standard JEDEC 51-7 four layers thermal test board. The maximum power dissipation at TA = 25”C R13, R14, C15 for CH1. R16, R17, C18 for CH2. R3, R4, C4 for CH3. R5, R6, C6 for CH4. R7, R8, C9 for CH5. can be calculated by following formula : R10, R11, C13for CH6. R9 for CH7. PD(MAX) = (125”C n 25”C) / (36”C/W) = 2.778W for All the traces of connecting inductor must be as wide WQFN-40L 5x5 packages as possible. The maximum power dissipation depends on operating Inductor: L1, L2, L3, L4, L5, L6, L7. ambient temperature for fixed T J(MAX) and thermal Output Capacitor should be placed close to Vout and resistance connected to ground plane to reduce noise coupling. JA. For RT9917 package, the Figure 1 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. 3.6 Four Layers PCB 3.2 Output capacitor: C1, C5, C7, C8, C10, C12, C17 and C24. Input capacitor should be placed close to Vbat and connected to ground plane. Input capacitor: C2, C3, C20, C21, C26, C27 and C28. 2.8 The GND (Pin 27) and Exposed Pad should be 2.4 connected to a strong ground plane for heat sinking 2.0 and noise protection. 1.6 The EN7 pin is used for dimming control. Keep the FB3 1.2 trace away from the EN7. 0.8 0.4 0.0 0 15 30 45 60 75 90 105 120 135 Ambient Temperature (”C) (°C) Figure 1. Derating Curves for RT9917 Packages www.richtek.com 18 DS9917-03 April 2011 RT9917 LX should be connected to inductor by wide and short trace, keep sensitive components away from this trace. VOUT1 Place the feedback and compensation components as close as possible to the FB and COMP pin and keep away from noisy devices. VOUT2 GND C15 GND VBAT GND R16 C17 C18 R13 C16 C19 R1 R15 L1 Input/Output capacitors must be placed as close as possible to the Input/Output pins. R18 R14 L4 R17 WLED- C2 D4 D3 C1 L7 C12 C13 C6 R5 R6 C14 40 39 38 37 36 35 34 33 32 31 PVDD1 LX6 D2 PVDD6 CP R10 CN CPO R11 FB6 FB4 COMP6 R12 LX4 C11 1 30 2 29 3 28 4 27 5 26 GND 6 7 24 8 23 41 9 11 12 13 14 15 16 17 18 19 20 C20 C21 GND 22 21 C7 VOUT4 25 10 L3 C3 C24 R8 C9 PVDD2 VDDM CFB7 GND LX7 LX5 VOUT7 FB3 EN7 LX3 C25 R9 VBAT D2 D1 D3 L6 WLED+ VBAT C26 L5 C27 VBAT D1 C10 GND VOUT5 C8 R4 R3 C4 L2 GND C5 VOUT3 R7 GND GND VOUT5 Connect the Exposed Pad to a ground plane. Figure 2 DS9917-03 April 2011 www.richtek.com 19 RT9917 Outline Dimension D SEE DETAIL A D2 L 1 E E2 e b 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options A A3 A1 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 4.950 5.050 0.195 0.199 D2 3.250 3.500 0.128 0.138 E 4.950 5.050 0.195 0.199 E2 3.250 3.500 0.128 0.138 e L 0.400 0.350 0.016 0.450 0.014 0.018 W-Type 40L QFN 5x5 Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 95, Minchiuan Road, Hsintien City 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Taipei County, Taiwan, R.O.C. Tel: (8862)86672399 Fax: (8862)86672377 Email: marketing@richtek.com Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 20 DS9917-03 April 2011