Datasheet
LDO Regulators with Voltage Detector
500 mA Output LDO Regulator
with Voltage Detector
BD4275FP2-C
BD4275FPJ-C
General Description
Key Specifications
BD4275FP2-C and BD4275FPJ-C are automotive suited
voltage regulator with 1ch Reset and offers the output
current of 500mA while limiting the low quiescent current.
These regulators are therefore ideal for applications
requiring a direct connection to the battery and a low
current consumption. A reset signal is generated for an
output voltage VO of Typ 4.62 V.
The reset delay time can be programmed by the external
capacitor.
Qualified for Automotive Applications
Input Voltage Range:
-0.3 V to +45 V
Low Quiescent Current:
65 μA (Typ)
Output Load Current:
500 mA
Output Voltage:
5.0 V ±2 %
Reset Detect Voltage :
4.50 V to 4.75 V
Over Current Protection (OCP)
Thermal Shut Down (TSD)
FP2: TO263-5F
W (Typ) × D (Typ) × H (Max)
10.16 mm × 15.10 mm × 4.70 mm
FPJ: TO252-J5F
6.60 mm × 10.10 mm × 2.38 mm
Package
Features
AEC-Q100 qualified. (1)
Low ESR ceramic capacitors applicable for output.
Low drop voltage: PDMOS output transistor
Power on and under-voltage reset
Programmable reset delay time by external capacitor.
(1): Grade 1
Applications
Onboard vehicle device (body-control, car stereos,
satellite navigation system, etc)
Figure 1. Package Outlook
Typical Application Circuit
VCC and VO pin capacitors: 0.1 μF ≤ CIN (Typ), 6 μF ≤ CO (Min)
Please refer to the "Selection of Components Externally Connected".
VCC
VO
VCC
VO
CIN
CO
RO
RO
CT
GND
Figure 2. Typical Application Circuit
○Product structure:Silicon monolithic integrated circuit
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Pin Configurations
TO263-5F
(TOP VIEW)
FIN
TO252-J5F
(TOP VIEW)
FIN
1 2 3 4 5
1 2 3 4 5
Figure 3. Pin configurations
Pin Descriptions
Pin No.
Pin Name
Function
1
VCC
2
RO
3
GND
4
CT
Reset Delay; connect capacitor to GND for setting delay time.
5
VO
5 V Output;
FIN
FIN
FIN; FIN internally connected to Pin3.
Supply Voltage Input
Reset Output; Open-Collector output.
Ground; Pin3 internally connected to FIN.
Block Diagram
Figure 4. Block Diagram
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Block Descriptions
Block Name
Function
Reference
Reference voltage
Error Amplifier
Error amplifier
TSD
Thermal shutdown protection
OCP
Over current protection
The OCP protects the device from damage caused by over
current.
UVLO
Under voltage lock out
The UVLO prevents malfunction of the reset block in case of
very low output voltage.
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Description of Blocks
The Reference generates the Reference Voltage.
The Error Amplifier amplifies the difference between the feed
back voltage of the output voltage and the reference voltage.
The TSD protects the device from overheating.
If the chip temperature (Tj) reaches ca. 175 °C (Typ),
the output is turned off.
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Datasheet
BD4275FPJ-C
Absolute Maximum Ratings
Parameter
Symbol
Limits
Unit
VCC
-0.3 to +45.0
V
RO Voltage
VRO
-0.3 to +18.0
V
VO Voltage
VO
-0.3 to +7.0
V
(1)
VCC Voltage
(TO263-5F)
(2)
Pd
1.9
W
(TO252-J5F)
(3)
Pd
1.3
W
Junction Temperature Range
Tj
-40 to +150
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Power Dissipation
(1)
Not to exceed Pd.
(2)
Reduced by 15.2 mW / °C over Ta = 25 °C, when mounted on glass epoxy board: 114.3 mm × 76.2 mm × 1.6 mm.
(3)
Reduced by 10.4 mW / °C over Ta = 25 °C, when mounted on glass epoxy board: 114.3 mm × 76.2 mm × 1.6 mm.
Recommended Operating Ratings
Parameter
Symbol
Min
Max
Unit
(IO ≤ 300mA)
(1)
VCC
5.5
45.0
V
(IO ≤ 500mA)
(1)
VCC
5.9
45.0
V
VCC
3.0
-
V
Output Current
IO
0
500
mA
Operating Ratings Temperature
Ta
-40
125
°C
Symbol
Min
Max
Unit
Supply Voltage
Supply Voltage
Start -Up Voltage
(1)
Not to exceed Pd.
Thermal Resistance
Parameter
TO263-5F Package
Junction to Ambient
(1)
θja
15.6
-
°C / W
Junction to Case (bottom)
(1)
θjc
1
-
°C / W
Junction to Ambient
(2)
θja
19.2
-
°C / W
Junction to Case (bottom)
(2)
θjc
1
-
°C / W
TO252-J5F Package
(1)
TO263-5F mounted on 114.3 mm × 76.2 mm × 1.6 mmt 4-Layer Glass-Epoxy PCB.
(Top copper foil: ROHM recommended footprint + wiring to measure /
Copper foil on 2 inner layers and the reverse side of PCB:74.2 mm × 74.2 mm)
(2)
TO252-J5F mounted on 114.3 mm × 76.2 mm × 1.6 mmt 4-Layer Glass-Epoxy PCB.
(Top copper foil: ROHM recommended footprint + wiring to measure /
Copper foil on 2 inner layers and the reverse side of PCB:74.2 mm × 74.2 mm)
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Datasheet
BD4275FPJ-C
Electrical Characteristics
( Unless otherwise specified , Tj = -40 °C to +150 °C, VCC = 13.5 V )
Parameter
Symbol
Limits
Min
Typ
Max
Unit
Conditions
Circuit Current
ICC
-
65
150
μA
Output Voltage 1
VO
4.90
5.00
5.10
V
Output Voltage 2
VO
4.90
5.00
5.10
V
Dropout Voltage
ᇞVd
-
0.25
0.5
V
Load Regulation
Reg.L
-
10
30
mV
IO = 10 mA to 250 mA
Line Regulation
Reg.I
-15
-
15
mV
VCC = 8 V to 16 V, IO = 5 mA
Current Limit
IOCP
500
-
-
mA
-
Ripple Rejection
R.R.
-
60
-
dB
f = 120 Hz, ein = 1 Vrms,
IO = 100 mA
Thermal Shut Down Temperature
TTSD
-
175
-
°C
IO = 0 mA
5 mA ≤ IO ≤ 400 mA
6 V ≤ VCC ≤ 28 V
5 mA ≤ IO ≤ 200 mA
6 V ≤ VCC ≤ 40 V
VCC = 4.75 V, IO = 300 mA
Electrical Characteristics (Reset Function)
( Unless otherwise specified , Tj = -40 °C to +150 °C, VCC = 13.5 V )
Parameter
Symbol
Limits
Min
Typ
Max
Unit
Conditions
Switching Threshold
VRT
4.50
4.62
4.75
V
-
Switching Hysteresis
VRHY
20
60
100
mV
-
Upper Delay Switching Threshold
VCTH
-
1.18
-
V
-
Lower Delay Switching Threshold
VCTL
-
0.25
-
V
-
Charge Current
ICT
-
8.8
-
μA
VCT = 0.5 V
Delay time L→H
TPOR
10
14
18
ms
CCT = 0.1 μF (1)
RO L Voltage
VROL
-
-
0.4
V
RO pull-up resister ≥ 4.7 kΩ
VO ≥1V
(1) TPOR can be varied by changing the CT capacitance value. ( 0.001µF to 10 µF available )
TPOR (ms) ≈ TPOR0 ( the reset delay time at CCT = 0.1 µF ) × CCT (μF) / 0.1
example: When CCT= 1µF, 100ms ≤ TPOR ≤ 180 ms
CT capacitor : 0.1µF ≤ CCT ≤ 10
TPOR (ms) ≈ TPOR0 ( the reset delay time at CCT = 0.1 µF ) × CCT (μF) / 0.1 ±0.1
example: When CCT= 0.01µF, 0.9ms ≤ TPOR ≤ 1.9 ms
CT capacitor : 0.001µF ≤ CCT < 0.1 μF
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Datasheet
BD4275FPJ-C
6
6
5
5
Output Voltage : VO [V]
Output Voltage : VO [V]
Typical Performance Curves ( Unless otherwise specified , Tj = 25 °C, VCC = 13.5 V )
4
3
2
4
3
2
Tj = -40℃
1
1
0
0
Tj = 25℃
Tj = 125℃
0
10
20
30
40
0
4
6
8
10
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 5. Output Voltage vs Supply Voltage
(RL = 25 Ω)
Figure 6. Output Voltage vs Supply Voltage
(at Low supply voltage, RL = 25 Ω)
1000
5.2
5.1
800
Circuit Current :ICC [μA]
Output Voltage : VO [V]
2
5.0
4.9
4.8
600
400
200
4.7
4.6
-40
0
40
80
0
120
0
Junction Temperature : Tj [℃]
20
30
40
Supply Voltage : VCC [V]
Figure 7. Output Voltage vs Temperature
(RL = 1 kΩ)
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Figure 8. Circuit Current vs Supply voltage
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Typical Performance Curves
( Unless otherwise specified , Tj = 25 °C, VCC = 13.5 V ) -Continued
80
120
Circuit Current :ICC [μA]
150
Circuit Current :ICC [μA]
100
60
40
90
60
30
20
0
0
0
100
200
300
400
-40
500
0
80
120
Junction Temperature : Tj [℃]
Output Current : IO [mA]
Figure 9. Circuit Current vs Output Current
Figure 10. Circuit Current vs Temperature
1000
6
5
800
Output Current : IO [mA]
Output Voltage: VO [V]
40
4
3
2
600
400
200
1
0
0
0
200
400
600
800
-40
1000
Output Current : IO [mA]
40
80
120
Junction Temperature : Tj [℃]
Figure 11. Output Voltage vs Output Current
(Over Current Protection)
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Figure 12. Output Current vs Temperature
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Datasheet
BD4275FPJ-C
Typical Performance Curves ( Unless otherwise specified , Tj = 25 °C, VCC = 13.5 V ) -Continued
600
6
Tj = -40℃
Tj = 25℃
5
Tj = 125℃
400
Output Voltage:VO [V]
Drop Voltage : △Vd [mV]
500
300
200
100
4
3
2
1
0
0
0
100
200
300
400
500
100
125
Output Current : IO [mA]
150
175
200
Junction Temperature : Tj [℃]
Figure 14. Output Voltage vs Temperature
(Thermal Shut Down)
Figure 13. Drop voltage vs Output Current
(VCC = 4.75 V)
6
4.8
Tj = -40℃
5
Output Detecting Voltage : VRT [V]
Tj = 25℃
RO Voltage : VRO [V]
Tj = 125℃
4
3
2
1
4.7
4.6
4.5
4.4
4.3
0
0
1
2
3
4
5
-40
6
40
80
120
Junction Temperature : Tj [℃]
VO voltage : VO [V]
Figure 15. RO Voltage vs VO Voltage
(RO: 10 kΩ pull-up to VO)
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Figure 16. Output Detecting Voltage vs Temperature
(RO: 10 kΩ pull-up to VO)
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Datasheet
BD4275FPJ-C
Typical Performance Curves
( Unless otherwise specified , Tj = 25 °C, VCC = 13.5 V ) -Continued
10000
1000
Power On Reset Time : TPOR [ms]
Power On Reset Time : TPOR [ms]
18
16
14
12
10
-40
0
40
80
10
1
0.1
0.01
0.001
120
Junction Temperature : Tj [℃]
0.01
0.1
1
10
CT Capacitance : CCT [μF]
Figure 18. Power on Reset Time vs CT Capacitance
Figure 17. Power on Reset Time vs Temperature
(CCT = 0.1 µF)
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Measurement circuit for Typical Performance Curves
VCC
VO
VO
VCC
VO
VCC
A
A
CT
RO
CT
GND
RL
0.1 µF
4.7 µF
10 µF
V
4.7 µF
Measurement circuit for
Figure.5, 6, 7, 8, 10, 14
RO
CT
GND
0.1 µF
A
RO
GND
A
10µF
4.7 µF
Measurement circuit for
Figure.9
0.1 µF
10 µF
Measurement circuit for
Figure.11, 12
V
VCC
VO
VCC
VO
A
CT
RO
CT
GND
4.7 µF
0.1 µF
VCC
VO
CT
RO
10kΩ
10kΩ
RO
GND
GND
Monitor
V
10 µF
4.7 µF
Measurement circuit for
Figure.13
CCT
0.1 µF
Measurement circuit for
Figure.15, 16
Measurement circuit for
Figure.17, 18
Figure 19. Measurement circuit for Typical Performance Curves
Timing Chart
13.5 V
VCC
0V
VREC (1)
5V
0V
VO
VRU (2)
VRT
≈ VO
0V
VCT
VCTH
VCTL
≈ VO
0V
VRO
(1)
(2)
VREC = VRT + VRHY
VRU = 2V to 3.5 V
Figure 20. Timing Chart
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Power Dissipation
■TO263-5F
10
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
④8.0W
Power dissipation: Pd [W]
8
6
③5.0W
4
②2.3W
2
①1.9W
0
0
25
50
75
100
125
Ambient Temperture: Ta[˚C]
150
①: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
②: 2-layer PCB
(Copper foil area on the reverse side of PCB: 15.0mm × 15.0 mm)
③: 2-layer PCB
(Copper foil area on the reverse side of PCB: 74.2mm × 74.2 mm)
④: 4-layer PCB
(2inner layers and copper foil area on the reverse side of PCB:
74.2mm × 74.2 mm)
Figure 21. Package data of TO263-5F
■TO252-J5F
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 114.3 mm × 76.2 mm × 1.6 mmt
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
10
Power Dissipation: Pd [W]
8
④6.5 W
6
③4.1 W
4
②1.8 W
2
①1.3 W
0
0
25
50
75
100
125
150
①: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
②: 2-layer PCB
(Copper foil area on the reverse side of PCB: 15.0mm × 15.0 mm)
③: 2-layer PCB
(Copper foil area on the reverse side of PCB: 74.2mm × 74.2 mm)
④: 4-layer PCB
(2 inner layers and copper foil area on the reverse side of PCB:
74.2mm × 74.2 mm)
Ambient Temperature: Ta [°C]
Figure 22. Package data of TO252-J5F
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Datasheet
BD4275FPJ-C
Thermal Design
Refer to the heat mitigation characteristics illustrated in Figure 21, 22 and the power dissipation under actual operating
conditions should be taken into consideration and a sufficient margin should be allowed for in the thermal design. The
amount of heat generated depends on the voltage difference across the input and output, load current, and bias current.
Therefore, when actually using the chip, ensure that the generated heat does not exceed the Pd rating. Even if the
ambient temperature Ta is at 25 °C, it is possible that the junction temperature Tj reaches high temperatures. Keep the
whole operating temperature range within Tj ≤ Tjmax.
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the
IC is mounted on a 114.3mm × 76.2mm × 1.6mmt glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.
VCC
VO
IO
ICC
Pc
:
:
:
:
:
Input Voltage
Output Voltage
Load Current
Circuit Current
Power Consumption
Ta
Tc
Tj
θjc
:
:
:
:
Ambient Temperature
Case Temperature
Junction Temperature
Thermal Resistance (Junction to Case (bottom))
The following method is used to calculate the power consumption Pc (W)
Pc = ( VCC - VO ) × IO + VCC × ICC
Power dissipation Pd ≥ Pc
The load current IO is obtained by operating the IC within the power dissipation range.
IO ≤
Pd - VCC × ICC
(Refer to Figure 10 for the ICC.)
VCC - VO
Thus, the maximum load current IOmax for the applied voltage VCC can be calculated during the thermal design process.
The following method is also used to calculate the junction temperature Tj.
Tj = Pc × θjc + Tc
■TO263-5F
・Calculation example :
with TO263-5F package , Ta = 105 °C, VCC = 13.5 V, VO = 5.0 V, board ③ (Figure 21.)
1.8 W – 13.5 V × 80 µA
IO ≤
13.5 V – 5.0 V
( ICC = 80 µA )
IO ≤ 211 mA
Pd at over 25 °C is calculated by below.
Pd = (Pd at 25 °C) × (150 - Ta) / (150 - 25)
In case of board③ in Figure 21, Ta = 105 °C
Pd = 1.8 W
At Ta = 105 °C with Figure 21 ③ condition, the calculation shows that 211 mA of output current is possible at 8.5 V
potential difference across input and output.
・Calculation example :
with Tc (bottom) = 80 °C, VCC = 13.5 V, VO = 5.0 V, IO = 200 mA, board ③ (Figure 21.)
Pc of the IC can be calculated as follows:
Pc = ( VCC - VO ) × IO + VCC × ICC
Pc = ( 13.5 V - 5.0 V ) × 200 mA + 13.5 V × ICC
Pc = 1.7 W
( ICC = 80 µA )
In case the power consumption Pc is 1.7 W, the junction temperature Tj can be calculated as follows:
Tj = Pc × θjc + Tc
Tj = 1.7 W × θjc + 80 °C
Tj = 81.7 °C
( θjc (bottom) = 1 °C / W
Refer to Page 4 Thermal Design)
The junction temperature is 81.7 °C, at above condition.
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Selection of Components Externally Connected
・VCC pin capacitor
Insert capacitors with a capacitance of 0.1 μF or higher between the VCC and GND pin. We recommend using
ceramic capacitor generally featuring good high frequency characteristic. When selecting a ceramic capacitor, please
be consider about temperature and DC - biasing characteristics. Place capacitors closest possible to VCC - GND pin.
When input impedance is high, e.g. in case there is distance from battery, line voltage drop needs to be prevented by
large capacitor. Choose the capacitance according to the line impedance between the power smoothing circuit and
the VCC pin. Selection of the capacitance also depends on the applications. Verify the application and allow sufficient
margins in the design. We recommend using a capacitor with excellent voltage and temperature characteristics.
・Output pin capacitor
In order to prevent oscillation, a capacitor needs to be placed between the output pin and GND pin. We recommend
using a ceramic capacitor with a capacitance of 6 μF or higher. In selecting the capacitor, ensure that the capacitance
of 6 μF or higher is maintained at the intended applied voltage and temperature range. Due to changes in
temperature the capacitor's capacitance can fluctuate possibly resulting in oscillation.
In actual applications the stable operating range is influenced by the PCB impedance, input supply impedance and
load impedance. Therefore verification of the final operating environment is needed. When selecting a ceramic
capacitor, we recommend using X7R or better components with excellent temperature and DC - biasing
characteristics and high voltage tolerance.
In case of the transient input voltage and the load current fluctuation, output voltage may fluctuate. In case this
fluctuation can be problematic for the application, connect low ESR capacitor (capacitance > 6 μF, ESR < 1 Ω) in
paralleled to large capacitor with a capacitance of 13 μF or higher and ESR of 5 Ω or lower. Electrolytic and tantalum
capacitors can be used as large capacitor. When selecting an electrolytic capacitor, please consider about increasing
ESR and decreasing capacitance at cold temperature.
Place the capacitor closest possible to output pin.
I/O equivalence circuits
1 VCC
2 RO
VCC
100 Ω (Typ)
IC
4 CT
5 VO
20 kΩ (Typ)
1500 kΩ
(Typ)
6 Ω (Typ)
500 kΩ
(Typ)
Figure 23. I / O equivalence circuits
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Application Examples
・Applying positive surge to the VCC
If the possibility exists that surges higher than 45 V will be applied to the VCC, a Zener Diode should be placed between
the VCC and GND as shown in the figure below.
VCC
VO
GND
Figure 24. Application Example 1
・Applying negative surge to the VCC
If the possibility exists that negative surges lower than the GND are applied to the VCC, a Shottky Diode should be place
between the VCC and GND as shown in the figure below.
Figure 25. Application Example 2
・Implementing a Protection Diode
If the possibility exists that a large inductive load is connected to the output pin resulting in back-EMF at time of startup and
shutdown, a protection diode should be placed as shown in the figure below.
Figure 26. Application Example 3
・Reverse Polarity Diode
In some applications, the VCC and the VO potential might be reversed, possibly resulting in circuit internal damage or
damage to the elements. For example, the accumulated charge in the output pin capacitor flowing backward from the VO
to the VCC when the VCC shorts to the GND. In order to minimize the damage in such case, use a capacitor with a
capacitance less than 1000 μF. Also by inserting a reverse polarity diode in series to the VCC, it can prevent reverse
current from reverse battery connection or the case. When the point A is short-circuited GND, if there may be any possible
case point B is short-circuited to GND, we also recommend using a bypass diode between the VCC and the VO.
Reverse Polarity Diode
Bypass Diode
A
Figure 27. Application Example 4
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
The power dissipation under actual operating conditions should be taken into consideration and a sufficient margin
should be allowed for in the thermal design. On the reverse side of the package, the IC has an exposed heat pad for
improving the heat dissipation. Use both the front and reverse side of the PCB to increase the heat dissipation pattern
as far as possible. The amount of heat generated depends on the voltage difference across the input and output, load
current, and bias current. Therefore, when actually using the chip, ensure that the generated heat does not exceed the
Pd rating.
Should by any condition the maximum junction temperature Tjmax = 150 °C rating be exceeded by the temperature
increase of the chip, it may result in deterioration of the properties of the chip. The thermal impedance in this
specification is based on recommended PCB and measurement condition by JEDEC standard. Verify the application
and allow sufficient margins in the thermal design.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
9.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Operational Notes – continued
10. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
11. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
12. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
13. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
14. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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TSZ02201-0G1G0AN00410-1-2
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Physical Dimension Tape and Reel Information
Package Name
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TSZ22111・15・001
TO263-5F
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Physical Dimension Tape and Reel Information – continued
Package Name
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TSZ22111・15・001
TO252-J5F
18/20
TSZ02201-0G1G0AN00410-1-2
20.May.2015 Rev.004
BD4275FP2-C
Datasheet
BD4275FPJ-C
Ordering Information
B
D
4
2
7
Part Number
5
x
x
x
-
Package
FP2: TO263-5F
FPJ: TO252-J5F
C
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
TO263-5F (TOP VIEW)
Part Number Marking
BD4275FP2
LOT Number
1Pin
TO252-J5F (TOP VIEW)
Part Number Marking
B D 4 2 7 5 J
LOT Number
1Pin
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BD4275FP2-C
Datasheet
BD4275FPJ-C
Revision History
Date
5.Apr.2013
Revision
Changes
001
New Release
25.Sep.2013
002
P5 The condition of RO L Voltage at Electrical Characteristics was changed.
P10 The Timing Chart was corrected.
P11 The statement of “Reference Data” of Package data of TO263-5F and TO252-J5F
was deleted.
P13 The information of “Output pin capacitor” was changed.
P15 The information of “Operational Notes” was changed.
P17 TO263-5F quantity written in “Tape and reel information” was corrected.
P18 TO252-J5F physical dimension was corrected.
29.Nov.2013
003
P11 The package data of TO263-5F was corrected.
P16 The information of “Operational Notes” was changed.
004
P1 Key Specifications (Reset Detect Voltage) was corrected.
P1 AEC-Q100 grade was added.
P1 The information of VCC and VO pin capacitors at Typical Application Circuit was
added.
P4 Revised expression on annotation of Thermal Resistance.
P11 Revised expression on the PCB information of Power Dissipation.
P13 Revised expression on the information of VCC pin and Output pin capacitors.
P14 Added description on Reverse Polarity Diode.
P15 Revised expression on the information of Thermal Consideration.
P17 TO263-5F Direction of feed written in “Tape and reel information” was corrected.
20.May.2015
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TSZ02201-0G1G0AN00410-1-2
20.May.2015 Rev.004
Datasheet
Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
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Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001