Multi-channel System
Power Supply IC
for Small to Middle PANEL
BD8184MUV
or
Power Supply ICs for TFT-LCD Panels
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No.11035EBT19
Description
The BD8184MUV is a system power supply for the TFT-LCD panels used for liquid crystal Monitors and Note Display.
Incorporates high-power FET with low on resistance for large currents that employ high-power packages, thus driving large
current loads while suppressing the generation of heat. A charge pump controller is incorporated as well, thus greatly
reducing the number of application components. Also Gate Shading Function is included.
Features
1) Boost DC/DC converter; 18 V / 2.5 A switch current. (Target specification is ±1% accurate.)
2) Switching frequency: 1.2 MHz
3) Operational Amplifier (short current 200mA)
4) Incorporates Positive / Negative Charge-pump Controllers.
5) Gate Shading Function
6) VQFN024V4040 Package (4.0 mm x 4.0 mm)
7) Protection circuits: Under Voltage Lockout Protection Circuit
Thermal Shutdown Circuit (Latch Mode)
Over Current Protection Circuit (AVDD)
Timer Latch Mode Short Circuit Protection (AVDD SRC VGL)
Over / Under Voltage Protection Circuit for Boost DC/DC Output
No SCP time included (160ms from UVLO-off)
N
ot
R
Applications
Power supply for the TFT-LCD panels used for LCD Monitors and Note Display
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© 2012 ROHM Co., Ltd. All rights reserved.
1/17
2012.06 - Rev.B
Technical Note
BD8184MUV
Symbol
LIMIT
Unit
Supply Voltage 1
VIN
+7
V
Supply Voltage 2
AVDD
+20
V
Supply Voltage 3
SRC
+36
V
Switching Voltage
SW, DRP, DRN
+20
V
Input Voltage 1
RSTIN, DLY, CTL, FB, FBP, FBN
VIN+0.3
V
Input Voltage 2
INN, INP
+20
Output Voltage 1
RST, COMP, VREF
+7
Output Voltage 2
VCOM
+20
or
●Absolute Maximum Ratings (TA = 25℃)
Output Voltage 3_1
GSOUT
+36
V
Output Voltage 3_2
SRC - GSOUT
+40
V
Tama
150
℃
V
V
V
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Parameter
Junction Temperature
Power Dissipation
*1
Pd
3560
mW
Operating Temperature Range
Topr
-40~85
℃
Storage Temperature Range
Tstg
-55~150
℃
*1 Derating in done 28.5mW/℃ for operating above Ta≧25℃(On 4-layer 74.2mm×74.2mm×1.6mm board)
●Operating Range (Ta=-40℃~85℃)
Symbol
MIN
MAX
Unit
Supply Voltage 1
VIN
2.0
5.5
V
Supply Voltage 2
AVDD
6
18
V
Supply Voltage 3
SRC
12
34
V
N
ot
R
Parameter
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© 2012 ROHM Co., Ltd. All rights reserved.
2/17
2012.06 - Rev.B
Technical Note
BD8184MUV
●Electrical characteristics (unless otherwise specified VIN = 3.3V, AVDD = 10V and TA=25℃)
Limits
Parameter
Symbol
Unit
Condition
Min
Typ
Max
GENERAL
-
1.2
3
mA
No Switching
Under Voltage Lockout Threshold
VUVLO
1.75
1.85
1.95
V
VIN rising
Internal Reference Output
Voltage
VREF
1.238
1.250
1.262
V
No load
Thermal Shutdown (rising)
TSD
-
160
-
℃
Duration to Trigger Fault
Condition
TSCP
-
55
-
ms
VFB
1.238
1.250
1.262
V
Voltage rising
VTL_FB
0.95
1.0
1.05
V
VFB falling
FB Input Bias Current
IFB
-
0.1
1
µA
VFB= 1.5V
SW Leakage Current
ISW_L
-
0
10
µA
VSW=20V
Maximum switching Duty Cycle
MDUTY
85
90
95
%
VFB= 1.0V
RSW
-
200
-
mΩ
SW Current Limit
ISWLIM
2.5
-
-
A
Over Voltage Protection
VOVP
-
20
-
V
AVDD rising
Under Voltage Protection
VUVP
1.3
1.6
1.9
V
AVDD falling
TSS_FB
-
13.6
-
ms
FSW
1.0
1.2
1.4
MHz
VRST
-
0.05
0.2
V
IRST =1.2mA
RSTIN Threshold Voltage
VTH_L
1.18
1.25
1.32
V
RSTIN falling
RSTIN Input Current
IRSTIN
-
0
-
µA
VRSTIN=0 to VIN-0.3
TNO_SCP
146
163
180
ms
No SCP Zone
VRANGE
0
-
AVDD
V
Offset Voltage
VOS
-
2
15
mV
VINP= 5.0V
Input Current
IINP
-
0
-
µA
VINP= 5.0V
VOH
-
5.03
5.06
V
ICOM = +50mA
VOL
4.94
4.97
-
V
ICOM = -50mA
ISHT_VCOM
-
200
-
mA
SR
-
40
-
V/us
or
IVIN
Junction Temp
FB , FBP or FBN
below threshold
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Circuit Current
BOOST CONVERTER (AVDD)
FB Regulation Voltage
FB Fault Trip Level
SW ON-Resistance
BOOST Soft Start Time
Oscillator frequency
RESET
ot
R
RST Output Low Voltage
RST Blanking Time
ISW= 200mA
N
Operational Amp rifer
Input Range
Output Swing Voltage
(VINP= 5.0V)
Short Circuit Current
Slew Rate
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© 2012 ROHM Co., Ltd. All rights reserved.
3/17
2012.06 - Rev.B
Technical Note
BD8184MUV
●Electrical characteristics (unless otherwise specified VIN = 3.3V, AVDD = 10V and TA=25℃) (Continued)
Limits
Parameter
Symbol
Unit
Condition
Min
Typ
Max
Negative Charge pump driver (VGL)
VFBN
241
265
289
mV
VTL_FBN
400
450
500
mV
VFBN rising
FBN Input Bias Current
IFBN
-
0.1
1
µA
VFBN= 0.1V
Oscillator frequency
FCPN
500
600
700
kHz
DRN Leakage Current
IDRN_L
-
0
10
µA
VFBP
1.23
1.25
1.27
V
VTL_FBP
0.95
1.0
1.05
V
VFBP falling
FBP Input Bias Current
IFBP
-
0.1
1
µA
VFBP= 1.5V
Oscillator frequency
FCPP
500
600
700
kHz
DRP Leakage Current
IDRP_L
-
0
10
µA
Soft-Start Time
TSSP
-
3.4
-
ms
IDLY
4
5
6
µA
DLY Threshold Voltage
VTL_DLY
1.22
1.25
1.28
V
CTL Input Voltage High
VIN_H
2.0
-
-
V
CTL Input Voltage Low
VIN_L
-
-
0.5
V
CTL Input Bias Current
ICTL
-
0
-
µA
VRSTIN=0 to VIN-0.3
TGS_R
-
100
-
ns
VSRC= 25V
Propagation delay time (Falling)
TGS_F
-
100
-
ns
VSRC= 25V
SRC -GSOUT ON Resistance
RGS_H
-
15
-
Ω
VDLY = 1.5V
GSOUT-RE ON Resistance
RGS_M
-
30
-
Ω
VDLY = 1.5V
GSOUT-GND ON Resistance
RGS_L
-
2.5
-
kΩ
VDLY = 1.0V
VFBN=1.0V
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FBN Fault Trip Level
or
FBN Regulation Voltage
Positive Charge pump driver (SRC)
FBP Regulation Voltage
FBP Fault Trip Level
VFBP= 1.5V
Gate Shading Function (GSOUT)
DLY Source Current
N
ot
R
Propagation delay time (Rising)
VDLY falling
○This product is not designed for protection against radio active rays.
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© 2012 ROHM Co., Ltd. All rights reserved.
4/17
2012.06 - Rev.B
Technical Note
BD8184MUV
●Electrical characteristic curves (Reference data)
(Unless otherwise specified VIN = 3.3V, AVDD = 10V and TA=25℃)
50
2.0
1.40
45
40
25℃
1.30
85℃
35
85℃
30
IVIN [mA]
IVIN [mA]
1.2
25℃
25
-40℃
0.8
Fsw [MHz]
1.6
-40℃
20
15
1.10
or
0.4
10
5
0.0
1.00
0
0
1
2
3
4
5
-40
0
1
2
3
4
5
-15
10
35
60
85
Ta [℃]
VIN [V]
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VIN [V]
Fig.1 Circuit Current
Fig.2 Circuit Current
Fig.3 Dependent on Temperature
(No switching)
(Switching)
Frequency
1.30
1.40
1.30
1.29
1.28
1.30
85℃
1.27
25℃
1.25
1.26
1.20
VREF [V]
VREF [V]
Fsw [MHz]
1.20
1.25
1.24
1.10
-40℃
1.23
85℃
1.21
2
2.5
3
3.5
4
4.5
5
5.5
1.15
1.20
2
VIN [V]
2.5
3
3.5
4
4.5
5
0
5.5
5
10
VIN [V]
Fig.4 Dependent on Input
-40℃
1.20
1.22
1.00
25℃
15
20
25
30
IVREF[mA]
Fig.5 VREF Line Regulation
Fig.6 VREF Load Regulation
Voltage Frequency
85℃
80
60
10
6
6
2
-40℃
40
20
ICOMP [uA]
-2
2
-2
0
0
R
-6
1
2
VCOMP [V]
3
N
ot
Fig.7 COMP V.S.CDUTY
-6
-10
-10
0
1
2
VCOMP [V]
3
0
Fig.8 COMP Sink Current
1
2
VCOMP [V]
3
Fig.9 COMP Source Current
100
IAVDD
IAVDD
90
Efficiency [%]
Duty [%]
25℃
10
ICOMP [uA]
100
AVDD
AVDD
80
VIN=3.3V
AVDD=9.8V
Fsw=1.177MHz
VGH,VGL→NoLoad
70
60
0
100
200
300
400
500
IAVDD [mA]
Fig.10 Load Transient Response
Fig.11 Load Transient Response
Fig.12 Boost Converter
Falling
Rising
Efficiency
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© 2012 ROHM Co., Ltd. All rights reserved.
5/17
2012.06 - Rev.B
Technical Note
BD8184MUV
●Electrical characteristic curves (Reference data) – Continued
(Unless otherwise specified VIN = 3.3V, AVDD = 10V and TA=25℃)
10
VINP
VINP
INN=VCOM
INN=VCOM
0.1
0.01
or
DLY Time [s]
1
0.001
0.001
0.01
0.1
1
10
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C_DLY [uF]
Fig.13 VCOM Slew Rate
(Rising)
CTL
Fig.14 VCOM Slew Rate
Fig.15 C_DLY vs. delay time
(falling)
CTL
GSOUT(RE pull down to AVDD)
GSOUT(RE pull down to GND)
Fig. 16 Gate Shading Wave form1
Fig.17 Gate Shading Wave form2
SRC
AVDD
VIN
VGL
Fig.18 Power On Sequence1
(Main Output)
SRC
SRC
AVDD
AVDD
VIN
DLY
CTL
VIN
VIN
GSOUT
GSOUT
RST
RST
R
GSOUT
Fig.20 Power Off Sequence1
(R_RST_U=10k,R_RST_D=10k)
Fig.21 Power Off Sequence2
(R_RST_U=10k,R_RST_D=OPEN)
N
ot
Fig.19 Power On Sequence2
(CTL=signal, RE pull down to AVDD)
SRC
AVDD
VIN
VGL
Fig.22 Power On Sequence3
(Main Output)
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© 2012 ROHM Co., Ltd. All rights reserved.
6/17
2012.06 - Rev.B
Technical Note
BD8184MUV
●Block Diagram
●Pin Configuration
Digital Control
Block
1.25V
16
INP
PGND
Comparator
SW
PGND
20
19
2
3
RE
20
1
18
COMP
18
PGND
17
FB
16
COMP
15
RSTIN
14
AGND2
13
VIN
PGND
Current Sense and
Limit
Oscillator
INN
19
Sequence
Control
AVDD
VCOM
5
2
or
17
24
SW
Error Amplifier
FB
21
Fall/Thermal
Control
GSOUT
Fall
23
(1.25V)
DLY
12
0.265V
Reference
Voltage
SRC
VIN
VREF
22
13
3
BD8184MUV
Negative
Charge Pump
1.25V
21
RE
GSOUT
22
DRP
6
AGND1
AVDD
VCOM
SRC
11
FBN
High Voltage
Switch Control
10
4
VREF
AGND1
12
3
FBP
CTL
5
6
9
DLY
AVDD
DRP
RST
8
AVDD
Positive
Charge pump
CTL
24
INP
AGND1
8
1
INN
7
7
2
4
DRN
DRN
FBP
10
AGND1
AVDD
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0.265V
FBN
11
23
RST
Fig.24 Pin Configuration
9
1.25V
RSTIN
15
160ms
14
AGND2
Fig.23 Block Diagram
●Package Dimension
VQFN024V4040
4.0±0.1
R
4.0±0.1
Marking
D8184
1.0MAX
0.08 S
2.4±0.1
1
6
0.4±0.1
24
7
12
19
18
0.75
0.5
2.4±0.1
C0.2
(0.22)
S
+0.03
0.02 -0.02
N
ot
LOT
1PIN MARK
13
+0.05
0.25 -0.04
(Unit : mm)
Fig.25 Package Dimension (UNIT : mm)
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© 2012 ROHM Co., Ltd. All rights reserved.
7/17
2012.06 - Rev.B
Technical Note
BD8184MUV
●Pin Assignments
Pin name
Function
1
INP
COM Amplifier input +
2
INN
COM Amplifier input -
3
VCOM
COM Amplifier output
4
AGND1
Ground
5
AVDD
Supply voltage input for com, charge pump
6
DRP
Drive pin of the positive charge pump
7
DRN
Drive pin of the negative charge pump
8
CTL
High voltage switch control pin
9
RST
Open drain reset output
10
FBP
Positive charge pump feed back
11
FBN
Negative charge pump feed back
12
VREF
Internal Reference voltage output
13
VIN
Supply voltage input for PWM
14
AGND2
Ground
15
RSTIN
Reset comparator input
16
COMP
BOOST amplifier output
17
FB
BOOST amplifier input
18
PGND1
BOOST FET ground
19
PGND2
BOOST FET ground
20
SW
BOOST FET Drain
21
RE
Gate High voltage Fall set pin
22
GSOUT
Gate High voltage output set pin
23
SRC
Gate High voltage input set pin
24
DLY
GSOUT Delay Adjust pin
N
ot
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or
PINNO.
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© 2012 ROHM Co., Ltd. All rights reserved.
8/17
2012.06 - Rev.B
Technical Note
BD8184MUV
●Main Block Function
・Boost Converter
A controller circuit for DC/DC boosting.
The switching duty is controlled so that the feedback voltage FB is set to 1.25 V (typ.).
A soft start operates at the time of starting.
・Positive Charge Pump
A controller circuit for the positive-side charge pump.
The switching amplitude is controlled so that the feedback voltage FBP will be set to 1.25 V (typ.).
or
・Negative Charge Pump
A controller circuit for the negative-side charge pump.
The switching amplitude is controlled so that the feedback voltage FBN will be set to 0.265 V (Typ.).
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・Gate Shading Controller
A controller circuit for P-MOS FET Switch
The GSOUT switching synchronize with CTL input.
When VIN drops below UVLO threshold or RST=Low(=RSTIN
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