Headphone Amplifiers
Coupling Capacitorless Headphone Amplifiers
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
No.11102EAT05
●Description BD88xxxGUL is output coupling capacitorless headphone amplifier. This IC has a negative voltage generator of regulated type built-in and generates the direct regulated negative voltage from the supply voltage. It is possible to drive headphones in a ground standard with both voltage of the positive voltage (+2.4V) and the negative voltage (-2.4V). Therefore a large-capacity output coupling capacitor becomes needless and can reduce a cost, a board area, and the height of the part. In addition, there is not the signal decrement by the low range to happen by output coupling capacitor and output load impedance and can output a rich low tone. And, the function “Virtual ground” is embedded. Noise between IC and Headphone jack can be canceled by using “Virtual ground” function. ●Features 1) 2.4V to 5.5V Single-Supply Operation 2) No Bulky DC-Blocking Capacitors Required 3) No Degradation of Low-Frequency Response Due to Output Capacitors 4) Virtual Ground-Referenced Outputs 5) Gain setting BD88200GUL: Variable gain with external resistors BD88210GUL: -1.0V/V BD88215GUL: -1.5V/V BD88220GUL: -2.0V/V 6) Low THD+N 7) Low Supply Current 8) Integrated Negative Power Supply 9) Integrated Short-Circuit and Thermal-Overload Protection 10) Small package VCSP50L2 (2.1mm x 2.1mm) ●Applications Mobile Phones, Smart Phones, PDAs, Portable Audio Players, PCs, TVs, Digital Cameras, Digital Video Cameras, Electronic Dictionaries, Voice Recorders, Bluetooth Head-sets, etc ●Line up Type BD88200GUL BD88210GUL BD88215GUL BD88220GUL Supply Supply Voltage Current [V] [mA] Gain [V/V]
Variable gain with external resister
Maximum Output Power [mW]
THD+N [%]
Noise Voltage [µVrms]
PSRR [dB]
Package
2.4～5.5 (No2.0 signal)
-1.0 -1.5 -2.0
80
0.006
(VDD=3.3V,RL=16Ω (VDD=3.3V,RL=16Ω THD+N≦1%,f=1kHz) Po=10mW,f=1kHz)
10
-80
(f=217Hz)
VCSP50L2
(2.1mm x 2.1mm)
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1/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Absolute maximum ratings Parameter SGND to PGND voltage SVDD to PVDD voltage SVSS to PVSS voltage SGND or PGND to SVDD, PVDD voltage SVSS, PVSS to SGND or PGND voltage SGND to IN_- voltage SGND to OUT_- voltage PGND to C1P- voltage PGND to C1N- voltage SGND to SHDN_B- voltage Input current Power Dissipation Storage Temperature Range
*
Technical Note
Symbol VGG VDD VSS VDG VSG VIN VOUT VC1P VC1N VSH IIN PD TSTG
Ratings 0.0 -0.3～0.3 0.0 -0.3～6.0 -3.5～0.3 (SVSS-0.3)～2.8 (SVSS-0.3)～2.8 (PGND-0.3)～(PVDD+0.3) (PVSS-0.3)～(PGND+0.3) (SGND-0.3)～(SVDD+0.3) -10～10 1350 * -55～150
Unit V V V V V V V V V V mA mW ℃
In operating over 25 ℃, de-rate the value to 10.8mW/℃. This value is for mounted on the application board (Grass-epoxy, size: 40mm x 60mm, H=1.6mm, Top Copper area = 79.9%, Bottom Copper area = 80.2%).
●Operating conditions Parameter Supply Voltage Range Operating Temperature Range Symbol VSVDD,VPVDD TOPR Ratings Min. 2.4 -40 Typ. Max. 5.5 +85 Unit V ℃
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2/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
●Electrical characteristics Unless otherwise specified, Ta=25℃, SVDD=PVDD=3.3V, SGND=PGND=0V, SHDNB=SVDD, C1=C2=2.2µF, RL=No Load, Ri=Rf=10kΩ Limits Parameter Symbol Unit Conditions Min. Typ. Max. Supply Current Shutdown Supply Current IST IDD1 Quiescent Supply Current IDD2 SHDN_B Terminal H Level Input Voltage L Level Input Voltage Input Leak Current Headphone Amplifier Shutdown to Full Operation Offset Voltage tSON VIS 30 Maximum Output Power POUT 40 Total Harmonic Distortion + Noise Input Impedance BD88200GUL BD88210GUL Gain BD88215GUL BD88220GUL Gain match Noise Slew Rate Maximum Capacitive Load Crosstalk Power Supply Rejection Ratio Charge-Pump Oscillator Frequency Thermal-Shutdown Threshold Thermal-Shutdown Hysteresis ΔAV VN SR CL CT PSRR fOSC TSD THYS AV -1.55 -2.06 200 -1.50 -2.00 1 10 0.15 200 -90 -80 300 145 5 -1.45 -1.94 430 % µVrms V/µs pF dB dB kHz ℃ ℃ RL=32Ω, f=1kHz, VOUT=200mVP-P, 1kHz BPF f=217Hz, 100mVP-P‐ripple, 217Hz BPF 20kHz LPF + JIS-A THD+N ZIN 10 -1.05 0.006 14 -1.00 -1.00 0.100 19 -0.95 V/V In BD88200GUL, Gain is variable by the external resister of Ri and Rf. % kΩ 80 0.008 0.056 mW % 80 ±0.5 60 ±5.0 µs mV mW RL=32Ω, THD+N≦-40dB, f=1kHz, 20kHz LPF, for Single Channel RL=16Ω, THD+N≦-40dB, f=1kHz, 20kHz LPF, for Single Channel RL=32Ω, POUT=10mW, f=1kHz, 20kHz LPF RL=16Ω, POUT=10mW, f=1kHz, 20kHz LPF SHDNLB=SHDNRB=H In BD88200GUL, ZIN = Ri SHDNLB=SHDNRB=L→H VIH VIL ILEAK 1.95 0.70 ±1 V V µA 2.0 7.4 mA 0.1 1.3 2 µA mA SHDNLB=SHDNRB=L (SHDNLB,SHDNRB)=(H,L) or (L,H), No signal SHDNLB=SHDNRB=H, No signal
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3/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
●Electrical characteristic curves – General Items (Reference data) Unless otherwise specified, Ta=25℃, SGND=PGND=0V, SHDNLB=SHDNRB=SVDD, C1=C2=2.2µF, Input coupling capacitor=1µF, RL=No Load * In BD88200GUL the input resister(Ri)=10kΩ, feedback resister(Rf)=10kΩ.
1u 4.0 4.0
SHDNLB=0V SHDNRB=0V
Operating Current [mA] Standby Current [A] 100n 3.0
* This caracteristics has hysteresis (40mV typ) by UVLO.
Operating Current [mA]
SHDNLB=VDD SHDNRB=0V
SHDNLB=VDD SHDNRB=VDD
3.0
* This caracteristics has hysteresis (40mV typ) by UVLO.
10n
2.0
2.0
1n
1.0
1.0
0.1n 0.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0
0.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0
Supply Voltage [V]
Supply Voltage [V]
Supply Voltage [V]
Fig.1 Standby Current vs. Supply Voltage
0 -0.5 VSS Voltage [V] -1 -1.5 -2 -2.5 -3 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Fig.2 Monaural Operating Current vs. Supply Voltage
200 120 180 160 Setup time [us] 140 120 100 80 60 40 20 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0
Fig.3 Stereo Operating Current vs. Supply voltage
RL=16Ω, in phase RL=16Ω, out of phase
Maximum Output Power [mW]
SHDNLB=VDD SHDNRB=VDD No Load
SHDNLB=SHDNRB =L->H VSS 90% Setup time No Load
100 80 60
RL=32Ω, in phase
40 20
RL=32Ω, out of phase
THD+N≦-40dB 20kHz LPF Stereo
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Supply Voltage [V]
Supply Voltage [V]
Supply Voltage [V]
Fig.4 Negative Voltage vs. Supply Voltage
0 -10 -20 -30 PSRR [dB] PSRR [dB] -40 -50 -60 -70 -80 -90 -100 10 100 1k Frequency [Hz] 10k 100k 0
Fig.5 Setup time vs. Supply Voltage
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 10 100 1k Frequency [Hz] 10k 100k PSRR [dB]
Fig.6 Maximum power vs. Supply Voltage
-10 -20 -30 -40 -50 -60 -70 -80 -90 -100 10 100 1k Frequency [Hz] 10k 100k
VDD=2.4V Ripple = 100mVp-p BPF
VDD=3.3V Ripple = 100mVp-p BPF
VDD=5.5V Ripple = 100mVp-p BPF
Fig.7 PSRR vs. Frequency (VDD=2.4V)
0 -10 -20 -30 PSRR [dB] -40 -50 -60 -70 -80 -90 -100 10 100 1k Frequency [Hz] 10k 100k 0
Fig.8 PSRR vs. Frequency (VDD=3.3V)
-10 -20 -30 PSRR [dB] -40 -50 -60 -70 -80 -90 -100 10 100 1k Frequency [Hz] 10k 100k
Fig.9 PSRR vs. Frequency (VDD=5.5V)
0 -10 -20 -30 PSRR [dB] -40 -50 -60 -70 -80 -90 -100 10 100 1k Frequency [Hz] 10k 100k
VDD=2.4V VOUT = 200mVp-p RL=32Ω BPF
VDD=3.3V VOUT = 200mVp-p RL=32Ω BPF
VDD=5.5V VOUT = 200mVp-p RL=32Ω BPF
Fig.10 Crosstalk vs. Frequency (VDD=2.4V)
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Fig.11 Crosstalk vs. Frequency (VDD=3.3V)
Fig.12 Crosstalk vs. Frequency (VDD=5.5V)
4/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Electrical characteristic curves – BD88215GUL (Reference data)
0 -20 -40
Technical Note
Output Voltage [dBV]
Output Voltage [dBV]
Output Voltage [dBV]
VDD=2.4V f=1kHz BPF
RL=32Ω
0 -20 -40
VDD=3.3V f=1kHz BPF
RL=32Ω
0 -20 -40
VDD=5.5V f=1kHz BPF
RL=32Ω
RL=16Ω
-60 -80 -100 -120 -120
RL=16Ω
-60 -80 -100 -120 -120
RL=16Ω
-60 -80 -100 -120 -120
-100
-80
-60
-40
-20
0
-100
-80
-60
-40
-20
0
-100
-80
-60
-40
-20
0
Input Voltage [dBV]
Input Voltage [dBV]
Input Voltage [dBV]
Fig.13 Output Voltage vs. Input Voltage (VDD=2.4V)
10 8 6 4 Gain [dB] Gain [dB] 2 0 -2 -4 -6 -8 -10 10 100 1k Frequency [Hz] 10k 100k 10 8
Fig.14 Output Voltage vs. Input Voltage (VDD=3.3V)
10 8
Fig.15 Output Voltage vs. Input Voltage (VDD=5.5V)
RL=16Ω
6 4
RL=16Ω
6 4
RL=16Ω
RL=32Ω VDD=2.4V Po=10mW RL=16Ω Input coupling capacitor = 1.0uF
0 -2 -4 -6 -8 -10 10 100
RL=32Ω VDD=3.3V Po=10mW RL=16Ω Input coupling capacitor = 1.0uF
1k Frequency [Hz] 10k 100k
Gain [dB]
2
2 0 -2 -4 -6 -8 -10 10 100 1k Frequency [Hz] 10k 100k
RL=32Ω VDD=5.5V Po=10mW RL=16Ω Input coupling capacitor = 1.0uF
Fig.16 Gain vs. Frequency (VDD=2.4V)
100
Fig.17 Gain vs. Frequency (VDD=3.3V)
100 100
Fig.18 Gain vs. Frequency (VDD=5.5V)
10
10
10
THD+N [%]
THD+N [%]
THD+N [%]
1
In phase VDD=2.4V 20kHz-LPF f=1kHz Stereo RL=16 Ω
1n 100n 10u
1
In phase VDD=3.3V 20kHz-LPF f=1kHz Stereo RL=16 Ω
1n 100n 10u
1
In phase VDD=5.5V 20kHz-LPF f=1kHz Stereo RL=16 Ω
1n 100n 10u
0.1
0.1
0.1
0.01
0.01
0.01
Out of phase
0 .001 1m 100m
Out of phase
0 .001 1m 100m
Out of phase
1m 100m
0 .001
Output Power [W]
Output Power [W]
Output Power [W]
Fig.19 THD+N vs. Output Power (VDD=2.4V, RL=16Ω)
100
Fig.20 THD+N vs. Output Power (VDD=3.3V, RL=16Ω)
100
Fig.21 THD+N vs. Output Power (VDD=5.5V, RL=16Ω)
100
10
10
10
THD+N [%]
THD+N [%]
THD+N [%]
1
In phase VDD=2.4V 20kHz-LPF f=1kHz Stereo RL=32 Ω
1n 100n 10u
1
In phase VDD=3.3V 20kHz-LPF f=1kHz Stereo RL=32 Ω
1n 100n 10u
1
In phase VDD=5.5V 20kHz-LPF f=1kHz Stereo RL=32 Ω
1n 100n 10u
0.1
0.1
0.1
0.01
0.01
0.01
Out of phase
0 .001 1m 100m
Out of phase
0 .001 1m 100m
Out of phase
1m 100m
0 .001
Output Power [W]
Output Power [W]
Output Power [W]
Fig.22 THD+N vs. Output Power (VDD=2.4V, RL=32Ω)
Fig.23 THD+N vs. Output Power (VDD=3.3V, RL=32Ω)
Fig.24 THD+N vs. Output Power (VDD=5.5V, RL=32Ω)
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5/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Electrical characteristic curves – BD88215GUL (Reference data) – Continued
100 100 100
Technical Note
10
VDD=2.4V RL=16 Ω 20kHz-LPF Stereo (in phase)
THD+N [%]
10
VDD=3.3V RL=16 Ω 20kHz-LPF Stereo (in phase)
THD+N [%]
10
VDD=5.5V RL=16 Ω 20kHz-LPF Stereo (in phase) Po=0.1mW Po=1mW
THD+N [%]
1
Po=0.1mW Po=1mW
1
Po=0.1mW Po=1mW
1
0.1
0.1
0.1
0.01
0.01
0.01
0 .001 10 100 1k
Po=10mW
10k 100k
0 .001 10 100 1k
Po=10mW
10k 100k
0 .001 10 100 1k
Po=10mW
10k 100k
Frequency [Hz]
Frequency [Hz]
Frequency [Hz]
Fig.25 THD+N vs. Frequency (VDD=2.4V, RL=16Ω)
100
Fig. 26 THD+N vs. Frequency (VDD=3.3V, RL=16Ω)
100
Fig. 27 THD+N vs. Frequency (VDD=5.5V, RL=16Ω)
100
10
VDD=2.4V RL=32 Ω 20kHz-LPF Stereo (in phase)
THD+N [%]
10
VDD=3.3V RL=32 Ω 20kHz-LPF Stereo (in phase)
THD+N [%]
10
VDD=5.5V RL=32 Ω 20kHz-LPF Stereo (in phase) Po=0.1mW Po=10mW
THD+N [%]
1
Po=0.1mW Po=10mW
1
Po=0.1mW Po=10mW
1
0.1
0.1
0.1
0.01
0.01
0.01
0 .001 10 100 1k
Po=1mW
10k 100k
0 .001 10 100 1k
Po=1mW
10k 100k
0 .001 10 100 1k
Po=1mW
10k 100k
Frequency [Hz]
Frequency [Hz]
Frequency [Hz]
Fig. 28 THD+N vs. Frequency (VDD=2.4V, RL=32Ω)
0 -20 -40 -60 -80 -100 -120 -140 10 100 1k Frequency [Hz] 10k 100k
Fig. 29 THD+N vs. Frequency (VDD=3.3V, RL=32Ω)
0
Fig. 30 THD+N vs. Frequency (VDD=5.5V, RL=32Ω)
0
Spectrum [dBV]
Spectrum [dBV]
-60 -80 -100 -120 -140 10 100 1k Frequency [Hz] 10k 100k
Spectrum [dBV]
VDD=2.4V Input connect to the ground with 1uF
-20 -40
VDD=3.3V Input connect to the ground with 1uF
-20 -40 -60 -80 -100 -120 -140 10
VDD=5.5V Input connect to the ground with 1uF
100
1k Frequency [Hz]
10k
100k
Fig.31 Noise Spectrum (VDD=2.4V)
Fig.32 Noise Spectrum (VDD=3.3V)
Fig.33 Noise Spectrum (VDD=5.5V)
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6/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Electrical characteristic curves – BD88200GUL (Reference data)
0 -20 -40
Technical Note
Output Voltage [dBV]
VDD=3.3V f=1kHz BPF
10
100
RL=32Ω
8 6 4
VDD=3.3V, Po=10mW Ri=10kΩ, Input coupling capacitor = 1.0uF
THD+N [%]
10
RL=16Ω
-60 -80 -100 -120 -120
Gain [dB]
2 0 -2 -4 -6 -8 -10
RL=16Ω
1
In phase VDD=3.3V 20kHz-LPF f=1kHz Stereo RL=16 Ω
1n 100n
RL=32Ω
0.1
0.01
Out of phase
10u 1m 100m
0 .001
10 100 1k Frequency [Hz] 10k 100k
-100
-80
-60
-40
-20
0
Input Voltage [dBV]
Output Power [W]
Fig.34 Output Voltage vs. Input Voltage (VDD=3.3V)
100 100
Fig.35 Gain vs. Frequency (VDD=3.3V)
Fig.36 THD+N vs. Output Power (VDD=3.3V, RL=16Ω)
100
10
10
VDD=3.3V RL=16 Ω 20kHz-LPF Stereo (in phase)
THD+N [%]
10
VDD=3.3V RL=32 Ω 20kHz-LPF Stereo (in phase) Po=0.1mW
THD+N [%]
THD+N [%]
1
In phase VDD=3.3V 20kHz-LPF f=1kHz Stereo RL=32 Ω
1n 100n
1
Po=0.1mW Po=1mW
1
0.1
0.1
0.1
Po=1mW
0.01
0.01
0.01
Out of phase
0 .001 10u 1m 100m 10 100 1k
0 .001
Po=10mW
10k 100k
0 .001 10 100 1k
Po=10mW
10k 100k
Output Power [W]
Frequency [Hz]
Frequency [Hz]
Fig. 37 THD+N vs. Output Power (VDD=3.3V, RL=32Ω)
0 -20 -40 -60 -80 -100 -120 -140 10 100 1k Frequency [Hz] 10k 100k
Fig.38 THD+N vs. Frequency (VDD=3.3V, RL=16Ω)
Fig. 39 THD+N vs. Frequency (VDD=3.3V, RL=32Ω)
Spectrum [dBV]
VDD=3.3V Input connect to the ground with 1uF
Fig.40 Noise Spectrum (VDD=3.3V)
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7/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Electrical characteristic curves – BD88210GUL (Reference data)
10 0 -20 -40
Technical Note
100
Output Voltage [dBV]
VDD=3.3V f=1kHz BPF
RL=32Ω
8 6 4
VDD=3.3V Po=10mW Input coupling capacitor = 1.0uF
10
THD+N [%]
RL=16Ω
-60 -80 -100 -120 -120
Gain [dB]
2 0 -2 -4 -6 -8 -10
RL=16Ω
1
In phase VDD=3.3V 20kHz-LPF f=1kHz Stereo RL=16 Ω
1n 100n 10u
RL=32Ω
0.1
0.01
Out of phase
1m 100m
0 .001
10 100 1k Frequency [Hz] 10k 100k
-100
-80
-60
-40
-20
0
Input Voltage [dBV]
Output Power [W]
Fig.41 Output Voltage vs. Input Voltage (VDD=3.3V)
100
Fig.42 Gain vs. Frequency (VDD=3.3V)
100
Fig.43 THD+N vs. Output Power (VDD=3.3V, RL=16Ω)
100
10
10
VDD=3.3V RL=16 Ω 20kHz-LPF Stereo (in phase)
THD+N [%]
10
VDD=3.3V RL=32 Ω 20kHz-LPF Stereo (in phase) Po=0.1mW
THD+N [%]
1
THD+N [%]
In phase
1
Po=0.1mW Po=1mW
1
0.1
0.01
0 .001
VDD=3.3V 20kHz-LPF f=1kHz Stereo RL=32 Ω
1n 100n 10u
0.1
0.1
Po=1mW
0.01
0.01
Out of phase
0 .001 1m 100m 10 100 1k
Po=10mW
10k 100k
0 .001 10 100 1k
Po=10mW
10k 100k
Output Power [W]
Frequency [Hz]
Frequency [Hz]
Fig. 44 THD+N vs. Output Power (VDD=3.3V, RL=32Ω)
0 -20 -40 -60 -80 -100 -120 -140 10 100 1k Frequency [Hz] 10k 100k
Fig.45 THD+N vs. Frequency (VDD=3.3V, RL=16Ω)
Fig. 46 THD+N vs. Frequency (VDD=3.3V, RL=32Ω)
Spectrum [dBV]
VDD=3.3V Input connect to the ground with 1uF
Fig.47 Noise Spectrum (VDD=3.3V)
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8/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Electrical characteristic curves – BD88220GUL (Reference data)
10 0 -20 -40 -60 -80 -100 -120 -120
Technical Note
Output Voltage [dBV]
VDD=3.3V f=1kHz BPF
100
RL=32Ω
8 6 4
RL=16Ω
10
RL=16Ω
Gain [dB]
2 0 -2 -4 -6 -8 -10
THD+N [%]
RL=32Ω
1
In phase VDD=3.3V 20kHz-LPF f=1kHz Stereo RL=16 Ω
1n 100n 10u
0.1
VDD=3.3V Po=10mW Input coupling capacitor = 1.0uF
10 100 1k Frequency [Hz] 10k 100k
0.01
Out of phase
1m 100m
0 .001
-100
-80
-60
-40
-20
0
Input Voltage [dBV]
Output Power [W]
Fig.48 Output Voltage vs. Input Voltage (VDD=3.3V)
100 100
Fig.49 Gain vs. Frequency (VDD=3.3V)
VDD=3.3V RL=16 Ω 20kHz-LPF Stereo (in phase)
THD+N [%]
Fig.50 THD+N vs. Output Power (VDD=3.3V, RL=16Ω)
100
10
10
10
VDD=3.3V RL=32 Ω 20kHz-LPF Stereo (in phase) Po=0.1mW
THD+N [%]
THD+N [%]
1
In phase
1
Po=0.1mW Po=1mW
1
0.1
0.01
0 .001
VDD=3.3V 20kHz-LPF f=1kHz Stereo RL=32 Ω
1n 100n 10u
0.1
0.1
Po=1mW
0.01
0.01
Out of phase
1m 100m
0 .001 10 100 1k
Po=10mW
10k 100k
0 .001 10 100 1k
Po=10mW
10k 100k
Output Power [W]
Frequency [Hz]
Frequency [Hz]
Fig. 51 THD+N vs. Output Power (VDD=3.3V, RL=32Ω)
0 -20 -40 -60 -80 -100 -120 -140 10 100 1k Frequency [Hz] 10k 100k
Fig.52 THD+N vs. Frequency (VDD=3.3V, RL=16Ω)
Fig. 53 THD+N vs. Frequency (VDD=3.3V, RL=32Ω)
Spectrum [dBV]
VDD=3.3V Input connect to the ground with 1uF
Fig.54 Noise Spectrum (VDD=3.3V)
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9/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Pin Arrangement 1 D C B A SVDD INL SHDNRB INR 2 OUTL OUTR SHDNLB SGND PVDD (Bottom View) 3 SVSS 4 PVSS C1N PGND C1P
Technical Note
●Pin Function Ball Matrix A1 A2 A3 A4 B1 B2 B4 C1 C2 C4 D1 D2 D3 D4
Pin name INR SGND PVDD C1P SHDNRB SHDNLB PGND INL OUTR C1N SVDD OUTL SVSS PVSS Headphone Amplifier (Rch) input Ground for Headphone Amplifier
Function
Symbol C A E E C D B D F
Positive Power Supply for Charge Pump Flying Capacitor (CF) Positive Headphone Amplifier (Rch) Shutdown Control (H:active, L:shutdown) Headphone Amplifier (Lch) Shutdown Control (H:active, L:shutdown) Ground for Charge Pump Headphone Amplifier (Lch) input Headphone Amplifier (Rch) output Flying Capacitor (CF) Negative Ground for Headphone Amplifier Headphone Amplifier (Lch) output Negative Supply Voltage for Signal Negative Supply Voltage output
●Pin equivalent circuit
PVDD PVDD
PGND PGND
SVDD
PAD
A
PGND PGND
B
SVDD
PAD +
PAD
D
SVSS
E
SGND
F
Fig.55 Pin equivalent circuit
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10/25
PAD
+
PAD
PVSS PVSS
C
SVSS
SVDD
PGND PGND
PAD
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Block Diagram
SHDNB INL
Technical Note
B1
C1 SVDD SVDD D1
Rin PVDD A3
Rfb
SVDD OUTL D2 + SGND SVDD R1=Rfb SVSS
1.0μF C1P A4 R2=Rin
PGND B4 CHARGE PUMP UVLO/ SHUTDOWN CONTROL
SVDD TSD SHORT PROTECTION COM
C1N C4 PVDD CHARGE PUMP CONTROL SVDD
R1=Rfb SGND CLOCK GENERATOR R2=Rin SVDD SVSS +
B2
OUTR C2
PVSS D4
Rin SGND A2 SGND INR A1
R fb SVSS SVSS D3
Type BD88200GUL BD88210GUL BD88215GUL BD88220GUL
Rin 14kΩ@Typ. 14kΩ@Typ. 14kΩ@Typ. 14kΩ@Typ.
Rfb Open 14kΩ@Typ. 21kΩ@Typ. 28kΩ@Typ.
Fig.56 Block Diagram
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11/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
●Functional descriptions The conventional headphone amplifier composition is occupied to Fig.57. In this composition, the signal is output by using the middle point bias circuit based on the middle point bias. Therefore, the output coupling capacitor that removes the DC voltage difference and does the AC coupling is necessary. This coupling capacitor and the impedance of the headphone composes the high-pass filter. Therefore, the signal degradation in the low frequency region learns by experience. The output coupling capacitor should be a large capacity, because the cutoff frequency of this high-pass filter becomes the following formula (1). 1 fc (1) 2πRLCC
* Cc is the coupling capacitor, and RL is the impedance of the headphone.
Moreover, POP noise by the middle point bias start-up is generated and the degradation of PSRR learns by experience.
VDD
Cc
Vout [V]
Input
+
Vout
Vhp
VDD VDD/2
+
GND
0
Vhp [V]
time [s]
Middle Point Bias Circuit
0 time [s]
Fig.57 Conventional headphone amplifier composition The composition of the series of BD882xxGUL is occupied to Fig.58. In this composition, the signal is output by using a negative voltage based on the ground level. Therefore, the amplifier output can be connected directly with the headphone. And, the output coupling capacitor becomes unnecessary. Additionally, the signal degradation in the low frequency region with the coupling capacitor is not generated, and the deep bass is achieved. Moreover, POP noise is controlled because of no middle point bias start-up. And, the degradation of PSRR doesn't occur by being based on the ground.
Input HPVDD Vout Vhp
Vout [V]
VDD HPVDD
CF : Flying Capacitor Charge Pump
+
0 time [s] VSS
CH : Hold Capacitor
Vhp [V]
0 time [s]
Fig.58 Composition of the series of BD882xxGUL
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12/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
BD882□□GUL has the function “Virtual Ground-reference output“. “Virtual Ground-reference output” can be canceled Noise (see Fig.59 “Vn”) between IC and headphone jack by feedback ground of headphone jack to IC.
Vout Input Vo
Voltage[V]
Vout Vn=Vg 0 time[s]
Voltage[V]
VDD
+
Charge Pump Vn GND Vg
Vo
0 time[s]
(Ground-bias type)
Vout Input
Voltage[V]
Vo
Vout Vn=Vg 0 time[s]
Voltage[V]
VDD
+
Charge Pump Vn GND Vg
Vo
0 time[s]
(Virtual ground-bias type)
Fig.59. Ground noise canceling function by “virtual ground” Connect Pin “B2” (COM) to ground near headphone jack. In case of BD88200GUL, value error of external resistors makes noise rejection characteristic worse. Put “External resistors” that have high accuracy within 5%, near the LSI.
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13/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
[CHARGE PUMP / CHARGE PUMP CONTROL] The negative power supply circuit is composed of the regulated charge-pump. This circuit outputs the regulated negative voltage (PVSS) directly from power-supply voltage (PVDD). Therefore, it doesn't depend on the power-supply voltage, and a constant voltage is output (PVSS=-2.4V@Typ., refer to Fig.4). Moreover, there is not swinging of the power supply by the output current of the headphone amplifier, and it doesn't influence the headphone amplifier characteristic.
0 -0.5
VSS Voltage [V]
-1 -1.5 -2 -2.5 -3 0
Ta=25℃ VDD=3.3V SHDN_B=SVDD CF=CH=2.2uF
20
40 Load Current [mA]
60
80
Fig.60 Characteristics of load current regulation of PVSS (Reference data) ・Power control The power control is a logical sum of SHDNLB and SHDNRB. The negative power supply circuit starts when H level is input to either of SHDNLB or SHDNRB, and power is downed at the SHDNLB=SHDNRB=L level. Table.1 Control of the charge pump SHDNLB SHDNRB Control L L H H L H L H Power down Power on Power on Power on
・Operating Frequency The operating frequency of the negative power supply charge pump is designed for the temperature and the voltage dependence may decrease. The reference data (measurements) is occupied to Fig.61. Please note the interference with the frequency in the application board.
400 Charge Pump Ocsillator Frequency [kHz ] Charge Pump Ocsillator Frequency [kHz ] 380 360 340 320 300 280 260 240 220 200 -50.0 0.0 Ta [℃] 50.0 100.0 400
VDD=3.3V Measure : C1P CF=CH=2.2uF
380 360 340 320 300 280 260 240 220 200 2.0
Ta=25℃ Measure : C1P CF=CH=2.2uF
3.0
4.0 Supply Voltage[V]
5.0
6.0
Fig.61 Temperature characteristic and Voltage characteristic of operating frequency (Reference data) ・The flying capacitor and the hold capacitor The flying capacitor (CF) and the hold capacitor (CH) greatly influence the characteristic of the charge pump. Therefore, please connect the capacitor with an excellent temperature characteristic and voltage characteristic of 2.2µF as much as possible near IC.
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14/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
[HEADPHONE AMP] The headphone amplifier is driven by the internal positive voltage (+2.4V) and negative voltage (SVSS, -2.4V) based on ground (SGND). Therefore, the headphone can be connected without the output coupling capacitor. As a result, it brings the improved low-frequency characteristic compared with the headphone of the conventional coupling capacitor type. ・Power control L channel and R channel of the headphone amplifier can be independently controlled by SHDNLB and SHDNRB logic. When the SVSS voltage is -1.1V@Typ. or more, the headphone amplifier does not operate to protect from illegal operation. And in addition, the overcurrent protection circuit is built in. The amplifier is shutdown when the overcurrent occurs because of the output short-circuit etc., and IC is protected from being destroyed. Table.2 Control of the headphone amplifier SHDNLB SHDNRB L channel L L H H L H L H Power down Power down Power on Power on
[V] VDD
R channel Power down Power on Power down Power on
SHDNxB
0 [V] 0 [time] -1.1V SVSS [time]
Amprilier Disable
Amplifier Enable
Fig.62 Area of headphone amplifier can operate SVSS does not have internal connection with PVSS. Please connect SVSS with PVSS on the application board. ・Input coupling capacitor Input DC level of BD882xxGUL is 0V (SGND). The input coupling capacitor is necessary for the connection with the signal source device. The signal decrease happens in the low frequency because of composing the high-pass filter by this input coupling capacitor and the input impedance of BD882xxGUL. The input impedance of BD882xxGUL is Rin (14kΩ@Typ.). The cutoff frequency of this high-pass filter becomes the following formula. (In BD88200GUL, Rin becomes external resistance Ri. ) 1 fc (2) 2πR in C in
* Cin is the input coupling capacitor.
9.0 6.0 3.0 0.0
Rin=14kΩ Cin=10uF
Gain [dB]
-3.0 -6.0 -9.0 -12.0 -15.0 -18.0 -21.0 1 10 Frequency [Hz] 100
Cin=4.7uF Cin=2.2uF Cin=1uF
Fig.63 Frequency response by the input coupling capacitor (Reference data)
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15/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
And, the degradation of THD+N happens because of the input coupling capacitor. Therefore, please consider these about the selection of parts.
0 -10 -20 -30 THD+N [dB] -40 -50 -60 -70 -80 -90 - 100 10 100 1k Frequency [Hz] 10k 100k Cin=2.2µF Cin=0.47µF Cin=1.0µF BD88215GUL VDD=3.3V Po=10mW RL=16Ω 20kHz LPF
Cin=0.22µF
* Capacitor size: 1608
Fig.64 THD+N by the input coupling capacitor (Reference data) ・State of terminal when power down The state of the terminal changes by the power control of the headphone amplifier. When it is shutdown, the input impedance of the input terminal becomes 7.1kΩ@Typ. (In BD88200GUL, become Ri + 7.1kΩ). The time constant can be reduced when the input coupling capacitor is charged. The input voltage changes while charging up the input coupling capacitor. Therefore, do not operate the headphone amplifier while charging.
Vs [V]
Audio Source
Vs Cin
Vin
Rin =7.1kΩ VDD
Vout
Output Bias time [s]
0
Vin [V]
+
VSS
Output Bias time [s]
0
Fig.65 Input voltage transition with input coupling capacitor This charge time constant becomes the following formula (3) by using the input coupling capacitor and the input impedance. And the calculation value of the convergence to the wait time is indicated in Fig.66. τ R in C in (3)
* Rin=7.1kΩ@Typ.. In BD88200GUL, Rin=Ri+7.1kΩ
100 90 80 70 60 50 40 30 20 10 0 0τ 1τ 2τ 3τ 4τ 5τ Wait time [s] 6τ 7τ 8τ
Convergence [%]
Fig.66 Wait time and convergence (Reference)
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16/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
[UVLO / SHUTDOWN CONTROL] BD882xxGUL has low voltage protection function (UVLO: Under Voltage Lock Out). And protect from the illegal operation of IC by a low power supply voltage. The detection voltage is 2.13V@Typ., so it does not influence 2.4V of recommended operation voltage. UVLO controls the whole of IC, and does both the negative power supply charge pump and the headphone amplifier in power down. [TSD] BD882xxGUL has overheating protection function (TSD: Thermal Shutdown). And the headphone amplifier becomes shutdown when illegally overheating by the headphone amplifier illegally operation. ●Timming Chart (Usually Operation)
PVDD,SVDD SHDNLB SHDNRB Amp enable PVSS,SVSS INL,INR OUTL OUTR Shutdown Setup Signal output Shutdown
Fig.67 Usually Operation (UVLO Operation)
PVDD,SVDD SHDNLB, SHDNRB PVSS,SVSS OUTL OUTR Signal output UVLO Setup Signal output
Fig.68 UVLO Operation (TSD Operation)
Hysteresis = 5℃
Ta PVDD,SVDD SHDNLB, SHDNRB PVSS,SVSS OUTL OUTR Signal output TSD Signal output
Fig.69 TSD Operation
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17/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Application Circuit
SHUTDOWN Control SHDNB Lch Input
Technical Note
INL
1.0μF C1 SVDD SVDD D1 3.3V
B1
3.3V Rin PVDD A3 SVDD 1.0μF C1P A4 SVDD R2=Rin + SGND R1=Rfb SVSS OUTL D2 Rfb 1.0μF
Part CF CH
Function Flying Capacitor Hold Capacitor Bypass Capacitor Bypass Capacitor Coupling Capacitor Coupling Capacitor
value 2.2µF 2.2µF 1.0µF 1.0µF 1.0µF 1.0µF
Remarks Temp. Characteristic： Class-B Temp. Characteristic： Class-B Temp. Characteristic： Class-B Temp. Characteristic： Class-B Temp. Characteristic： Class-B Temp. Characteristic： Class-B
PGND C1 2.2μF C2 2.2μF C1N C4 PVDD CHARGE PUMP CONTROL SVDD B4 CHA RGE PUMP UVLO/ SHUTDOWN CONTROL
SVDD TSD SHORT PROTECTION COM R1=Rfb SGND CLOCK GENERATOR R2=Rin SVDD SVSS + OUTR C2 B2
Cpvdd Csvdd Cil Cir
SVSS
PVSS D4
Rin SGND A2 SGND INR A1
Rfb SVSS D3
1.0μF Rch Input
Fig.70 BD88210GU/BD88215GUL/BD88220GUL application circuit
Part CF CH Cpvdd Csvdd Cil Cir Ri Rf
Function Flying Capacitor Hold Capacitor Bypass Capacitor Bypass Capacitor Coupling Capacitor Coupling Capacitor Input Resistor Feedback Resistor
value 2.2µF 2.2µF 1.0µF 1.0µF 1.0µF 1.0µF 10kΩ 10kΩ
Remarks Temp. Characteristic： Class-B Temp. Characteristic： Class-B Temp. Characteristic： Class-B Temp. Characteristic： Class-B Temp. Characteristic： Class-B Temp. Characteristic： Class-B MCR006YZPJ103 (ROHM) MCR006YZPJ103 (ROHM)
Fig.71 BD88200GUL application circuit In BD88200GUL, the Pass Gain becomes the following formula (4). The Pass Gain and the resister Rf is limited by table.3. R Gain f (4) Ri Table.3 Pass Gain and Resister Limit Item Pass Gain Rf Ri Min. 0.5 1.0 Typ. 1.0 10 10 Max. 2.0 Unit V/V kΩ kΩ
Ri is not limited. But, if this resister Ri is very small, the signal decrease happens in the low frequency (Refer to formula 2).
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18/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Thermal Derating Curve The reference value of the thermal derating curve is indicated in Fig.72. (Conditions) This value is for mounted on the ROHM application board Board size：40mm x 60mm x 1.6mm Top Copper Area：79.9% Bottom Copper Area：80.2% Board Layout：Fig.75
1.6 1.4 1.2 Pd [W] 1 0.8 0.6 0.4 0.2 0 0 25 50 75 Ta [℃] 100 125 150
Technical Note
Fig.72 Thermal Derating Curve
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19/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Evaluation Board
Technical Note
BD882XXFV Evaluation Board loads with the necessary parts. It can operate only by it. It is using RCA Connector for input terminal and Headphone jack (φ=3.5mm) for output terminal. Therefore it can easily connect between Audio equipments. And it can operate by single supply (2.4 to 5.5V). The switch on the board (SDB) can control shutdown. (Spec.) Item Supply Voltage Range (VDD) Maximum Supply Current Operating Temperature Range Input Voltage Range Output Voltage Range Minimum Load Impedance Limit 3.0 to 5.5 1.0 -40 to 85 -2.5 to 2.5 -2.5 to 2.5 15 Unit V A ℃ V V Ω
(Schematic)
OUTL OUTR CN1 R L Headphone Jack R6 R5
D2
OUTL
OUTR
C2
IN IN RCA(White) VDD 3.3V
+
C1 C6 1µF
INL
INR
A1 C4 1µF
IN IN RCA(Red)
A3 D1 C2 1µF C5 1µF
BD88210GUL / BD88215GUL A4 / BD88220GULC1P
PVDD SVDD C1N C4
C1 2.2µF
C7 10u F
GND GND VDD
B4 A2
PGND SGND
PVSS SVSS
D4 D3 C3 2.2µF GND VDD
VSS
SHDNLB (Open) SW2 GND
B2
SHDNLB
SHDNRB
B1
SHDNR B SW1 GND
(Open)
Fig.73 Evaluation Board Schematic (BD88210GUL/BD88215GUL/BD88220GUL)
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20/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
OUTL OUTR CN1 R L Headphone Jack R4 10k Ω R3 C6 1µF 10kΩ A3 D1 C2 1µF C5 1µF R6 R5
D2
OUTL
OUTR
C2 R2 10k Ω R1 C4 10kΩ 1µF
IN IN RCA(White) VDD 3.3V
+
C1
INL
INR
A1
IN IN RCA(Red)
BD88200GUL
PVDD SVDD
C1P
A4 C1 2.2µF
C7 10u F
C1N
C4
GND GND VDD
B4 A2
PGND SGND
PVSS SVSS
D4 D3 C3 2.2µF GND
VSS
SHDNB (Open) SW1 GND
B1
SHDNL
COM
B2 R7 10kΩ
COM R8 10kΩ
Fig.74 Evaluation Board Schematic (BD88200GUL) (Parts List) Parts name U1 C1, C3 C2, C4～C6 C7 R1～R4 R5, R6 CN1 R1～R4 * (Operation procedure) ① ② ③ ④ ⑤ ⑥ Turn off the switch (SHNDLB/SHDNRB) on evaluation board. Connect the positive terminal of the power supply to the VDD pin and ground terminal to the GND pin. Connect the left output of the audio source to the INL and connect the right output to the INR. Turn on the power supply. Turn on the switch (SHDNLB/SHDNRB) on the evaluation board. (H) Input the audio source. Type CSP-14pin Chip Ceramic capacitor Chip Ceramic capacitor Tantalum capacitor Chip Resistor Chip Resistor Headphone jack Chip Resistor Value BD882xxGUL 2.2µF 1.0µF 10µF 10kΩ Open 10kΩ Size 2.1mm x 2.1mm 1608 1608 3216 1608 φ=3.5mm 1608
*About BD88200GUL, R1～R4 of is the resistor for the gain setting.
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21/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
(Board Layout)
Technical Note
(TOP SILKSCREEN – TOP VIEW)
(TOP LAYER - TOP VIEW)
(BOTTOM LAYER – TOP VIEW)
(BOTTOM SILKSCREEN – TOP VIEW)
Fig.75 ROHM Application Board Layout (BD88210GUL/BD88215GUL/BD88220GUL)
(TOP SILKSCREEN – TOP VIEW)
(TOP LAYER - TOP VIEW)
(BOTTOM LAYER – TOP VIEW)
(BOTTOM SILKSCREEN – TOP VIEW)
Fig.76 ROHM Application Board Layout (BD88200GUL)
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22/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Notes for use
Technical Note
(1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (12) About the rush current For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of wiring.
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23/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
●Ordering part number
Technical Note
B
Part No. BD
D
8
Part No. 88200 88210 88215 88220
8
2
0
0
G
U
L
-
E
2
Package GUL: VCSP50L2
Packaging and forming specification E2: Embossed tape and reel
VCSP50L2(BD88200GUL)
1PIN MARK
Tape
2.10±0.05
Embossed carrier tape 3000pcs E2
The direction is the 1pin of product is at the upper left when you hold
Quantity
0.55MAX 0.1±0.05
2.10±0.05 14- φ 0.25± 0.05 0.05 A B 0.06 S A
D
Direction of feed
S
( reel on the left hand and you pull out the tape on the right hand
)
(φ0.15)INDEX POST
C B A
B
P=0.5×3
0.30±0.05
0.30±0.05
1
P=0.5×3
2
3
4
1pin Reel
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
VCSP50L2(BD88210GUL)
1PIN MARK
Tape
2.10±0.05
Embossed carrier tape 3000pcs E2
The direction is the 1pin of product is at the upper left when you hold
Quantity
0.55MAX 0.1±0.05
2.10±0.05 14- φ 0.25± 0.05 0.05 A B 0.06 S A
D
Direction of feed
S
( reel on the left hand and you pull out the tape on the right hand
)
(φ0.15)INDEX POST
C B A
B
P=0.5×3
0.30±0.05
0.30±0.05
1
P=0.5×3
2
3
4
1pin Reel
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
VCSP50L2(BD88215GUL)
1PIN MARK
Tape
2.10±0.05
Embossed carrier tape 3000pcs E2
The direction is the 1pin of product is at the upper left when you hold
Quantity
0.55MAX 0.1±0.05
2.10±0.05 14- φ 0.25± 0.05 0.05 A B 0.06 S A
D
Direction of feed
S
( reel on the left hand and you pull out the tape on the right hand
)
(φ0.15)INDEX POST
C B A
B
P=0.5×3
0.30±0.05
0.30±0.05
1
P=0.5×3
2
3
4
1pin Reel
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
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24/25
2011.03 – Rev. A
BD88200GUL,BD88210GUL,BD88215GUL,BD88220GUL
Technical Note
VCSP50L2(BD88220GUL)
1PIN MARK
Tape
2.10±0.05
Embossed carrier tape 3000pcs E2
The direction is the 1pin of product is at the upper left when you hold
Quantity
0.55MAX 0.1±0.05
2.10±0.05 14- φ 0.25± 0.05 0.05 A B 0.06 S A
D
Direction of feed
S
( reel on the left hand and you pull out the tape on the right hand
)
(φ0.15)INDEX POST
C B A
B
P=0.5×3
0.30±0.05
0.30±0.05
1
P=0.5×3
2
3
4
1pin Reel
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved.
25/25
2011.03 – Rev. A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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