BD9329AEFJ-E2

Single-chip Type with Built-in FET Switching Regulators Simple Step-down Switching Regulator with Built-in Power MOSFET BD9329AEFJ No.11027EAT56 ●Description The BD9329AEFJ is a synchronous step-down switching regulator that integrates 2 low resistance N-channel MOSFETs. It achieves 3A continuous output current over a wide input supply range. Current mode operation provides fast transient response and easy phase compensation. ●Features 1) Wide operating INPUT Range 4.2V～18.0V 2) 3A Output Current 3) Hi-side / Lo-side FET ON-resistance; 0.15 / 0.13Ω Power Switch 4) Low ESR Output Ceramic Capacitors are Available 5) Low Standby Current during Shutdown Mode 6) 380 kHz Fixed Operating Frequency 7) Feedback voltage 0.9V ±1.5% Accuracy at room temp. (±2.0% guaranteed for -25℃ to 85℃ temperature range) 8) Protection Circuits Under Voltage Lockout Protection Thermal Shutdown Over Current Protection 9) HTSOP-J8 Package with Exposed thermal PAD. ●Applications Distributed Power System Pre-Regulator for Linear Regulator ●Absolute maximum ratings (Ta = 25℃) Parameter Supply Voltage Switch Voltage Power Dissipation for HTSOP-J8 Package thermal resistance θja Package thermal resistance θjc Operating Temperature Range Storage Temperature Range Junction Temperature BST Voltage EN Voltage All other pins *2 *2 Symbol VIN VSW Pd θja θjc Topr Tstg Tjmax VBST VEN VOTH Ratings 20 20 3760 *1 29.27 3.75 -40～+85 -55～+150 150 VSW+7 20 20 Unit V V mW ℃/W ℃/W ℃ ℃ ℃ V V V *1 Derating in done 30.08 mW/℃ for operating above Ta≧25℃(Mount on 4-layer 70.0mm×70.0mm×1.6mm board) *2 Mount on 4-layer 50mm x 30mm x 1.6mm application board www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/15 2011.02 - Rev.A BD9329AEFJ ●Operation Range (Ta= -40～85℃) Parameter Supply Voltage SW Voltage Output current Output voltage range Symbol VIN VSW ISW3 VRANGE Ratings Min 4.2 -0.5 0.9 Typ 12 Max 18 18 3 VIN x 0.7 Unit V V A V Technical Note ●Electrical characteristics (Unless otherwise specified VIN=12V Ta=25℃) Limits Parameter Symbol Min Typ Error amplifier block FB input bias current Feedback voltage1 Feedback voltage2 SW block – SW Hi-side FET On-resistance Lo-side FET On-resistance Hi/Lo-side FET Leak current Switch Current Limit Maximum duty cycle General Enable Sink current Enable Threshold voltage Under Voltage Lockout threshold Under Voltage Lockout Hysteresis Soft Start Current Soft Start Time Operating Frequency Circuit Current Quiescent Current IEN VEN VUVLO VHYS ISS TSS FOSC ICC IQUI 90 1.0 3.5 5 300 180 1.2 3.75 0.3 10 22 380 1.2 15 RONH RONL ILEAKN ILIMIT3 MDUTY 3.5 0.15 0.13 0 90 IFB VFB1 VFB2 0.886 0.882 0.02 0.900 0.900 Max Unit Conditions 2 0.914 0.918 µA V V Voltage follower Ta=-25℃～85℃ 10 - Ω Ω µA A % ISW= -0.8A ISW= 0.8A VIN= 18V, VSW = 0V / 18V VFB= 0V 270 1.4 4.0 15 460 3 27 µA V V V µA ms kHz mA µA VEN= 12V VIN rising VSS= 0 V CSS= 0.1 µF VFB= 1.5V, VEN= 12V VEN= 0V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/15 2011.02 - Rev.A BD9329AEFJ ●Block Diagram VIN EN 5V VREF OSC VREG BST OCP UVLO IBIAS FB + + ERR Technical Note 12V VIN TSD S DRV SLOPE LOGIC R LVS SW OUTPUT - COMP SS + PWM － LVS Soft Start GND Fig.1 Block Diagram ●Typical Application Circuit C_PC 3300pF C_SS 0.1+0.05 μF R_PC 7.5kΩ COMP-1 R_DW 10kΩ R_UP 27kΩ SS Thermal Pad (to be shorted to GND) BST EN GND VIN SW FB VIN 12V C_VC1 10μF L 10µH C_CO1 20μF VOUT 3.3V R_BS 22Ω C_BS 0.1μF Maker ※R_BS protect from VIN-BST short destruction. Fig.2 Application Circuit Symbol Input capacitor Output capacitor Inductor C_VC1 C_CO1 L TDK TDK TDK Part No C3225JB1E106K C3216JB1C106M SLF10165-100M3R8 10µF/25V 10µF/16V 10µH/3.8A www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/15 2011.02 - Rev.A BD9329AEFJ ●Block Operation ・VREG A block to generate constant-voltage for DC/DC boosting. ・VREF A block that generates internal reference voltage of 5.1 V (Typ.). ・TSD/UVLO TSD (Thermal shutdown)/UVLO (Under Voltage Lockout) protection block. The TSD circuit shuts down IC at high temperature. The UVLO circuit shuts down the IC when the VCC is Low Voltage. Technical Note ・Error amp block (ERR) This is the circuit to compare the reference voltage and the feedback voltage of output voltage. The COMP pin voltage resulting from this comparison determines the switching duty. At the time of startup, since the soft start is operated by the SS pin voltage, the COMP pin voltage is limited to the SS pin voltage. ・Oscillator block (OSC) This block generates the oscillating frequency. ・SLOPE block This block generates the triangular waveform from the clock created by OSC. Generated triangular waveform is sent to the PWM comparator. ・PWM block The COMP pin voltage output by the error amp is compared to the SLOPE block's triangular waveform to determine the switching duty. Since the switching duty is limited by the maximum duty ratio which is determined internally, it does not become 100%. ・DRV block A DC/DC driver block. A signal from the PWM is input to drive the power FETs. ・Soft start circuit Since the output voltage rises gradually while restricting the current at the time of startup, it is possible to prevent the output voltage overshoot or the rush current. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/15 2011.02 - Rev.A BD9329AEFJ ●Outward form 4.9±0.1 (Max5.25 include.BURR) (3.2) Technical Note +6° -4° 6 5 8 7 6.0±0.2 3.9±0.1 (2.4) 0.545 1 2 4 3 1PIN MARK S 0.17 -0.03 1.0MAX 0.85±0.05 0.08±0.08 1.27 0.08 S 0.42 -0.04 +0.05 0.08 M Fig.3 HTSOP-J8 Package (Unit:mm) ●Pin Assignment and Pin Function Pin No. 1 2 3 4 5 6 7 8 Pin name BST VIN SW GND FB COMP EN SS Function High-Side Gate Drive Boost Input Power Input Power Switching Output Ground Feed Back Input Compensation Node Enable Input Soft Start Control Input www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 0.65±0.15 1.05±0.2 +0.05 +0.05 -0.03 5/15 2011.02 - Rev.A BD9329AEFJ ●Typical Performance Characteristics (Unless otherwise specified, VIN= 12V Ta = 25℃) 1.6 1.4 1.2 ICC (mA) Technical Note 32 28 24 0.01 0.005 IFB (uA) 20 ICC (uA) 16 12 8 1 0.8 0.6 0 -0.005 4 0.4 3 6 9 VIN (V) 12 15 18 0 4 6 8 10 12 14 16 18 VIN (V) -0.01 0 0.4 0.8 1.2 VFB (V) 1.6 2 2.4 Fig.4 Circuit Current (No switching) Fig.5 Stand by current (IC not active) Fig.6 Input Bias Current 0.92 0.26 370 365 0.91 Feedback Voltage[V] 0.22 FOSC (kHz) 360 355 350 345 RON [Ω] 0.90 0.18 0.89 0.14 0.88 -40 -20 0 20 TEMP[℃] 40 60 80 0.1 -40 -20 0 20 TEMP[°C] 40 60 80 340 -40 -20 0 20 TEMP (°C) 40 60 80 Fig.7 Feedback voltage Fig.8 Hi,Low-Side On-resistance Fig.9 Operating Frequency 95 90 85 1000 Vout Soft start time[ms] 80 Efficiency[%] 75 70 65 60 55 50 0 500 1000 1500 Io[mA] 2000 2500 3000 SS 100 SW 10 Iout 1 0.01 0.1 Css[uF] 1 Fig.10 STEP Down Efficiency (VIN= 12V VOUT= 3.3V L=10µH) Fig.11 OverCurrent Protection (VOUT is shorted to GND) Fig.12 Soft Start Time www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/15 2011.02 - Rev.A BD9329AEFJ Technical Note VOUT-MAX: +48mV VOUT VOUT-MIN: -22m V VOUT: 50 mV / Div VOUT: 10.0 mV / Div IOUT: 1.0 A / Div IOUT IOUT: 1.0 A / Div VOUT Δ: 28.4 mV IOUT Fig.13 Transient Response (VIN= 12V VOUT= 3.3V L= 10µH Cout =22µF Iout= 0.2-1.0A ) Fig.14 Output Ripple Voltage (VIN= 12V VOUT= 3.3V L= 10µH Cout =22µF I out= 1.0A ) VOUT VOUT-MAX: +120mV VOUT VOUT: 100 mV / Div VOUT: 10.0 mV / Div IOUT: 1.0 A / Div Δ:28.8 mV VOUT-MIN: -42mV IOUT IOUT: 1.0 A / Div IOUT Fig.15 Transient Response (VIN= 12V VOUT= 3.3V L= 10µH Cout =22µF Iout= 0.2-3.0A) Fig.16 Output Ripple Voltage (VIN= 12V VOUT= 3.3V L= 10µH Cout =22µF I out= ３.0A ) EN TSS VOUT 22ms EN: 10V / Div VOUT: 1.0V / Div IOUT IOUT: 1.0 A / Div Fig.17 Start Up waveform (VIN= 12V VOUT= 3.3V L= 10µH CSS= 0.1µF) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/15 2011.02 - Rev.A BD9329AEFJ ●Selecting Application Components Technical Note (1) Output LC filter constant selection (Buck Converter) The Output LC filter is required to supply constant current to the output load. A larger value inductance at this filter results in less inductor ripple current (∆IL) and less output ripple voltage. However, the larger value inductors tend to have less fast load transient-response, a larger physical size, a lower saturation current and higher series resistance. A smaller value inductance has almost opposite characteristics above.So Choosing the Inductor ripple current (∆IL) between 20 to 40% of the averaged inductor current (equivalent to the output load current) is a good compromise. IL IOUTMAX + IL /2 should not reach the rated value level ILR VIN VOUT L Inductor averaged current t COUT Fig.18 Fig.19 Setting ∆IL = 30% x Averaged Inductor current (2A) = 0.6 [A] 1 L= VOUT  (VIN - VOUT) x = 10µ [H] VIN x FOSC x ∆IL Where VIN= 12V, VOUT= 3.3V, FOSC= 380 kHz, ; FOSC is a switching frequency Also the inductor should have the higher saturation current than IOUTMAX + ∆IL / 2. The output capacitor COUT affects the output ripple-voltage. Choose the large capacitor to achieve the small ripple-voltage enough to meet the application requirement. Output ripple voltage ∆VRPL is calculated by the following equation. 1 ∆VRPL = ∆IL  ( RESR + ) [V] 8x COUT x FOSC Where RESR is a parasitic series resistance in output capacitor. Setting COUT = 20µF, RESR = 10mΩ ∆VRPL = 0.6 x (10m + 1 / (8 x 20u x 380k)) = 15.8mV www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/15 2011.02 - Rev.A BD9329AEFJ (2) Loop Compensation Choosing compensation capacitor CCMP and resistor RCMP Technical Note The current-mode buck converter has 2-poles and 1-zero system. Choosing the compensation resistor and capacitor is important for a good load-transient response and good stability. The example of DC/DC converter application bode plot is shown below. The compensation resistor RCMP will decides the cross over frequency FCRS (the frequency that the total DC-DC loop-gain falls to 0dB). Setting the higher cross over frequency achieves good response speed, however less stability. While setting the lower cross over frequency shows good stability but worse response speed. The 1/10 of switching frequency for the cross over frequency shows a good performance at most applications. ( i ) Choosing phase compensation resistor RCMP The compensation resistor RCMP can be on following formula. 2πx VOUT x FCRS x COUT RCMP = [Ω] VFB x GMP x GMA Where VOUT ; Output voltage, FCRS ; Cross over frequency, COUT ; Output Capacitor, VFB ; internal feedback voltage (0.9V(TYP)), GMP ; Current Sense Gain (7.8A/V(TYP)) , GMA ; Error Amplifier Trans-conductance (300µA/V(TYP)) Setting VOUT= 3.3V, FCRS= 38kHz, COUT= 20µF; 2πx 3.3 x 38k x 20u = RCMP = 0.9 x 7.8 x 300u 7.48k ~= 7.5k [Ω] ( ii ) Choosing phase compensation capacitor CCMP For the stability of DC/DC converter, canceling the phase delay that derives from output capacitor COUT and resistive load ROUT by inserting the phase advance. The phase advance can be added by the zero on compensation resistor RCMP and capacitor CCMP. Making Fz= FCRS / 6 gives a first-order estimate of CCMP. Compensation Capacitor Setting Fz= FCRS/6 = 6.3kHz; Compensation Capacitor CCMP= 1 2π x 7.5k x 6.3k = 3.54n ~= 3.3n [F] CCMP= 1 2π x RCMP x Fz [F] ( iii ) The condition of the loop compensation stability The stability of DC/DC converter is important. To secure the operating stability, please check the loop compensation has the enough phase-margin. For the condition of loop compensation stability, the phase-delay must be less than 150 degree where Gain is 0 dB. Feed forward capacitor CRUP boosts phase margin over a limited frequency range and is sometimes used to improve loop response. CRUP will be more effective if RUP >> RUP||RDW V OUT Gain [dB] A (a) R UP C RUP FB － ＋ C OMP PHASE GBW(b) 0 FCRS －90° PHASE MARGIN －180 －180° F F R DW R CMP 0 .9V C CMP 0 －90 Fig.20 Fig.21 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/15 2011.02 - Rev.A BD9329AEFJ (3) Design of Feedback Resistance constant Set the feedback resistance as shown below. 0.9V VOUT R1 FB R2 ＋ ERR － Technical Note VOUT = R1 + R2 R2  0.9 [V] Fig.22 ●Soft Start Function ERRAMP COMP ↓ ISS 10µA SS CSS An adjustable soft-start function to prevent high inrush current during start-up is available. The soft-start time is set by the external capacitor connected to SS pin. The soft start time is given by; TSS [s] = 2.2 x Css / ISS ↓ + + - Fig.23 Setting CSS= 0.1µF; TSS= 2.2 x 0.1µ / 10µ = 22 [ms] Please confirm the overshoot of the output voltage and inrush current when deciding the SS capacitor value. ●EN Function VIN The EN terminal control IC’s shut down. Leaving EN terminal open makes IC shutdown. To start the IC, EN terminal should be connected to VIN or the other power source output. When the EN voltage exceed 1.2V (typ.), the IC start operating. EN 66 kΩ(typ.) 91 kΩ(typ.) REN EN ON/OFF Signal (Attention) Chattering happens if standing lowering speed is slow when standing of EN pin is lowered. The reverse current in which the input side and the pressure operation are done from the output side is generated when chattering operates with the output voltage remained, and there is a case to destruction. Please set to stand within 100us when you control ON/OFF by the EN signal. This necessity doesn't exist when EN pin is connected with VIN and EN is not controlled. The control by open drain MOSFET shown in a left chart is recommended. Fig.24 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/15 2011.02 - Rev.A BD9329AEFJ Technical Note ●Layout Pattern Consideration Two high pulsing current flowing loops exist in the buck regulator system. The first loop, when FET is ON, starts from the input capacitors, to the VIN terminal, to the SW terminal, to the inductor, to the output capacitors, and then returns to the input capacitor through GND. The second loop, when FET is OFF, starts from the low FET, to the inductor, to the output capacitor, and then returns to the low FET through GND. To reduce the noise and improve the efficiency, please minimize these two loop area. Especially input capacitor, output capacitor and low FET should be connected to GND plain. PCB Layout may affect the thermal performance, noise and efficiency greatly. So please take extra care when designing PCB Layout patterns. VIN CIN FET L COUT VOUT Fig.25 Current loop in Buck regulator system ・The thermal Pad on the back side of IC has the great thermal conduction to the chip. So using the GND plain as broad and wide as possible can help thermal dissipation. And a lot of thermal via for helping the spread of heat to the different layer is also effective. ・The input capacitors should be connected as close as possible to the VIN terminal. ・Keep sensitive signal traces such as trace connected FB and COMP away from SW pin. ・The inductor and the output capacitors should be placed close to SW pin as much as possible. CIN BST SS VIN EN SW COMP GND FB L VOUT COUT Fig.26 The example of PCB layout pattern www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 11/15 2011.02 - Rev.A BD9329AEFJ ●I/O Equivalent Circuit Diagram 1.BST 3.SW 5.FB Technical Note VIN VIN VIN REG SW 6.COMP 7.EN 8.SS VIN EF VIN VIN VIN ●Power Dissipation POWER DISSIPATION: PD [mW] 4000 3000 (4)3760mW HTSOP-J8 Package On 70  70  1.6 mm glass epoxy PCB (1) 1-layer board (Backside copper foil area 0 mm 0 mm) (2) 2-layer board (Backside copper foil area 15 mm  15 mm) (3) 2-layer board (Backside copper foil area 70 mm  70 mm) (4) 4-layer board (Backside copper foil area 70 mm  70 mm) (3)2110mW 2000 (2)1100mW 1000 0 0 (1)820mW 25 50 75 100 125 150 AMBIENT TEMPERATURE: Ta [°C] www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 12/15 2011.02 - Rev.A BD9329AEFJ Technical Note ●Notes for use 1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. 2) GND potential Ensure a minimum GND pin potential in all operating conditions. 3) Setting of heat Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4) Pin short and mistake fitting Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by the presence of a foreign object may result in damage to the IC. 5) Actions in strong magnetic field Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction. 6) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 7) Ground wiring patterns When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring patterns of any external components. 8) Regarding input pin of the IC This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements. For example, when the resistors and transistors are connected to the pins as shown in Fig.27 , a parasitic diode or a transistor operates by inverting the pin voltage and GND voltage. The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements such as by the application of voltages lower than the GND (P substrate) voltage to input and output pins. Resistor (Pin A) (Pin B) C Transistor (NPN) B (Pin B) B C E GND Parasitic elements N (Pin A) Parasitic elements GND ～ ～ ～ ～ GND P+ N N P N Parasitic elements GND Parasitic elements N P N P+ P+ N P substrate GND P P+ ～ ～ E Fig.27 Example of a Simple Monolithic IC Architecture 9) Overcurrent protection circuits An overcurrent protection circuit designed according to the output current is incorporated for the prevention of IC damage that may result in the event of load shorting. This protection circuit is effective in preventing damage due to sudden and unexpected accidents. However, the IC should not be used in applications characterized by the continuous operation or transitioning of the protection circuits. At the time of thermal designing, keep in mind that the current capacity has negative characteristics to temperatures. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 13/15 2011.02 - Rev.A ～ ～ BD9329AEFJ Technical Note 10) Thermal shutdown circuit (TSD) This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power dissipation limits, the attendant rise in the chip's junction temperature Tj will trigger the TSD circuit to turn off all output power elements. Operation of the TSD circuit presumes that the IC's absolute maximum ratings have been exceeded. Application designs should never make use of the TSD circuit. 11) Testing on application boards At the time of inspection of the installation boards, when the capacitor is connected to the pin with low impedance, be sure to discharge electricity per process because it may load stresses to the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. 12) EN control speed Chattering happens if standing lowering speed is slow when standing of EN pin is lowered. The reverse current in which the input side and the pressure operation are done from the output side is generated when chattering operates with the output voltage remained, and there is a case to destruction. Please set to stand within 100µs when you control ON/OFF by the EN signal. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 14/15 2011.02 - Rev.A BD9329AEFJ ●Ordering part number Technical Note B D 9 Part No. 3 2 9 A E F J - E 2 Part No. Package EFJ: HTSOP-J8 Packaging and forming specification E2: Embossed tape and reel HTSOP-J8 4.9±0.1 (MAX 5.25 include BURR) (3.2) 8765 Tape 0.65±0.15 1.05±0.2 Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold +6° 4° −4° (2.4) Quantity Direction of feed 6.0±0.2 3.9±0.1 ( reel on the left hand and you pull out the tape on the right hand ) 1 234 1PIN MARK 0.545 1.0MAX +0.05 0.17 -0.03 S 1.27 0.85±0.05 0.08±0.08 +0.05 0.42 -0.04 0.08 S 0.08 M 1pin Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 15/15 2011.02 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. R1120A