Datasheet
Standard LCD Segment Driver
BU9797FUV MAX 144 Segments (SEG36×COM4)
Features
Integrated RAM for Display Data (DDRAM):
36 x 4 bit (Max 144 Segment)
LCD Drive Output:
4 Common Output, Max 36 Segment Output
Integrated Buffer AMP for LCD Driving
Integrated Oscillator Circuit
No External Components
Low Power Consumption Design
Key Specifications
■ Supply Voltage Range:
+2.5V to +5.5V
■ Operating Temperature Range:
-40°C to +85°C
■ Max Segments:
144Segments
■ Display Duty:
1/4
■ Bias:
1/2, 1/3 selectable
■ Interface:
2wire serial interface
W (Typ) x D (Typ) x H (Max)
Package
Applications
Telephone
FAX
Portable equipment (POS, ECR, PDA etc.)
DSC
DVC
Car audio
Home electrical appliance
Meter equipment
Etc.
TSSOP-C48V
8.1mm x 12.5mm x 1.0mm
Typical Application Circuit
VDD
BU9797FUV
VDD
VLCD
COM0
COM1
COM2
COM3
SDA
SCL
Controller
SEG0
SEG1
・・
・・
・・
・
SEG35
OSCIN
TEST1
VSS
Segment
LCD
・・
・・
・・
・
Using internal oscillator
Figure 1. Typical application circuit
○Product structure:Silicon monolithic integrated circuit
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© 2014 ROHM Co., Ltd. All rights reserved.
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○This product has no designed protection against radioactive rays.
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Datasheet
MAX 144 segments (SEG36×COM4)
Block Diagram / Pin Configuration / Pin Description
BU9797FUV
COM0……COM3
SEG0 …… SEG35
VDD
LCD voltage generator
+
-
Common
driver
Segment
driver
LCD
BIAS
SELECTOR
Common
counter
+
-
Blink timing
generator
Power On Reset
SEG29
SEG33
SEG28
SEG34
SEG27
SEG35
SEG26
COM0
SEG25
COM1
SEG24
COM2
SEG23
COM3
SEG22
VLCD
SEG21
VDD
SEG20
VSS
SEG19
TEST1
SEG18
OSCIN
SEG17
SCL
SEG16
SDA
SEG15
NC
SEG14
SEG0
SEG13
SEG1
SEG12
SEG2
SEG11
SEG3
SEG10
SEG4
SEG9
SEG5
SEG8
SEG6
SEG7
Command
Data Decoder
Command
register
OSCILLATOR
SEG30
SEG32
DDRAM
VLCD
OSCIN
SEG31
Serial interface
IF FILTER
VSS
SDA
SCL
Figure 3. Pin Configuration (TOP VIEW)
Figure 2. Block Diagram
Table 1. Pin Description
Pin Name
Pin No.
I/O
TEST1
13
I
NC
17
OSCIN
14
I
SDA
16
I/O
SCL
15
I
VSS
12
Ground
VDD
11
Power supply
VLCD
10
Power supply for LCD driving
SEG0 to 35
18-48,
1-5
O
SEGMENT output for LCD driving
COM0 to 3
6-9
O
COMMON output for LCD driving
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© 2014 ROHM Co., Ltd. All rights reserved.
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Function
Test input (ROHM use only)
Must be connect to VSS
OPEN terminal
External clock input
External clock and Internal clock can be selected by command
Must be connect to VSS when use internal oscillator
Serial data in-out terminal
Serial clock for data transfer terminal
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Datasheet
MAX 144 segments (SEG36×COM4)
Absolute Maximum Ratings (Ta=25°C, VSS=0V)
Parameter
Symbol
Ratings
Unit
Remarks
Power Supply Voltage1
VDD
-0.5 to +7.0
V
Power supply
Power Supply Voltage2
VLCD
-0.5 to VDD
V
LCD drive voltage
Power Dissipation
Pd
0.64
W
When use more than Ta=25°C, subtract
6.4mW per degree. (Package only)
Input Voltage Range
Operational Temperature
Range
Storage Temperature Range
VIN
-0.5 to VDD+0.5
V
Topr
-40 to +85
°C
Tstg
-55 to +125
°C
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions (Ta=-40°C to +85°C, VSS=0V)
Ratings
Parameter
Symbol
Min
Typ
Max
Unit
Remarks
Power Supply Voltage1
VDD
2.5
-
5.5
V
Power supply
Power Supply Voltage2
VLCD
0
-
VDD-2.4
V
LCD drive voltage, VDD-VLCD ≥ 2.4V
Electrical Characteristics
DC Characteristics (VDD=2.5V to 5.5V, VLCD=0V, VSS=0V, Ta=-40°C to 85°C, unless otherwise specified)
Limits
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
“H” Level Input Voltage
VIH
0.7VDD
-
VDD
V
SDA,SCL
“L” Level Input Voltage
VIL
VSS
-
0.3VDD
V
SDA,SCL
“H” Level Input Current
IIH
-
-
1
µA
SDA,SCL
“L” Level Input Current
SDA “L” Level Output
Voltage
SEG
LCD Driver On
Resistance
COM
IIL
-1
-
-
µA
SDA,SCL
VOL_sda
0
-
0.4
µA
Iload = 3mA
RON
-
3
-
KΩ
RON
-
3
-
kΩ
Standby Current
IDD1
-
-
5
µA
Display off, Oscillation off
Operating
Power Consumption
IDD2
-
7.5
20
µA
VDD=3.3V, VLCD=0V, Ta=25°C
Power save mode1, FR=71Hz
1/3 bias, Frame inverse
Iload=±10µA
Oscillation Characteristics (VDD=2.5V to 5.5V, VLCD=0V, VSS=0V, Ta=-40°C to 85°C, unless otherwise specified)
Limits
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
FR = 80Hz setting,
Frame Frequency1
fCLK1
56
80
104
Hz
VDD=2.5V to 5.5V, Ta=-40°C to 85°C
Frame Frequency2
fCLK2
70
80
90
Hz FR = 80Hz setting, VDD=3.5V, Ta=25°C
Frame Frequency3
fCLK3
77.5
87.5
97.5
Hz
Frame Frequency4
fCLK4
67.5
87.5
102
Hz
External Frequency
fEXCLK
15
-
300
KHz
FR = 80Hz setting, VDD=5.0V, Ta=25°C
FR = 80Hz setting, VDD=5.0V,
Ta=-40°C to 85°C
External clock use case (Note1)
(Note1)
DISCTL 80HZ setting: Frame frequency [Hz] = external clock [Hz] ÷ 512
DISCTL 71HZ setting: Frame frequency [Hz] = external clock [Hz] ÷ 576
DISCTL 64HZ setting: Frame frequency [Hz] = external clock [Hz] ÷ 648
DISCTL 53HZ setting: Frame frequency [Hz] = external clock [Hz] ÷ 768
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Datasheet
MAX 144 segments (SEG36×COM4)
Electrical Characteristics - continued
MPU interface Characteristics (VDD=2.5V to 5.5V, VLCD=0V, VSS=0V, Ta=-40°C to 85°C, unless otherwise specified)
Limits
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
Input Rise Time
tr
-
-
0.3
µs
Input Fall Time
tf
-
-
0.3
µs
SCL Cycle Time
tSCYC
2.5
-
-
µs
“H” SCL Pulse Width
tSHW
0.6
-
-
µs
“L” SCL Pulse Width
tSLW
1.3
-
-
µs
SDA Setup Time
tSDS
100
-
-
µs
SDA Hold Time
tSDH
100
-
-
us
Buss Free Time
tBUF
1.3
-
-
µs
tHD;STA
0.6
-
-
µs
tSU;STA
0.6
-
-
µs
tSU;STO
0.6
-
-
µs
START Condition Hold Time
START Condition Setup
Time
STOP Condition Setup Time
SDA
tBUF
tf
tS LW
tSCYC
SCL
tHD; STA
tr
tSDH
tS HW
tSDS
SDA
tSU; STO
tSU; STA
Figure 4. Interface Timing
I/O equivalence circuit
VDD
VDD
VLCD
VSS
VSS
SDA
SCL
VSS
VSS
VDD
TEST1
VSS
VDD
VDD
OSCIN
SEG/COM
VSS
VSS
Figure 5. I/O equivalence circuit
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Datasheet
MAX 144 segments (SEG36×COM4)
Example of recommended circuit
VDD
VDD
VLCD
COM 0
COM 1
COM 2
COM 3
SDA
SCL
Controller
SEG0
SEG1
・
・
・
・
・
・
・
SEG 35
OSCIN
TEST 1
VSS
Segment
LCD
・
・
・
・
・
・
・
Internal Oscillator circuit mode
VDD
VDD
VLCD
Controller
COM 0
COM 1
COM 2
COM 3
SDA
SCL
SEG0
SEG1
・
・
・
・
・
・
・
SEG35
OSCIN
TEST 1
VSS
Segment
LCD
・
・
・
・
・
・
・
External clock input mode
Figure 6. Example of recommended circuit
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Datasheet
MAX 144 segments (SEG36×COM4)
Functional descriptions
Command /Data transfer method
This device is controlled by 2wire signal (SDA, SCL).
SDA
SCL
START condition
STOP condition
Figure 7. 2 wire Command/Data transfer Format
It has to generate the condition such as START condition and STOP condition in 2wire serial interface transfer method.
Slave address
A
Command
S 0 1 1 1 1 1 0M A C
A P
Display Data
0
R/W
START condition
Command or data judgment bit
STOP condition
Acknowledge
Figure 8. Interface protcol
Method of how to transfer command and data is shown as follows.
(1) Generate “START condition”.
(2) Issue Slave address.
(3) Transfer command and display data.
Acknowledge (ACK)
Data format is 8bits and return Acknowledge after transfer 8bits data.
When SCL 8th=’L’ after transfer 8bit data (Slave Address, Command, Display Data), output ’L’ and open SDA line.
When SCL 9th=’L’, stop output function.
(As Output format is NMOS-Open-Drain, can’t output ‘H’ level.)
If no need Acknowledge function, please input ‘L’ level from SCL 8th=’L’ to SCL 9th=’L’.
SDA
1-7
8
9
1-7
8
9
1-7
8
9
SCL
S
START
condition
P
SLAVE ADDRESS
ACK
DATA
ACK
DATA
ACK
STOP
condition
Figure 9. Acknowledge timing
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Datasheet
MAX 144 segments (SEG36×COM4)
Command transfer method
Issue Slave Address (“01111100” for Write Mode or “01111101” for Read Mode) after generate “START condition”.
1byte after Slave Address always becomes command input.
The least significant bit (LSB” of the Slave Address determines if the operation to be done is Write or Read operation.
MSB (“command or data judge bit”) of command decide to next data is command or display data.
When set “command or data judge bit”=‘1’, next byte will be command.
When set “command or data judge bit”=‘0’, next byte data is display data.
S Slave address A 1 Command
A 1 Command
A 1 Command
A 0 Command
A Display Data
…
P
Once it becomes display data transfer condition, it cannot input command.
When want to input command again, please generate “START condition” once.
If “START condition” or “STOP condition” are inputted in the middle of command transmission, command will be
canceled.
If Slave address is continuously inputted following “START condition”, it will be in command input condition.
Please input “Slave Address” in the first data transmission after “START condition”.
When Slave Address cannot be recognized in the first data transmission, Acknowledge does not return and next
transmission will be invalid. When data transmission is in invalid status, if “START conditions” are transmitted again, it will
return to valid status.
Please consider the MPU interface characteristic such as Input rise time and Setup/Hold time when transferring
command and data (Refer to MPU Interface).
Write display and transfer method
Set R/W bit to “0” to come into Write Mode.
This device has Display Data RAM (DDRAM) of 36×4=144bit.
The relationship between data input and display data, DDRAM data and address are as follows;
Slave address
S
Command
Command
0111110 0 A 1 1101 000
A
0 0000000 A
a b c
d e f g h A i j k l m n o p A … P
Display Data
R/W=0 (Write Mode)
8 bit data will be stored in DDRAM. The address to be written is the address specified by ADSET command, and the
address is automatically incremented in every 4bit data.
Data can be continuously written in DDRAM by transmitting Data continuously.
(When RAM data is written successively after writing RAM data to 23h (SEG35), the address is returned to 00h (SEG0)
by the auto-increment function.
BIT
04
DDRAM address
05
06
07
00
01
02
03
0
a
e
i
m
COM0
1
b
f
j
n
COM1
2
c
g
k
o
COM2
3
d
h
l
p
COM3
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
・・・
21h
SEG33
22h
SEG34
23h
SEG35
Data transference to DDRAM will be executed in every 4bit data.
So it will be finished to transfer with no need to wait ACK.
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Datasheet
MAX 144 segments (SEG36×COM4)
Read Display Data and Transfer Method
If the LSB of the slave address is “1”, it will be set read mode.
The display data and command register value can be read during read mode.
The read mode sequence is shown below.
Slave address
S
0111110
Command
Command
0
R/W(Write Mode)
A
1
1101000
A
0000000
1
Set ICSET [P2]=0
Slave address
A
S
0111110
ADSET command
1
A
Data
A
…...
Data
NA P
R/W(Read Mode)
During read mode, the display data can be read from the DDRAM through the SDA line.
The data will output with SCL input synchronous.
First it has to set address by write mode ADSET command to read display data.
If DDRAM address does not specify before DDRAM read, the read address will be start from the current
DDRAM address.
Address will be increment +2 addresses by 8bit data output automatically.
Master side should be output ACK output by each 8bit data output.
It will be able to keep read mode and address increment by ACK from master side.
If there is no ACK response, SDA output status will be released, please transmit “STOP condition”.
Read mode will be stopped by “STOP condition” transfer.
Address will be set 00h automatically after 23h. (It does not increment to 24h or 25h address)
An example of the display data read sequence is shown below.
S
SDA
P
Slave Address (read)
A
D7
D6 D5 D4 D3 D2 D1 D0 A
D7
D6 D5 D4 D3 D2 D1 D0 NA
SCL
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Datasheet
MAX 144 segments (SEG36×COM4)
Read command register and transfer method
Also the command registers can be read during read mode.
The sequence for the command register read is shown below and is similar to the display data read sequence.
Command
Slave address
S
0111110
0 A 1
R/W
Slave address
Command
110 1100
ADSET
A
A
S
1 A
0111110
Set ICSET [P2]=1
Data
NA
P
R/W
Regarding address setting, please refer to ADSET command.
It will be able to read register values if it set address 24h or 25h.
Address does not increment automatically after register value read.
REG1:
Register
D7
D6
D5
D4
D3
D2
D1
D0
Address
REG1
0
0
P5
P4
P3
P2
P1
P0
24h
REG2
P7
P6
P5
P4
P3
P2
P1
P0
25h
P5 = Bias setting
P4 = Internal/External clock setting
P3 = Software Reset setting
P2 to P0 = Blink setting
REG2:
P7 to P6 = Frame Frequency (FR) setting
P5 to P4 = Power Save Mode (SR) setting
P3 = Frame/Line inversion setting
P2 = Display ON/OFF setting
P1 = APON setting
P0 = APOFF setting
Address map between ADSET and ICSET is shown as follows;
RAM address
Write Mode
ADSET
D7
D6
D5
D[4:0]
D7
D6
D5
D4
D3
D2*
D1
D0
0
0
0
0
0
0
0 0000 to 1 1111
0 0000 to 0 0011
1
1
1
1
1
1
0
0
1
1
0
1
0
0
0
0
00 0000 to 01 1111 (bin)
10 0000 to 10 0011 (bin)
RAM address
ICSET
Read mode
ADSET
ICSET
D7
D6
D5
D[4:0]
D7
D6
D5
D4
D3
D2*
D1
D0
1
1
0
0
0
0
0 0000 to 1 1111
0 0000 to 0 0101
1
1
1
1
1
1
0
0
1
1
0
1
0
0
0
0
00 0000 to 01 1111 (bin)
10 0000 to 10 0101 (bin)
(Note) Please take care ICSET [P2] setting.
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Datasheet
MAX 144 segments (SEG36×COM4)
OSCILLATOR
The clock signals for logic and analog circuit can be generated from internal oscillator or external clock.
If internal oscillator circuit is used, OSCIN must be connected to VSS level.
When using external clock mode, input external clock from OSCIN terminal after ICSET command setting.
OSCIN
OSCIN
BU9797
Clock
BU9797
VSS
VSS
Figure 10. Internal oscillator circuit mode
Figure 11. Ext clock input mode
LCD Driver Bias Circuit
This device generates LCD driving voltage with on-chip Buffer AMP.
And it can drive LCD at low power consumption.
1/3 and 1/2Bias can set in MODESET command.
Line and frame inversion can set in DISCTL command.
Refer to the “LCD driving waveform” about each LCD driving waveform.
Blink timing generator
This device has Blink function.
This device will be Blink mode with BLKCTL command.
Blink frequency varies widely by characteristic of fCLK, when internal oscillation circuit.
About the characteristics of fCLK, refer to Oscillation Characteristics.
Reset initialize condition
Initial condition after execute Software Reset is as follows.
・Display is OFF.
・DDRAM address is initialized (DDRAM Data is not initialized).
Refer to Command Description about initialize value of register.
Command / Function List
Description List of Command / Function
No.
Command
Function
1
Set IC Operation (ICSET)
Software reset, internal/external clock setting
2
Display control (DISCTL)
Frame frequency, power save mode setting
3
Address set (ADSET)
DRAM address setting (00h to 23h)
Register address setting (24 to 25h)
4
Mode set (MODESET)
Display on/off,1/2bias,1/3bias
5
Blink control (BLKCTL)
Blink off/0.5s/1s/2s/3s/5s blink setting
6
All pixel control (APCTL)
All pixels on/off during DISON
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Datasheet
MAX 144 segments (SEG36×COM4)
Detailed command description
D7 (MSB) is bit for command or data judgment.
Refer to Command and data transfer method.
C: 0: Next byte is RAM write data.
1: Next byte is command.
Set IC Operation (ICSET)
MSB
D7
D6
D5
C
1
1
D4
0
D3
1
D2
P2
D1
P1
LSB
D0
P0
P2: MSB data of DDRAM address. Please refer to “ADSET” command.
Set Software Reset condition.
Setup
P1
No operation
0
Software reset
1
When “Software Reset” is executed, this device is reset to initial condition. (Refer to Reset initialize condition)
Don’t set Software Reset (P1) with P2, P0 at the same time.
Switch between internal clock and external clock.
Setup
Internal clock
External clock input
P0
0
1
In Internal clock mode:
In external clock input mode::
Initial condition
○
OSCIN must be connect to VSS level.
Input external clock from OSCIN terminal..
Command
ICSET
OSCIN_EN
( Internal signal)
Internal clock mode
External clock mode
Internal oscillation
( Internal signal)
External clock
( OSCIN )
OSC MODE switch timing
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Datasheet
MAX 144 segments (SEG36×COM4)
Display control (DISCTL)
MSB
D7
D6
D5
C
0
1
D4
P4
D3
P3
D2
P2
LSB
D0
P0
D1
P1
Set Power save mode FR.
Setup
Normal mode(80Hz)
Power save mode1(71Hz)
Power save mode2(64Hz)
Power save mode3(53Hz)
P4
P3
0
0
1
1
0
1
0
1
Reset initialize
condition
○
(Note) Operation current decrease in order as
Normal mode > Power save mode1 > Power save mode2 > Power save mode 3.
Set LCD drive waveform.
Setup
Line inversion mode
Frame inversion mode
P2
0
1
Reset initialize
condition
○
(Note) Operation current is Line inversion > Frame inversion
Regarding driving waveform, refer to LCD driving waveform.
Set Power save mode SR.
Setup
Power save mode 1
Power save mode 2
Normal mode
High power mode
P1
P0
0
0
1
1
0
1
0
1
Reset initialize
condition
○
(Note1) Operation current increase in order as
Power save mode 1 < Power save mode 2 < Normal mode < High power mode.
(Note2) Please use VDD- VLCD ≥ 3.0V in High power mode condition.
(Reference current consumption data)
Setup
Current consumption
Power save mode 1
×0.5
Power save mode 2
×0.67
Normal mode
×1.0
High power mode
×1.8
(Note) Above current consumption data is reference value. Change according to panel load.
Power save mode FR / LCD drive waveform / Power save mode SR will affect display image.
Select the best setting in point of current consumption and display image view using LCD panel.
Mode
Flicker
Display grade/Contrast
Power save mode FR
○
LCD waveform
○
○
Power save mode SR
○
Address set (ADSET)
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
C
0
0
P4
P3
P2
P1
P0
In the write mode, the range of address can be set from 000000 to 100011(bin).
In the read mode, the range of address can be set from 000000 to 100101(bin).
(Note) Address [5:0]: MSB bit is specified in ICSET P2 and [4:0] are specified as ADSET P4 - P0.
Don’t specify another address, otherwise address will be set to “000000”.
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Datasheet
MAX 144 segments (SEG36×COM4)
Mode Set (MODE SET)
MSB
D7
D6
D5
C
1
0
D4
*
D3
P3
D2
P2
D1
*
LSB
D0
*
(* : Don’t care)
Set display ON and OFF.
Setup
Reset initialize
condition
○
P3
Display OFF (DISPOFF)
Display ON (DISPON)
0
1
Display OFF: Despite of the contents of DDRAM, All of SEGMENT and COMMON output will stop after
1 frame period. Display OFF mode will finish in Display ON (DISPON).
Display ON: SEGMENT and COMMON output is active, start read operation to Display from DDRAM.
Set Bias level
Setup
Reset initialize
condition
○
P2
1/3 Bias
0
1/2 Bias
1
Regarding driving waveform, refer to LCD driving waveform.
Blink control (BLKCTL)
MSB
D7
D6
D5
C
1
1
D4
1
D3
0
D2
P2
D1
P1
LSB
D0
P0
Set Blink condition.
Setup
P2
P1
P0
OFF
0.5Hz
1Hz
2Hz
0.3Hz
0.2Hz
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
All pixel control (APCTL)
MSB
D7
D6
D5
C
1
1
D4
1
D3
1
Reset initialize
condition
○
D2
1
D1
P1
LSB
D0
P0
All display Set ON, OFF
Setup
Normal
All pixel ON (APON)
Setup
P1
0
1
P0
Reset initialize
condition
○
Reset initialize
condition
○
Normal
0
All pixel OFF (APOFF)
1
All pixels ON
: All pixels are ON regardless of DDRAM data.
All pixels OFF
: All pixels are OFF regardless of DDRAM data.
(Note) All pixels ON/OFF is effective only at Display ON status. The contents of DDRAM do not change at this time.
When set P1 and P0=’1’, APOFF is selected. APOFF has higher priority than APON.
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Datasheet
MAX 144 segments (SEG36×COM4)
LCD driving waveform
(1/3bias)
Line inversion
Frame inversion
SEGn SEGn+1 SEGn+2 SEGn+3
SEGn SEGn+1 SEGn+2 SEGn+3
COM0
stateA
COM0
stateA
COM1
stateB
COM1
stateB
COM2
COM2
COM3
COM3
VDD
1frame
1frame
VDD
COM0
COM0
VLCD
VLCD
VDD
VDD
COM1
COM1
VLCD
VDD
VLCD
VDD
COM2
COM2
VLCD
VDD
VLCD
VDD
COM3
COM3
VLCD
VLCD
VDD
VDD
SEGn
SEGn
VLCD
VLCD
VDD
VDD
SEGn+1
SEGn+1
VLCD
VDD
VLCD
VDD
SEGn+2
SEGn+2
VLCD
VDD
VLCD
VDD
SEGn+3
SEGn+3
VLCD
VLCD
stateA
(COM0-SEGn)
stateB
(COM1-SEGn)
stateA
(COM0-SEGn)
stateB
(COM1-SEGn)
Figure 12. LCD waveform at line inversion (1/3bias)
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Figure 13.
14/25
LCD waveform at frame inversion (1/3bias)
TSZ02201-0P4P0D300820-1-2
5.Aug.2014 Rev.001
BU9797FUV
Datasheet
MAX 144 segments (SEG36×COM4)
(1/2bias)
Line inversion
Frame inversion
SEGn SEGn+1 SEGn+2 SEGn+3
SEGn SEGn+1 SEGn+2 SEGn+3
COM0
stateA
COM0
stateA
COM1
stateB
COM1
stateB
COM2
COM2
COM3
COM3
VDD
1frame
1frame
VDD
COM0
COM0
VLCD
VLCD
VDD
VDD
COM1
COM1
VLCD
VLCD
VDD
VDD
COM2
COM2
VLCD
VLCD
VDD
VDD
COM3
COM3
VLCD
VLCD
VDD
VDD
SEGn
SEGn
VLCD
VLCD
VDD
VDD
SEGn+1
SEGn+1
VLCD
VLCD
VDD
VDD
SEGn+2
SEGn+2
VLCD
VLCD
VDD
VDD
SEGn+3
SEGn+3
VLCD
stateA
(COM0-SEGn)
stateB
(COM1-SEGn)
Figure 14. LCD waveform in line inversion (1/2bias)
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VLCD
stateA
(COM0-SEGn)
stateB
(COM1-SEGn)
Figure 15. LCD waveform in frame inversion (1/2bias)
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Datasheet
MAX 144 segments (SEG36×COM4)
Example of display data
If LCD layout pattern is like as Figure 16, Figure 17, and display pattern is like as Figure 18.
Display data will be shown as follows;
COM0
COM1
COM2
COM3
Figure 16. E.g. COM line pattern
SEG1 SEG3
SEG2
SEG5 SEG7
SEG4 SEG6 SEG8
SEG9
SEG10
Figure 17. E.g. SEG line pattern
Figure 18. E.g. Display pattern
S
E
G
0
S
E
G
1
S
E
G
2
S
E
G
3
S
E
G
4
S
E
G
5
S
E
G
6
S
E
G
7
S
E
G
8
S
E
G
9
S
E
G
10
S
E
G
11
S
E
G
12
S
E
G
13
S
E
G
14
S
E
G
15
S
E
G
16
S
E
G
17
S
E
G
18
S
E
G
19
COM0
D0
0
1
1
0
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
0
COM1
D1
0
0
1
1
1
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
COM2
D2
0
0
0
1
0
1
0
0
1
0
1
0
0
0
0
0
0
0
0
0
COM3
D3
0
0
1
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
Address
00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h
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Datasheet
MAX 144 segments (SEG36×COM4)
Initialize sequence
Please follow below sequence after Power-on to set this LSI to initial condition.
Power on
↓
STOP condition
↓
START condition
↓
Issue slave address
↓
Execute Software Reset by sending ICSET command.
(Note) Each register value and DDRAM address, DDRAM data are random condition after power on till initialize sequence is executed.
D7
D6
D5
D4
D3
D2
D1
D0
Descriptions
VDD=0→5V (Tr: max 5ms)
Initialize IC
Stop condition
Start condition
1
1
1
1
1
0
0
Issue slave address
1
1
1
0
1
0
1
0
Software Reset
1
1
1
1
0
0
0
0
Blink OFF
1
0
1
0
0
1
0
0
80Hz, Frame inv., Power save mode1
1
1
1
0
1
0
0
1
External clock input
0
0
0
0
0
0
0
0
RAM address set
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
address
address
00h to 01h
02h to 03h
*
*
*
*
*
*
*
*
address
22h to 23h
…
0
…
Start sequence
Start sequence example1
No.
Input
1
Power on
↓
2
wait 100µs
↓
3
Stop
↓
4
Start
↓
5
Slave address
↓
6
ICSET
↓
7
BLKCTL
↓
8
DISCTL
↓
9
ICSET
↓
10
ADSET
↓
11
Display Data
Display Data
12
13
14
15
16
Display Data
↓
Stop
↓
Start
↓
Slave address
↓
MODESET
↓
Stop
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Stop condition
Start condition
0
1
1
1
1
1
0
0
Issue slave address
1
1
0
*
1
0
*
*
Display ON, 1/3bias
Stop condition
*: don’t care
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BU9797FUV
Datasheet
MAX 144 segments (SEG36×COM4)
Start sequence example2
Initialize
Initialize Sequence
DISPON
DISPON Sequence
RAM write
RAM write Sequence
DISPOFF
DISPOFF Sequence
This LSI is initialized with Initialize Sequence. And start to display with DISPON Sequence.
This LSI will update display data with RAM write Sequence. And stop the display with DISPOFF sequence.
If you want to restart to display, This LSI will restart to display with DISPON Sequence.
Initialize sequence
Input
Power on
Wait 100us
STOP
START
Slave address
APOFF
MODESET
ICSET
DISCTL
ICSET
ADSET
Display Data
D7
D6
D5
0
1
1
1
1
1
0
*
1
1
1
1
0
1
0
*
1
1
0
1
1
1
0
*
D7
D6
D5
0
1
1
1
1
1
0
1
1
1
1
1
1
1
0
D7
D6
D5
0
1
1
1
1
1
0
*
1
0
1
1
1
1
0
*
1
1
1
1
0
1
0
*
D7
D6
D5
0
1
1
1
1
0
DATA
D4
D3
1
1
*
0
1
0
0
*
D2
D1
D0
1
1
0
0
1
0
0
*
0
0
*
1
1
0
0
*
0
1
*
0
0
0
0
*
D2
D1
D0
1
1
0
1
0
0
1
0
0
*
0
0
0
0
*
D2
D1
D0
1
1
0
1
0
0
0
*
0
1
0
0
0
0
0
*
0
0
0
0
0
0
0
*
D2
D1
D0
1
0
0
0
0
0
1
1
0
1
0
1
0
*
Description
7C
Set all pixel off
Set display off
Software reset
Set DISCTL setting
Set MSB of RAM address
Set RAM address
STOP
DISPON sequence
Input
START
Slave address
DISCTL
BLKCTL
APCTL
MODESET
STOP
DATA
D4
D3
1
1
1
1
*
1
0
0
1
1
Description
7C
Set DISCTL setting
Set blink setting
Close all pixel on/off function
Set display on
RAM write sequence
Input
START
Slave address
DISCTL
BLKCTL
APCTL
MODESET
ICSET
ADSET
Display Data
DATA
D4
D3
1
1
1
1
0
0
0
*
1
0
0
1
1
1
0
*
Description
7C
Set DISCTL setting
Set blink setting
Close all pixel on/off function
Set display on
Set MSB of RAM address
Set RAM address
STOP
DISPOFF sequence
Input
START
Slave address
MODESET
STOP
DATA
D4
D3
1
0
1
0
Description
7C
Set display off
*: don’t care
Abnormal operation may occur in BU9797FUV due to the effect of noise or other external factor.
To avoid this phenomenon, please input command according to sequence described above during initialization, display
ON/OFF and refresh of RAM data.
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BU9797FUV
Datasheet
MAX 144 segments (SEG36×COM4)
DISCTL setup flow chart
START
Picture
quality
Reduce Power consumption
or
Best picture image quality
Power save FR = Normal Mode
Line inversion
Power save SR = High Power Mode
DISCTL setting
"10100011"
Power save FR = Save mode3
Frame inversion
Power save SR = Save mode1
DISCTL setting
"10111100"
Power save FR = Save mode2
Frame inversion
Power save SR = Save mode1
DISCTL setting
"10110100"
Power save FR = Save mode1
Line inversion
Power save SR = Save mode1
DISCTL setting
"10101100"
Power consumption
Power save FR = Save mode3
Frame inversion
Power save SR = Save mode1
DISCTL setting
"10111100"
No
Display flicker exist?
Yes
Power save FR = Save mode2
Frame inversion
Power save SR = Save mode1
DISCTL setting
"10110100"
No
Display flicker exist?
Yes
Power save FR = Save mode1
Frame inversion
Power save SR = Save mode1
DISCTL setting
"10101100"
No
Display flicker exist?
Yes
Power save FR = Normal
Frame inversion
Power save SR = Save mode1
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DISCTL setting
"10100100"
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BU9797FUV
Datasheet
MAX 144 segments (SEG36×COM4)
Cautions in Power ON/OFF
This device has “P.O.R” (Power-On Reset) circuit and Software Reset function.
Please keep the following recommended Power-On conditions in order to power up properly.
Please set power up conditions to meet the recommended tR, tF, tOFF, and Vbot spec below in order to ensure P.O.R
operation
VDD
tF
tR
tOFF
Vbot
Recommended condition of tR, tF, tOFF, Vbot (Ta=25°C)
tR
tF
tOFF
Vbot
Less than
Max 5ms
Max 5ms Min 20ms
0.3V
Figure 19. Power ON/OFF waveform
If it is difficult to meet above conditions, execute the following sequence after Power-On.
1. Generate STOP condition
Figure 20. Stop Condition
2. Generate START condition.
Figure 21. Start Condition
3. Issue slave address
4. Execute Software Reset (ICSET) command
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Datasheet
MAX 144 segments (SEG36×COM4)
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
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MAX 144 segments (SEG36×COM4)
Datasheet
Operational Notes – continued
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The
operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical
damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an
input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins
when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the
input pins have voltages within the values specified in the electrical characteristics of this IC.
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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BU9797FUV
Datasheet
MAX 144 segments (SEG36×COM4)
Ordering Information
B
U
9
7
9
7
F
U
V
Package
Part Number
FUV
: TSSOP-C48V
-
E2
Packaging and forming specification
E2: Embossed tape and reel
(TSSOP-C48V)
Lineup
Package
TSSOP-C48V
Reel of 2000
Orderable Part Number
BU9797FUV-E2
Marking Diagram
TSSOP-C48V (TOP VIEW)
Part Number Marking
BU9797FUV
LOT Number
1PIN MARK
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BU9797FUV
Datasheet
MAX 144 segments (SEG36×COM4)
Physical Dimension Tape and Reel Information
Package Name
TSSOP-C48V
Tape
Embossed carrier tape (with dry pack)
Quantity
2000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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)
∗ Order quantity needs to be multiple of the minimum quantity.
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Datasheet
MAX 144 segments (SEG36×COM4)
Revision History
Date
5.Aug.2014
Revision
001
Changes
New release
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
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