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PIMT1,115

PIMT1,115

  • 厂商:

    RUBYCON(红宝石)

  • 封装:

    SOT23-6

  • 描述:

    晶体管类型:2个PNP;集射极击穿电压(Vceo):40V;集电极电流(Ic):100mA;功率(Pd):600mW;集电极截止电流(Icbo):100nA;集电极-发射极饱和电压(VCE(sat)@...

  • 数据手册
  • 价格&库存
PIMT1,115 数据手册
Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia DISCRETE SEMICONDUCTORS DATA SHEET dbook, halfpage M3D302 PIMT1 PNP general purpose double transistor Product data sheet 2001 Oct 22 NXP Semiconductors Product data sheet PNP general purpose double transistor FEATURES PIMT1 PINNING • 600 mW total power dissipation PIN • Low current (max. 100 mA) 1, 4 emitter TR1; TR2 • Low voltage (max. 40 V) 2, 5 base TR1; TR2 • Reduces number of components and required PCB area 6, 3 collector TR1; TR2 DESCRIPTION • Reduced pick and place costs. APPLICATIONS 6 5 4 6 5 4 • General purpose switching and amplification. TR2 TR1 DESCRIPTION PNP transistor pair in an SC-74 (SOT457) plastic package. 1 2 3 1 Top view 2 3 MAM457 MARKING TYPE NUMBER MARKING CODE PIMT1 Fig.1 M1 Simplified outline (SC74; SOT457) and symbol. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT Per transistor VCBO collector-base voltage open emitter − −50 V VCEO collector-emitter voltage open base − −40 V VEBO emitter-base voltage open collector − −5 V IC collector current (DC) − −100 mA ICM peak collector current − −200 mA IBM peak base current − −200 mA Ptot total power dissipation − 300 mW Tstg storage temperature −65 +150 °C Tj junction temperature − 150 °C Tamb operating ambient temperature −65 +150 °C − 600 mW Tamb ≤ 25 °C; note 1 Per device Ptot total power dissipation Tamb ≤ 25 °C; note 1 Note 1. Device mounted on a printed-circuit board, single sided copper, tinplated and mounting pad for collector 1 cm2. 2001 Oct 22 2 NXP Semiconductors Product data sheet PNP general purpose double transistor PIMT1 THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER CONDITIONS thermal resistance from junction to ambient note 1 VALUE UNIT 208 K/W Note 1. Device mounted on a printed-circuit board, single sided copper, tinplated and mounting pad for collector 1 cm2. CHARACTERISTICS Tamb = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT Per transistor VCB = −30 V; IE = 0 − −100 nA VCB = −30 V; IE = 0; Tj = 150 °C − −10 μA VEB = −4 V; IC = 0 − −100 nA DC current gain VCE = −6 V; IC = −1 mA 120 − VCEsat collector-emitter saturation voltage IC = −50 mA; IB = −5 mA; note 1 − −200 mV Cc collector capacitance VCB = −12 V; IE = Ie = 0; f = 1 MHz − 2.2 pF fT transition frequency VCE = −12 V; IC = −2 mA; f = 100 MHz 100 − MHz ICBO collector-base cut-off current IEBO emitter-base cut-off current hFE Note 1. Pulse test: tp ≤ 300 μs; δ ≤ 0.02. 2001 Oct 22 3 NXP Semiconductors Product data sheet PNP general purpose double transistor PIMT1 PACKAGE OUTLINE Plastic surface mounted package; 6 leads SOT457 D E B y A HE 6 X v M A 4 5 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION SOT457 2001 Oct 22 REFERENCES IEC JEDEC EIAJ SC-74 4 EUROPEAN PROJECTION ISSUE DATE 97-02-28 01-05-04 NXP Semiconductors Product data sheet PNP general purpose double transistor PIMT1 DATA SHEET STATUS DOCUMENT STATUS(1) PRODUCT STATUS(2) DEFINITION Objective data sheet Development This document contains data from the objective specification for product development. Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification. Notes 1. Please consult the most recently issued document before initiating or completing a design. 2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. DISCLAIMERS above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. General ⎯ Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Terms and conditions of sale ⎯ NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. Right to make changes ⎯ NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license ⎯ Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use ⎯ NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Export control ⎯ This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data ⎯ The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications ⎯ Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values ⎯ Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions 2001 Oct 22 5 NXP Semiconductors Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors. No changes were made to the content, except for the legal definitions and disclaimers. Contact information For additional information please visit: http://www.nxp.com For sales offices addresses send e-mail to: salesaddresses@nxp.com © NXP B.V. 2009 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613514/01/pp6 Date of release: 2001 Oct 22 Document order number: 9397 750 08728
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