LV5710GP

Ordering number : ENA1899 Bi-CMOS LSI LV5710GP Overview For camera sensor Power supply for charge pump The LV5710GP is power supply for charge pump for camera sensor. Functions • Regulating the 5V input by boosting it three-fold with the charge pump to the specified voltage. • Output voltage variable with external resistor. • Soft start function incorporated, which reduces the rush current at start of charge pump. • Timer-latch type short-circuit protective function incorporated. Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDD max Pd max Topr Tstg with specified substrate * Conditions Ratings 6.0 0.55 -20 to +80 -40 to +125 Unit V W °C °C * : Specified substrate : 114.3mm×76.1mm×1.6mm, glass epoxy board Allowable Operating Ratings at Ta = 25°C Parameter Supply voltage Input “H” voltage Input “L” voltage Symbol VDD VINH VINL EN pin EN pin Conditions min 4.5 1.5 -0.1 Ratings typ max 5.5 VDD 0.4 V V V Unit Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. D0810 SY 20101125-S00002 No.A1899-1/6 LV5710GP Electrical Characteristics at Ta = 25°C, VDD = 5V, IOUT = 30mA, S0 = L, S1 = L, Unless otherwise specified Parameter Circuit current drain Symbol IDD1 IDD2 Output load current Reference voltage IO ave VREF EN = L EN = H No load At VOUT = 12V setting VDD = 4.5 to 5.5V Ta = -20°C to +80°C, Design value Output voltage at OFF Protective circuit masking time Short-circuit protective current Short-circuit protective voltage SS end time RO load regulation Input pin current VOFF Tmask Ilim Vlim TSSEND ΔRO Iin Time from EN = H to regulator SS OFF Ta = -20°C to +80°C Design value Load 1mA → 30mA Pins EN S0 and S1 pins Power efficiency Rush current Oscillation frequency Peff Irush f clk CP+regulator No load 1.4 1.8 70 300 2.3 30 30 40 40 50 1 mV μA μA % mA MHz After capacitive discharge Masking time from detection of short-circuit to IC OFF 35 82.5 50 87.5 65 92.5 10 mA % ms 1.285 1.279 -50 0 18 1.305 12 Conditions min Ratings typ max 1 18 30 1.325 1.331 50 33 μA mA mA V V mV ms Unit Package Dimensions unit : mm (typ) 3368 0.8 Pd max -- Ta Mounted on a substrate : 114.3×76.1×1.6mm3 glass epoxy (0.13) 3.0 (0.125) Allowable power dissipation, Pd max – W TOP VIEW SIDE VIEW BOTTOM VIEW (C0.17) 3.0 0.6 0.55 0.4 0.4 20 2 0.25 0.5 (0.5) 1 0.2 0.25 SIDE VIEW 0.8 (0.035) 0 – 20 0 20 40 60 80 100 Ambient temperature, Ta – °C SANYO : VCT20(3.0X3.0) No.A1899-2/6 LV5710GP Pin Assignment 20 19 17 18 16 SVDD NC RO FB EN CPO NC C2P NC C1P 1 2 3 4 5 10 6 7 8 9 15 14 S1 TEST S0 SGND NC LV5710GP 13 12 11 PGND PVDD C2M C1M NC Top view Pin Function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name CPO NC C2P NC C1P PVDD NC C2M C1M PGND NC SGND S0 TEST S1 SVDD EN FB RO NC Small signal system GND pin Charge pump frequency changeover pin Test pin (open or short-circuited to GND) Charge pump frequency changeover pin Small signal system VDD pin System enable pin (Hi active) Regulator FB pin Regulator output pin Boost capacitor connection pin (driver side) Boost capacitor connection pin (driver side) Power GND pin for the charge pump Boost capacitor connection pin (charge transfer side) Power system VDD pin Boost capacitor connection pin (charge transfer side) Boost voltage output (6VDD or 5VDD) Function No.A1899-3/6 LV5710GP Block Diagram RO PVDD FB 4.7μF PGND 1μF vref + - CPO 1μF SVDD 1 μF SGND S0 2bit MUX C1P 0.22μF Divider C1M EN active Sequence Control Block 2MHz OSC C2M bandgap voltage reference Timing Control Step-Up Circuit C2P S1 Equivalent Circuit Diagram PVDD VIN = 4.5V to 5.5V M1 C1P + - M2 M3 C2P + 2VIN CPO +3VIN VIN Vref 3VIN + RO VOUT C1M CLK FB C2M No.A1899-4/6 LV5710GP Output Voltage Setting Method The output voltage of IC-incorporated LDO can be determined as follows : VH = R1+R2 R2 × VREF For example, to set the output voltage to 12V, set the resistance Value to R1 = 1070kΩ/R2 = 130kΩ. CPO RO R1 VREF = 1.3V FB R2 Short-circuit Protective Operation The RO output pin has the short-circuit protective function. The over-current detector circuit outputs the detection signal when the output current of 50mA (typ) or more flows or when the output voltage drops below 87.5% (typ). When this detection signal is output continuously for 18ms (typ) or more, IC determines that there is over-current and stops the output. To reset from the stop state, set the EN pin to “L”, then set the EN pin to “H” again. CPO RO + Output voltage FB detection comparator 0.875 × VREF Short-circuit + detection signal - Output current detection comparator VREF Equivalent circuit of the over-current detection circuit Selecting the Frequency According to the logic of S0 and S1, the charge pump operation frequency can be changed. In the case of light load, the reactive power can be reduced by decreasing the operating frequency. S0 L H L H S1 L L H H CP operating frequency 1MHz 500kHz 250kHz 125kHz No.A1899-5/6 LV5710GP Startup sequence Set EN = H after setting VDD = 4.5V or more VDD EN Charge pump output CPO Regulator output RO S0 S1 * CP clock 1MHz * CP clock 500kHz * CP clock 250kHz * CP clock 125kHz * IC internal signal Start at 1MHz SS end 10ms (max) Steady operation Start at 1MHz SS end 10ms (max) Steady operation Frequency selection Frequency selection Do not allow the signal to change Do not allow the signal to change Frequency selection Frequency selection Do not allow the signal to change Do not allow the signal to change Frequency selection Frequency selection Stop with EN = L or for overcurrent protection Never allow VDD to decrease below 4.5V till EN = L is established EN Pin and VDD The sequence operation is made at startup. However, startup is not made when the internal circuit has not been reset. To reset the internal circuit, keep the EN pin to “L” till VDD becomes 4.5V or more. Note that VDD and EN pin cannot be short-circuited for this purpose. Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of December, 2010. Specifications and information herein are subject to change without notice. PS No.A1899-6/6