BT111: Bluetooth® Smart Ready HCI Module
DATA SHEET
Monday, 05 August 2013
Version 1.25
Copyright © 2000-2013 Bluegiga Technologies
All rights reserved.
Bluegiga Technologies assumes no responsibility for any errors which may appear in this manual.
Furthermore, Bluegiga Technologies reserves the right to alter the hardware, software, and/or specifications
detailed here at any time without notice and does not make any commitment to update the information
contained here. Bluegiga’s products are not authorized for use as critical components in life support devices
or systems.
The WRAP is a registered trademark of Bluegiga Technologies
The Bluetooth trademark is owned by the Bluetooth SIG Inc., USA and is licensed to Bluegiga Technologies.
All other trademarks listed herein are owned by their respective owners.
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VERSION HISTORY
Version
Comment
1.0
First public release
1.1
Minor changes
1.2
FCC and CE update
1.21
Low energy master and slave mode supported
1.22
IC statement modified
1.23
Contact details updated
1.24
Formatting, reel dimensions
1.25
Recommended PCB land pattern added
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TABLE OF CONTENTS
1
BT111 Product numbering ............................................................................................................................7
2
Block Diagram ...............................................................................................................................................8
3
Pinout and Terminal Descriptions .................................................................................................................9
4
External Dimensions and Land Pattern ...................................................................................................... 11
5
Layout Guidelines ....................................................................................................................................... 13
5.1
6
BT111-A Layout Guide ....................................................................................................................... 13
Electrical Characteristics ............................................................................................................................ 15
6.1
Absolute Maximum Ratings ............................................................................................................... 15
6.2
Input/Output Terminal Characteristics ................................................................................................ 15
6.2.1
USB Linear Regulator ................................................................................................................... 15
6.2.2
High-voltage Linear Regulator ...................................................................................................... 16
6.2.3
Digital ............................................................................................................................................ 16
6.3
7
Current Consumption ......................................................................................................................... 17
RF Characteristics ...................................................................................................................................... 20
7.1
Transmitter Characteristics ................................................................................................................ 20
7.2
Receiver Characteristics .................................................................................................................... 21
7.3
Radiated Spurious Emissions ............................................................................................................ 22
7.4
Antenna Characteristics ..................................................................................................................... 22
8
Clock Generation ........................................................................................................................................ 23
9
Bluetooth Stack Microcontroller .................................................................................................................. 24
10
Programmable I/O Ports ......................................................................................................................... 24
11
Wi-Fi Coexistence Interface .................................................................................................................... 24
12
Memory Management ............................................................................................................................. 25
12.1
Memory Management Unit ................................................................................................................. 25
12.2
System RAM ...................................................................................................................................... 25
12.3
Internal ROM Memory (5Mb) ............................................................................................................. 25
12.4
Internal EEPROM ............................................................................................................................... 25
13
Serial Interfaces ...................................................................................................................................... 26
13.1
USB Interface ..................................................................................................................................... 26
13.2
Programming and Debug Interface .................................................................................................... 26
14
Audio Interfaces ...................................................................................................................................... 27
14.1
PCM Interface .................................................................................................................................... 27
14.1.1 PCM Interface Master/Slave ......................................................................................................... 27
14.1.2 Long Frame Sync .......................................................................................................................... 28
14.1.3 Short Frame Sync ......................................................................................................................... 28
14.2
Multi-slot Operation ............................................................................................................................ 29
14.2.1 GCI Interface ................................................................................................................................. 29
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14.2.2 Slots and Sample Formats ............................................................................................................ 30
14.2.3 Additional Features ....................................................................................................................... 31
14.2.4 PCM Timing Information ............................................................................................................... 31
14.2.5 PCM_CLK and PCM_SYNC Generation ...................................................................................... 35
14.2.6 PCM Configuration ........................................................................................................................ 36
14.3
15
2
Digital Audio Interface (I S) ................................................................................................................ 36
Power Control and Regulation ................................................................................................................ 41
15.1
Voltage Regulator Enable .................................................................................................................. 41
15.2
USB Linear Regulator ........................................................................................................................ 41
15.3
High Voltage Linear Regulator ........................................................................................................... 41
15.4
Low Voltage Linear Regulators .......................................................................................................... 42
15.5
Powering Sequence ........................................................................................................................... 42
15.6
Reset .................................................................................................................................................. 42
16
Example Schematic ................................................................................................................................ 43
17
Software .................................................................................................................................................. 44
17.1
On-chip Software ................................................................................................................................ 45
17.1.1 Bluetooth HCI Stack ...................................................................................................................... 45
17.1.2 Latest Feature of the HCI Stack .................................................................................................... 45
18
Soldering Recommendations .................................................................................................................. 46
19
Certifications ........................................................................................................................................... 47
19.1
Bluetooth ............................................................................................................................................ 47
19.2
FCC/IC (USA/Canada) ....................................................................................................................... 47
19.2.1 FCC et IC ...................................................................................................................................... 48
19.3
CE (Europe) ....................................................................................................................................... 49
19.4
Japan .................................................................................................................................................. 50
20
Moisture Sensitivity Level (MSL) classification ....................................................................................... 51
21
Packaging and Reel Information ............................................................................................................. 52
22
Contact Information................................................................................................................................. 54
Bluegiga Technologies Oy
BT111: Bluetooth Smart Ready HCI Module
KEY FEATURES
DESCRIPTION
BT111
is
a
low
cost
and
ultrasmall Bluetooth Smart Ready HCI module that
is
designed
for
applications where
both Bluetooth
classic
and Bluetooth low
energy connectivity is needed. BT111
integrates a Bluetooth 4.0 dual mode radio,
HCI software stack, USB interface and an
antenna. BT111 is compatible with Windows
and Linux operating systems and Microsoft
and BlueZ Bluetooth stacks and offers OEMs
fast
and
risk
free
way
to
integrate Bluetooth 4.0 connectivity into their
applications.
APPLICATIONS
Health and fitness gateways
Point of sale
M2M connectivity
Automotive aftermarket
Personal navigation devices
Consumer electronics
Industrial
gateways
and
home
Bluetooth v.4.0, dual mode compliant
Support Bluetooth classic
Supports Bluetooth low
energy master and slave mode
Radio capabilities
Transmit power: +8dBm
Receiver sensitivity: -89dBm
Line-of-sight range: 100+ meters
Integrated antenna
Interfaces
HCI over USB host interface
802.11 co-existence interface
Software programmable GPIO
PCM or I2S audio interfaces
Supply voltage: 1.7V to 3.6V or 3.1V to
3.6V
Temperature range: -30C to +85C
Ultra compact size: 13.05mm x 9.30mm
Bluetooth, CE, FCC, IC and Japan
PHYSICAL OUTLOOK
automation
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1 BT111 Product numbering
Antenna:
A
= Internal
BT111-A-HCI
Firmware revision
Available products and product codes
Product code
Description
BT111-A-HCI
BT111 Bluetooth 4.0 HCI module with integrated antenna
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Page 7 of 54
2 Block Diagram
26MHz XTAL
Antenna
CSR8510
PIO3
RAM
PIO4
64k EEPROM
ROM
MMU
BPF
MCU
RF
LDO 3V3
5V0
3V3
I/O
PIO0
PIO1
PIO2
PIO5
3 x LDO
1V3
SPI / PCM
LDO 1V8
USB
1V8
Figure 1: Block diagram of BT111
CSR8510
BT111 is based on CSR8510 dual mode chip. The chip includes all the functions required for a complete
Bluetooth radio with on chip LDO regulators. The chip provides SPI, PCM and USB interfaces. Up to 4 general
purpose I/Os are available for general usage, such as Wi-Fi coexistence or general indicators.
Antenna
Antenna is a ceramic monopole chip antenna. See the antenna characteristics in chapter 7.
Band Pass Filter
The band pass filter filters the out of band emissions from the transmitter to meet the specific regulations for
type approvals of various countries.
64k EEPROM
The embedded 64k EEPROM can be used to store customizable parameters, such as maximum TX power,
PCM configuration, USB product ID, USB vendor ID and USB product description.
26MHz Crystal
The embedded 26MHz crystal is used for generating the internal digital clocks.
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Page 8 of 54
3 Pinout and Terminal Descriptions
GND
VREG_EN_RST#
VDD_PADS
VREG_OUT_HV
VREG_IN_USB
VDD_HOST
PIO0
PCM_OUT/SPI_MISO/PIO22
PIO01
SPI_PCM_SEL
GND
GND
USBUSB+
PCM_SYNC/SPI_CS/PIO23
PIO5
PIO2
PCM_CLK/SPI_CLK/PIO24
PCM_IN/SPI_MOSI/PIO21
GND
VREG_IN_HV
21
20
19
18
17
16
11
12
13
14
15
1
2
3
4
5
6
7
8
9
10
Figure 2: BT111
Power Supply
Pin No.
Pad Type
Description
Take high to enable internal regulators. Also
acts as active low reset. Maximum voltage is
VDD_PADS
Note: USB regulator is always enabled and
not controlled by this pin
VREG_EN_RST#
20
Input with strong
internal pull-down
VREG_IN_HV
10
Analogue regulator
input / output
VREG_OUT_HV
18
Analogue regulator
output
VREG_IN_USB
17
Analogue regulator
input
Input to USB regulator. Connect to external
USB bus supply, e.g. USB_VBUS
VDD_HOST
16
VDD
USB system positive supply
VDD_PADS
19
VDD
Positive supply for digital I/O pads
Input to internal high-voltage regulator to
1.8V regulator, 3.3V output from USB
regulator.
Output from internal high-voltage to 1.8V
regulator. Input to second stage internal
regulators.
Table 1: Supply Terminal Descriptions
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Page 9 of 54
PIO Port
Pin No.
Pad Type
Supply Domain
Description
PIO0
11
Bidirectional, tristate,
with weak internal pulldown
VDD_PADS
Programmable input/output line
PIO1
13
PIO2
6
PIO5
5
Table 2: I/O Terminal Descriptions
Pad Type
Supply
Domain
PCM Interface
Pin No.
Description
PCM_OUT/
SPI_MISO/
PIO22
12
Output, tristate, with
weak internal pull- VDD_PADS
down
PCM syncronous data output
SPI data output
Programmable input/output line
PCM_IN/
SPI_MOSI/
PIO21
8
Input, tristate, with weak internal
pull-down
PCM syncronous data input
SPI data input
Programmable input/output line
PCM_SYNC/
SPI_CS#/
PIO23
4
Bidirectional, tristate, with weak
internal pulldown
PCM syncronous dara sync
SPI chip select, active low
Programmable input/output line
PCM_CLK/
SPI_CLK/
PIO24
7
SPI_PCM#_SEL
14
PCM syncronous data clock
SPI clock
Programmable input/output line
High switches SPI/PCM lines to SPI, low
switches SPI/PCM lines to PCM/PIO use
Input with weak internal pull-down
Table 3: PCM Interface
USB Interface
Pin No.
Pad Type
Supply
Domain
Description
USB+
3
Bidirectional
VDD_HOST
USB data plus with selectable internal 1.5kΩ
pull-up resistor
USB-
2
USB data minus
Table 4: USB Interface
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Page 10 of 54
4 External Dimensions and Land Pattern
Figure 3: Footprint (top view)
Figure 4: Recommended PCB land pattern
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Page 11 of 54
7.3mm (+/- 0.1mm)
1.9mm (+/- 10%)
2.1mm (+/- 10%)
13.05mm (+/- 0.1mm)
9.3mm (+/- 0.1mm)
Figure 5: External dimensions
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Page 12 of 54
•
– Do not route supply voltage traces across separated GND regions so th
path for the return current is cut
MIC input
– Place LC filtering and DC coupling capacitors symmetrically as close to
pins as possible
–5 Place
MIC
biasing resistors symmetrically as close to microhone as pos
Layout
Guidelines
–Use Make
sure that the bias trace does not cross separated GND regions (D
good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog
signal
traces. If using
vias current
separated byis
max
3 mmIftothis
avoid is
emission
AGND)
so overlapping
that theground
pathplanes
for use
thestitching
return
cut.
not possibl
from the edges of the PCB. Connect all the GND pins directly to a solid GND plane and make sure that there
notimpedance
separate
GND
regions
but keep
one
solidtraces
GND
plane.
is a low
path for
the return
current following
the signal
and supply
all the
way from start to
the end.
–A good
Keep
the trace as short as possible
practice is to dedicate one of the inner layers to a solid GND plane and one of the inner layers to
supply voltage planes and traces and route all the signals on top and bottom layers of the PCB. This
arrangement will make sure that any return current follows the forward current as close as possible and any
loops are minimized.
Recommended PCB layer configuration
Signals
GND
Power
Signals
Figure 6: Typical 4-layer PCB construction
Overlapping GND layers without
GND stitching vias
Overlapping GND layers with
GND stitching vias shielding the
RF energy
Figure 7: Use of stitching vias to avoid emissions from the edges of the PCB
5.1 BT111-A Layout Guide
For optimal performance of the antenna place the module at the corner of the PCB of the mother board as
shown in the Figure 8. Optionally the module can be placed on the long edge of the mother board. In this case
the metal clearance area must be extended minimum 10mm from the edge of the module, as shown in Figure
8. The layout of the mother board has an impact on the antenna characteristic and radiation pattern, see the
antenna characteristics chapter. Do not place any metal (traces, components, battery etc.) within the
clearance area of the antenna. Connect all the GND pins directly to a solid GND plane. Place the GND vias as
close to the GND pins as possible. Use good layout practices to avoid any excessive noise coupling to signal
lines or supply voltage lines. Avoid placing plastic or any other dielectric material closer than 5 mm from the
antenna. Any dielectric closer than 5 mm from the antenna will detune the antenna to lower frequencies.
The antenna is optimized for mother board thickness of 1.0 mm. If the mother board is thicker than this, the
resonant frequency will be tuned downwards. If the mother board thickness is thinner than 1.0 mm, the
resonant frequency will be tuned upwards. S11 is a measure of how big portion of the transmitted power is
reflected back from the antenna. An adequate performance can be expected if S11 is less than – 7 dB. If
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Page 13 of 54
using PCB thickness more than 1.6 mm, or if there is dielectric material around the antenna which is likely to
detune the resonant frequency, the antenna can be tuned in the mother board layout by removing FR4 below
the antenna.
Min. 10mm
BT111
BT111
Mother board
Mother board
Metal clearance area
Figure 8: Recommended layouts for BT111-A
Figure 9: Impedance matching of the antenna of BT111 with two different mother board PCB thickness
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Page 14 of 54
6 Electrical Characteristics
6.1 Absolute Maximum Ratings
Rating
Min
Max
Unit
Storage temperature
-40
+85
VREG_IN_USB
-0.2
5.85
VREG_IN_HV
-0.2
4.9
VDD_HOST
-0.2
3.7
VDD_PADS
-0.2
3.7
Other terminal voltages
VSS - 0.4V
VDD + 0.4 V
⁰C
V
V
V
V
V
Table 5: Absolute maximum ratings
Rating
Min
Max
Unit
Operating temperature
-30
+85
VREG_IN_USB
4.25
VREG_IN_HV
2.3
VDD_HOST
3.1
5.75
4.8
3.6
3.6(*
⁰C
V
V
V
V
VDD_PADS
(*
(*
1.7
*) NOTE: The internal EEPROM is powered from VDD_PADS. To write the EEPROM,
minimum supply voltage is 2.7V and maximum is 3.3V. For reading the EEPROM the
minimum supply voltage is 1.7V and the maximum is 3.6V.
Table 6: Recommended operating conditions
6.2 Input/Output Terminal Characteristics
6.2.1
USB Linear Regulator
Rating
Min
Typ
Max
Unit
Input voltage
4.25
5.0
Output voltage
3.2
3.3
Output current
-
-
5.75
3.4
150
V
V
mA
Table 7: USB linear regulator
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Page 15 of 54
6.2.2
High-voltage Linear Regulator
Normal Operation
Min
Typ
Max
Unit
Input voltage
2.3
3.3
Output voltage
1.75
1.85
Temperature coefficient
Output noise (frequency range 100Hz to
100kHz)
Settling time (settling ti within 10% of final
value)
Output current
-200
-
4.8
1.95
200
V
V
ppm/⁰C
-
-
0.4
mV rms
-
-
5
µs
-
-
100
mA
Quiescent current (excluding load, Iload
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