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ESDLIN1524BJ

ESDLIN1524BJ

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOD323

  • 描述:

    ESD保护 VRWM=15,24V VBR(min)=17.1,25.4V VC=35,50V IPP=3,5A Ppp=160W SOD323

  • 数据手册
  • 价格&库存
ESDLIN1524BJ 数据手册
ESDLIN1524BJ Datasheet Automotive LIN bus ESD protection in SOD323 Features • • • AEC-Q101 qualified Asymetrical bidirectional ESD protection Low leakage current (IR max. < 50 nA at VRM) • 1 2 Product status link ESDLIN1524BJ Stand-off voltage: – -15 V (to comply with reverse battery) – +24 V (to comply with jump start) • High ESD protection level: up to 30 kV • ECOPACK2 RoHS compliant component Complies with the following standards • UL94, V0 • J-STD-020 MSL level 1 • IPC7531 footprint and JEDEC registered package • ISO 16750-2 (jump start and reversed battery tests) • ISO 10605 - C = 150 pF, R = 330 Ω: – ±30 kV (air discharge) – ±30 kV (contact discharge) • ISO 10605 - C = 330 pF, R = 330 Ω: – ± 30 kV (air discharge) – ± 30 kV (contact discharge) • ISO 7637-3: – Pulse 3a: -150 V – Pulse 3b: +150 V – Pulse 2a: +/- 85 V • ISO 17987-7 (LIN bus) • SAE J3076 (CXPI bus) Description The ESDLIN1524BJ is an asymmetrical TVS diode designed to protect one local interconnect network (LIN) bus and clock extension peripheral interface (CXPI) against electrostatic discharge (ESD) and other transient surges such as those defined in ISO 7637-3. The SOD323 is a small package that saves space on high density printed circuit board. DS4896 - Rev 5 - December 2021 For further information contact your local STMicroelectronics sales office. www.st.com ESDLIN1524BJ Characteristics 1 Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Value Unit ISO 10605 - C = 150 pF, R = 330 Ω: VPP Peak pulse voltage Contact discharge ±30 Air discharge ±30 ISO 10605 - C = 330 pF, R = 330 Ω: Contact discharge ±30 Air discharge ±30 PPP Peak pulse power dissipation (8/20 µs) Tstg kV 160 W Storage temperature range -65 to +175 °C Tj Operating junction temperature range -40 to +150 °C TL Maximum lead temperature for soldering during 10 s 260 °C Figure 1. Electrical characteristics (definitions) DS4896 - Rev 5 page 2/13 ESDLIN1524BJ Characteristics Table 2. Electrical characteristics (Tamb = 25° C, unless otherwise specified) Symbol Parameter Test condition From pin 2 to pin 1 VBR IR = 5 mA, tp < 50 ms From pin 1 to pin 2 IRM VCL From pin 2 to pin 1 VRM = 24 V From pin 1 to pin 2 VRM = 15 V From pin 2 to pin 1 IPP = 1 A From pin 1 to pin 2 IPP = 3 A From pin 2 to pin 1 IPP = 1 A From pin 1 to pin 2 IPP = 5 A αT(1)(2) Typ. Max. 25.4 27.8 30.3 17.1 18.9 20.3 1 50 Unit V nA 40 50 8/20 µs V 25 35 VR = 0 V, f = 1 MHz C Min. 16 20 From pin 2 to pin 1 9.6 From pin 1 to pin 2 8.8 pF 10-4/°C 1. Connections done according to Figure 2. 2. To calculate VBR or VCL versus junction temperature, use the following formulas: • VBR at TJ = VBR at 25 °C x (1 + αT x (TJ - 25)) • VCL at TJ = VCL at 25 °C x (1 + αT x (TJ - 25)). Figure 2. Clamping test conditions 2 V Voltage probe 50 Ω TEST BOARD 1 Ground plane Test configuration DS4896 - Rev 5 page 3/13 ESDLIN1524BJ Characteristics (curves) 1.1 Characteristics (curves) Figure 3. Relative variation of peak pulse power versus initial junction temperature PPP[Tj initial] / PPP [Tj initial = 25 °C] 1.1 Figure 4. Peak pulse power versus exponential pulse duration PPP(W) 1.E+03 Tj initial =25 °C 1.0 0.9 0.8 0.7 0.6 1.E+02 0.5 0.4 0.3 0.2 0.1 Tj (°C) 0.0 0 25 50 75 100 125 150 C(pF) 18 16 10 100 Figure 6. Junction capacitance versus line voltage, 24 V side 20 f = 1 MHz VOSC =30mVRMS Tj =25°C 15 V side 1 175 Figure 5. Junction capacitance versus line voltage, 15 V side 20 t P(µs) 1.E+01 C(pF) f =1 MHz VOSC =30 mVRM S TJ =25 °C 24 V side 18 16 14 14 12 12 10 10 8 8 6 6 4 4 2 2 VLINE(V) 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Figure 7. ESD response to ISO 10605 - C = 150 pF, R = 330 Ω (-8 kV contact discharge) DS4896 - Rev 5 VLINE(V) 0 0 2 4 6 8 10 12 14 16 18 20 22 24 Figure 8. ESD response to ISO 10605 C = 150 pF, R = 330 Ω (+8 kV contact discharge) page 4/13 ESDLIN1524BJ Characteristics (curves) Figure 9. Response to ISO 7637-3 pulse 2a: -85 V Figure 10. Response to ISO 7637-3 pulse 2a: +85 V Figure 11. Response to ISO 7637-3 pulse 3a: -150 V Figure 12. Response to ISO 7637-3 pulse 3b: +150 V DS4896 - Rev 5 page 5/13 ESDLIN1524BJ Package information 2 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 2.1 Package information Figure 13. SOD323 package outline L Table 3. SOD323 package mechanical data Dimensions Millimeters Ref. Min. A DS4896 - Rev 5 Max. 1.17 A1 0.00 0.10 A2 0.93 1.01 b 0.25 0.44 c 0.10 0.25 D 1.52 1.80 E 1.11 1.45 HD 2.30 2.70 L 0.10 0.46 Q1 0.10 0.41 page 6/13 ESDLIN1524BJ Packing information 2.2 Packing information Figure 15. Package orientation in reel Figure 14. Marking Bar indicates pin 1 MM 1 2 Pin 1 located according to EIA-481 MM: Marking The marking can be rotated by a multiple of 90° to differentiate assembly location. Note: Pocket dimensions are not on scale Pocket shape may vary depending on package Figure 16. Tape and reel orientation End Carrier tape Top cover tape Start 100 mm min 400 mm min 160 mm min Trailer Components Leader Figure 17. 7'' reel dimension for ESDLIN1524BJ Figure 18. Inner box dimension for 7'' reel 30 Ø 180 max 14.4 2±0.5 Ø 13 Ø 60 Ø 20.2 min 205 205 DS4896 - Rev 5 page 7/13 ESDLIN1524BJ Packing information Figure 19. 13’’ reel dimensions for ESDLIN1524BJ HQ Figure 20. Inner box dimensions for 13" reel 45 Ø 330 max 14.4 2±0.5 Ø 13 350 Ø 100 Ø 20.2 min 350 Figure 21. Tape outline Table 4. Tape dimension values Dimensions Millimeters Ref. DS4896 - Rev 5 Min. Typ. Max. D0 1.50 1.55 1.60 D1 1.00 F 3.45 3.50 3.55 K0 1.12 1.22 1.32 P0 3.90 4.00 4.10 P1 3.90 4.00 4.10 P2 1.95 2.00 2.05 W 7.90 8.00 8.30 page 8/13 ESDLIN1524BJ Recommendations on PCB assembly 3 Recommendations on PCB assembly 3.1 Footprint Figure 22. Recommended footprint in mm 3.2 Stencil opening design Stencil opening thickness: 75 to 125 µm / 3 to 5 mils Pad stencil aperture ratio: 90% Figure 23. Stencil opening recommendations DS4896 - Rev 5 page 9/13 ESDLIN1524BJ Solder paste 3.3 Solder paste 1. 2. 3. 4. 3.4 Placement 1. 2. 3. 4. 5. 6. 3.5 Manual positioning is not recommended. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering. Standard tolerance of ±0.05 mm is recommended. 1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. 2. 3.6 Halide-free flux, qualification ROL0 according to ANSI/J-STD-004. “No clean” solder paste recommended. Offers a high tack force to resist component movement during high speed. Use solder paste with fine particles: powder particle size is 20-38 μm. To control the solder paste amount, the closed via is recommended instead of open vias. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is paste printing, pick and place and reflow soldering by using optimized tools. Reflow profile Figure 24. ST ECOPACK recommended soldering reflow profile for PCB mounting 250 240-245 °C Temperature (°C) -2 °C/s 2 - 3 °C/s 60 sec (90 max) 200 -3 °C/s 150 -6 °C/s 100 0.9 °C/s 50 Time (s) 0 Note: DS4896 - Rev 5 30 60 90 120 150 180 210 240 270 300 Minimize air convection currents in the reflow oven to avoid component movement. O2 rate inside the oven must be below 500 ppm. Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020. page 10/13 ESDLIN1524BJ Ordering information 4 Ordering information Table 5. Ordering information Order code Marking(1) Package Weight Base qty. Delivery mode ESDLIN1524BJ 24 SOD 323 5 mg 3000 Tape and reel ESDLIN1524BJ-HQ 24 SOD 323 5 mg 10000 Tape and reel 1. The marking can be rotated by multiples of 90° to differentiate assembly location DS4896 - Rev 5 page 11/13 ESDLIN1524BJ Revision history Table 6. Document revision history Date Version Changes 28-Aug-2006 1 Initial release. 22-Sep-2006 2 Added Figure 6 Placement and layout recommendations 18-Jan-2013 3 Updated Table6. Added Figure 10 and Figure 11. Updated title and cover page. Updated Table 1: "Absolute maximum ratings (limiting values) Tamb = 25° C" and Table 3: "Electrical characteristics (Tamb = 25 °C)". 17-Oct-2017 4 Added Figure 8: "Response to ISO 7637-3 pulse 3a (Us = -150 V)", Figure 9: "Response to ISO 7637-3 pulse 3b (Us = 100 V)", Figure 10: "ESD response to ISO 16605 ( C = 150 pF, R = 330 Ω, 8 kV contact)" and Figure 11: "ESD response to ISO 16605 ( C = 150 pF, R = 330 Ω, 8 kV contact)". Minor text changes to improve readability. 29-Dec-2021 DS4896 - Rev 5 5 Added reel definitions. Minor text changes. page 12/13 ESDLIN1524BJ IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved DS4896 - Rev 5 page 13/13
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