L6386AD

L6386AD High voltage high and low-side driver Datasheet - production data Description SO-14 Features  High voltage rail up to 600 V  dV/dt immunity ± 50 V/nsec in full temperature range  Driver current capability – 400 mA source – 650 mA sink  Switching times 50/30 nsec rise/fall with 1 nF load  CMOS/TTL Schmitt trigger inputs with hysteresis and pull-down  Undervoltage lockout on lower and upper driving section  Integrated bootstrap diode  Outputs in phase with inputs Applications  Home appliances  Induction heating  Industrial applications and drives  Motor drivers – SR motors, – DC, AC, PMDC and PMAC motors The L6386AD is a high voltage gate driver, manufactured with the BCD ™ “offline” technology, and able to drive simultaneously one high and one low-side power MOSFET or IGBT device. The high-side (floating) section is able to work with voltage rail up to 600 V. Both device outputs can independently sink and source 650 mA and 400 mA respectively and can be simultaneously driven high in order to drive asymmetrical half-bridge configurations. The L6386AD device provides two input pins, two output pins and an enable pin (SD), and guarantees the outputs switch in phase with inputs. The logic inputs are CMOS/TTL compatible to ease the interfacing with controlling devices. The L6386AD integrates a comparator (inverting input internally referenced to 0.5 V) that can be used to protect the device against fault events, like overcurrent. The DIAG output is a diagnostic pin, driven by the comparator, and used to signal a fault event occurrence to the controlling device. The bootstrap diode is integrated in the driver allowing a more compact and reliable solution. The L6386AD device features the UVLO protection on both supply voltages (VCC and VBOOT) ensuring greater protection against voltage drops on the supply lines. The device is available in a SO-14 package, in tube, and tape and reel packaging.  Asymmetrical half-bridge topologies  HVAC  Lighting applications  Factory automation  Power supply systems March 2016 This is information on a product in full production. DocID14914 Rev 3 1/17 www.st.com Contents L6386AD Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 4 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.4 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.3 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.1 SO-14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 DocID14914 Rev 3 L6386AD 1 Block diagram Block diagram Figure 1. Block diagram #005453"1
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-0"% -7( -7( %3*7&3 -*/ $#005   1(/%  73&'   %*"(  4(/%   $*/ %*/%W DocID14914 Rev 3 3/17 17 Electrical data L6386AD 2 Electrical data 2.1 Absolute maximum ratings Table 1. Absolute maximum ratings Symbol Value Unit VOUT Output voltage -3 to VBOOT - 18 V VCC Supply voltage - 0.3 to +18 V -1 to 618 V VBOOT Floating supply voltage Vhvg High-side gate output voltage - 1 to VBOOT V Vlvg Low-side gate output voltage -0.3 to VCC +0.3 V Logic input voltage -0.3 to VCC +0.3 V VDIAG Open drain forced voltage -0.3 to VCC +0.3 V VCIN Comparator input voltage -0.3 to 10 V V dVout/dt Allowed output slew rate 50 V/ns Total power dissipation (TJ = 85 °C) 750 mW Tj Junction temperature 150 °C Tstg Storage temperature -50 to 150 °C SO-14 Unit 165 °C/W Vi Ptot 2.2 Parameter Thermal data Table 2. Thermal data Symbol Rth(JA) 2.3 Parameter Thermal resistance junction to ambient Recommended operating conditions Table 3. Recommended operating conditions Symbol Pin VOUT 12 VBS(2) 14 fsw VCC TJ Parameter Min. Max. Unit (1) 580 V Floating supply voltage (1) 17 V 400 kHz 17 V 125 °C HVG, LVG load CL = 1 nF Supply voltage Junction temperature -45 1. If the condition VBOOT - VOUT < 18 V is guaranteed, VOUT can range from -3 to 580 V. 2. VBS = VBOOT - VOUT. 4/17 Typ. Output voltage Switching frequency 4 Test condition DocID14914 Rev 3 L6386AD 2.4 Electrical data Pin connection Figure 2. Pin connection (top view) -*/   7#005 4%   )7( )*/   065 7$$   /$ %*"(   /$ $*/   -7( 4(/%   1(/% %*/"W Table 4. Pin description No. Pin Type Function 1 LIN I Low-side driver logic input 2 SD(1) I Shutdown logic input 3 HIN I High-side driver logic input 4 VCC P Low voltage supply 5 DIAG O Open drain diagnostic output 6 CIN I Comparator input 7 SGND P Ground 8 PGND P Power ground 9 LVG(1) O Low-side driver output 10, 11 N.C. 12 OUT Not connected P High-side driver floating driver 13 HVG (1) O High-side driver output 14 VBOOT P Bootstrapped supply voltage 1. The circuit guarantees 0.3 V maximum on the pin (at Isink = 10 mA), with VCC > 3 V. This allows to omit the “bleeder” resistor connected between the gate and the source of the external MOSFET normally used to hold the pin low; the gate driver assures low impedance also in SD condition. DocID14914 Rev 3 5/17 17 Electrical characteristics L6386AD 3 Electrical characteristics 3.1 AC operation Table 5. AC operation electrical characteristics (VCC = 15 V; TJ = 25 °C) Symbol Pin ton 1, 3 vs. 9, 13 toff tsd 2 vs. 9,13 tr 9, 13 tf 3.2 Parameter Test condition Min. Typ. Max. Unit 110 150 ns 110 150 ns 105 150 High/low-side driver turn-on propagation delay High/low-side driver turn-off propagation delay VOUT = 0 V Shutdown to high/low-side propagation delay Rise time CL = 1000 pF 50 ns Fall time CL = 1000 pF 30 ns DC operation Table 6. DC operation electrical characteristics (VCC = 15 V; TJ = 25 °C) Symbol Pin Parameter Test condition Min. Typ. Max. Unit Low supply voltage section VCCth1 VCC UV turn-on threshold 9.1 9.6 10.1 V VCCth2 VCC UV turn-off threshold 7.9 8.3 8.8 V VCChys 4 VCC UV hysteresis IQCCU Undervoltage quiescent supply current IQCC Quiescent current 1.3 V VCC 9 V 200 A VCC = 15 V 250 320 A Bootstrapped supply section VBTh1 VBOOT UV turn-on threshold 8.5 9.5 10.5 V VBTh2 VBOOT UV turn-off threshold 7.2 8.2 9.2 V VBHys 14 IQBOOT VBOOT UV hysteresis 1.3 HVG ON 200 A Vhvg = VOUT = VBOOT = 600 V 10 A VBOOT quiescent current High voltage leakage current ILK Bootstrap driver on-resistance(1) RDS(on) V VCC 12.5 V VIN = 0 V 125  Driving buffers section Iso 9, 13 High/low-side source short-circuit current VIN = Vih (tp < 10 s) 300 400 mA Isi 9, 13 High/low-side sink short-circuit current VIN = Vil (tp < 10 s) 500 650 mA 6/17 DocID14914 Rev 3 L6386AD Electrical characteristics Table 6. DC operation electrical characteristics (continued) (VCC = 15 V; TJ = 25 °C) Symbol Pin Parameter Test condition Min Typ Max Unit Logic inputs Low level logic voltage Vil Vih Iih 1, 2, 3 Iil 1.5 High level logic voltage V 3.6 High level logic input current VIN = 15 V Low level logic input current VIN = 0 V V 50 70 A 1 A 10 mV Sense comparator Vio Input offset voltage -10 VCIN 0.5 Iio 6 Input bias current Vol 2 Open drain low level output voltage Vref Iod = -2.5 mA Comparator reference voltage A 0.2 0.46 0.50 0.8 V 0.54 V 1. RDS(on) is tested in the following way:  V CC – V BOOT1  –  V CC – V BOOT2  R DSON = ----------------------------------------------------------------------------------------------I 1  V CC ,V BOOT1  – I 2  V CC ,V BOOT2  where I1 is the pin 14 current when VBOOT = VBOOT1, I2 when VBOOT = VBOOT2. 3.3 Timing diagram Figure 3. Input/output timing diagram(1) )*/ -*/ 4% )065 -065 73&' 7$*/ %*"( %*/"W 1. If the SD is set low, each output remains in the shutdown condition also after the rising edge of the SD, until the first rising edge of the input signal occurs. DocID14914 Rev 3 7/17 17 Bootstrap driver 4 L6386AD Bootstrap driver A bootstrap circuitry is needed to supply the high voltage section. This function is normally accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6386AD device a patented integrated structure replaces the external diode. It is realized by a high voltage DMOS, driven synchronously with the low-side driver (LVG), with a diode in series, as shown in Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving voltage. The diode connected in series to the DMOS has been added to avoid undesirable turn-on. CBOOT selection and charging To choose the proper CBOOT value, the external MOSFET can be seen as an equivalent capacitor. This capacitor CEXT is related to the MOSFET total gate charge: Equation 1 Q gate C EXT = --------------V gate The ratio between the capacitors CEXT and CBOOT is proportional to the cyclical voltage loss. It has to be: CBOOT>>>CEXT E.g.: if Qgate is 30 nC and Vgate is 10 V, CEXT is 3 nF. With CBOOT = 100 nF the drop would be 300 mV. If HVG has to be supplied for a long time, the CBOOT selection has to take into account also the leakage losses. E.g.: HVG steady state consumption is lower than 200 A, so if HVG TON is 5 ms, CBOOT has to supply 1 C to CEXT. This charge on a 1 F capacitor means a voltage drop of 1 V. The internal bootstrap driver gives great advantages: the external fast recovery diode can be avoided (it usually has a great leakage current). This structure can work only if VOUT is close to GND (or lower) and in the meanwhile the LVG is on. The charging time (Tcharge ) of the CBOOT is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor. The bootstrap driver introduces a voltage drop due to the DMOS RDS(on) (typical value: 125 ). At low frequency this drop can be neglected. Anyway increasing the frequency it must be taken into account. The following equation is useful to compute the drop on the bootstrap DMOS: Equation 2 Q gate V drop = I ch arg e R dson  V drop = -------------------R dson T ch arg e where Qgate is the gate charge of the external power MOSFET, Rdson is the on-resistance of the bootstrap DMOS, and Tcharge is the charging time of the bootstrap capacitor. 8/17 DocID14914 Rev 3 L6386AD Bootstrap driver For example: using a power MOSFET with a total gate charge of 30 nC, the drop on the bootstrap DMOS is about 1 V, if the Tcharge is 5 ms. In fact: Equation 3 30nC V drop = ---------------  125  0.8V 5s Vdrop has to be taken into account when the voltage drop on CBOOT is calculated: if this drop is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode can be used. Figure 4. Bootstrap driver DBOOT VS VBOOT VBOOT VS H.V. H.V. HVG HVG CBOOT VOUT CBOOT VOUT TO LOAD TO LOAD LVG LVG a b DocID14914 Rev 3 D99IN1056 9/17 17 Typical characteristic 5 L6386AD Typical characteristic Figure 5. Typical rise and fall times vs. load capacitance time (nsec) D99IN1054 250 Figure 6. Quiescent current vs. supply voltage Iq (μA) 104 D99IN1057 200 Tr 103 150 Tf 100 102 50 10 0 0 1 2 3 4 5 C (nF) For both high and low side buffers @25˚C Tamb Figure 7. Turn-on time vs. temperature 6 8 10 12 14 16 VS(V) 15 @ Vcc = 15V 14 @ Vcc = 15V 200 13 Vbth1 (V) Ton (ns) 4 Figure 8. VBOOT UV turn-on threshold vs. temperature 250 150 100 2 0 Typ. 12 Typ. 11 10 9 50 8 0 -45 -25 0 25 50 Tj (°C) 75 100 7 125 Figure 9. Turn-off time vs. temperature -45 25 50 Tj (°C) 75 100 125 15 @ Vcc = 15V 14 @ Vcc = 15V Vbth2 (V) 200 Toff (ns) 0 Figure 10. VBOOT UV turn-off threshold vs. temperature 250 150 100 -25 Typ. 13 12 11 10 Typ. 9 50 8 0 -45 10/17 -25 0 25 50 Tj (°C) 75 100 125 DocID14914 Rev 3 7 -45 -25 0 25 50 Tj (°C) 75 100 125 L6386AD Typical characteristic Figure 11. Shutdown time vs. temperature Figure 12. VBOOT UV hysteresis 3 250 @ Vcc = 15V @ Vcc = 15V 2.5 Vbhys (V) tsd (ns0 200 150 Typ. 100 1.5 50 0 -45 -25 0 25 50 Tj (°C) 75 100 1 125 -45 15 1000 14 800 0 25 50 Tj (°C) 75 100 125 @ Vcc = 15V 13 12 -25 Figure 14. Output source current vs. temperature current (mA) Vccth1(V) Figure 13. VCC UV turn-on threshold vs. temperature Typ. 11 600 Typ. 400 200 10 9 -45 -25 0 25 50 Tj (°C) 75 100 0 125 -45 Figure 15. VCC UV turn-off threshold vs. temperature -25 0 25 50 Tj (°C) 75 100 125 Figure 16. Output sink current vs. temperature 12 1000 11 800 @ Vcc = 15V current (mA) Vccth2(V) Typ. 2 10 Typ. 9 8 7 -45 Typ. 600 400 200 -25 0 25 50 75 100 125 Tj (°C) DocID14914 Rev 3 0 -45 -25 0 25 50 Tj (°C) 75 100 125 11/17 17 Typical characteristic L6386AD Figure 17. VCC UV hysteresis vs. temperature 3 Vcchys (V) 2.5 Typ. 2 1.5 1 -45 12/17 -25 0 25 50 Tj (°C) DocID14914 Rev 3 75 100 125 L6386AD 6 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at:www.st.com. ECOPACK is an ST trademark. DocID14914 Rev 3 13/17 17 Package information 6.1 L6386AD SO-14 package information Figure 18. SO-14 package outline Table 7. SO-14 package mechanical data Dimensions (mm) Dimensions (inch) Symbol Min. Typ. Max. Min. Typ. Max. A 1.35 1.75 0.053 0.069 A1 0.10 0.30 0.004 0.012 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.01 D(1) 8.55 8.75 0.337 0.344 E 3.80 4.0 0.150 0.157 e 1.27 0.050 H 5.8 6.20 0.228 0.244 h 0.25 0.50 0.01 0.02 L 0.40 1.27 0.016 0.050 k ddd 0° (min.), 8° (max.) 0.10 0.004 1. “D” dimension does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm per side. 14/17 DocID14914 Rev 3 L6386AD 7 Order codes Order codes Table 8. Device summary Order codes Package Packaging L6386AD SO-14 Tube L6386AD013TR SO-14 Tape and reel DocID14914 Rev 3 15/17 17 Revision history 8 L6386AD Revision history Table 9. Document revision history Date Revision 14-Jul-2008 1 First release 2 Added Section : Applications on page 1. Updated Section : Description on page 1 (replaced by new description). Updated Table 1: Device summary on page 1 (moved “Table 9 Order codes” from page 15 to page 1, renamed title of Table 1). Updated Figure 1: Block diagram on page 3 (moved to page 3, added Section 1: Block diagram on page 3). Updated Section 2.1: Absolute maximum ratings on page 4 (removed note below Table 1: Absolute maximum ratings). Updated Table 4: Pin description on page 5 (updated “Type” of several pins). Numbered Equation 1 on page 8, Equation 2 on page 8 and Equation 3 on page 9. Updated Section 6: Package information on page 13 (updated ECOPACK text, updated/added titles, reversed order of Figure 18 and Table 7 (numbered Table 7), removed 3D package figure, minor modifications]. Minor modifications throughout document. 3 Updated Section : Description on page 1 (updated text and replaced “power MOS” by “power MOSFET”). Updated Table 1 on page 4, Table 3 on page 4 , Table 4 on page 5 to Table 6 on page 6 (updated “Symbol”, “Parameter”, “Pin”, and “Test condition”, and note 1. below Table 6 (replaced “VCBOOTx“ by “VBOOTx“). Updated Figure 3 on page 7 (replaced by new figure, added note 1.). Moved Table 8 on page 15 (moved from page 1 to page 15, added title of Section 7: Order codes on page 15). Minor modifications throughout document. 20-Jun-2014 29-Mar-2016 16/17 Changes DocID14914 Rev 3 L6386AD IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID14914 Rev 3 17/17 17