L9333

L9333 QUAD LOW SIDE DRIVER PRODUCT PREVIEW s s s s s s s s s WIDE OPERATING SUPPLY VOLTAGE RANGE FROM 4.5V UP TO 32V FOR TRANSIENT 45V VERY LOW STANDBY QUIESCENT CURRENT TYPICALLY < 2µA INPUT TO OUTPUT SIGNAL TRANSFER FUNCTION PROGRAMMABLE HIGH SIGNAL RANGE FROM -14V UP TO 45V FOR ALL INPUTS 3.3V CMOS COMPATIBLE INPUTS DEFINED OUTPUT OFF STATE FOR OPEN INPUTS FOUR OPEN DRAIN DMOS OUTPUTS, WITH RDSon = 1.5Ω FOR VS > 6V AT 25°C OUTPUT CURRENT LIMITATION CONTROLLED OUTPUT SLOPE FOR LOW EMI MULTIPOWER BCD TECHNOLOGY SO20 & SO20 (12+4+4) ORDERING NUMBER: L9333MD (SO20 12+4+4) L9333 (SO20) s STATUS MONITORING FOR - OVERTEMPERATURE - DISCONNECTED GROUND OR SUPPLY VOLTAGE s OVERTEMPERATURE PROTECTION FOR EACH CHANNEL INTEGRATED OUTPUT CLAMPING FOR FAST INDUCTIVE RECIRCULATION VFB > 45V DESCRIPTION The L9333 is a monolithic integrated quad low side driver. It is intended to drive lines, lamps or relais in automotive or industrial applications. s BLOCK DIAGRAM IN 4 C HA NN E L 4 OU T 4 VS R IN IN 1 = & OU T 1 PR G TH ER M A L S H UTD OW N C H A NN E L1 4 R IN PR G D IA GN O S TIC LO G IC DIA G R EN EN VS R E FER E NC E G ND V int V log ic January 2000 This is preliminary information on a new product now in development. Details are subject to change without notice. 1/13 L9333 PIN CONNECTION (Top view) NC VS NC IN3 IN4 EN OUT4 OUT3 GND NC 1 2 3 20 19 18 NC DIAG NC IN2 IN1 PRG OUT1 OUT2 NC NC IN1 IN2 DIAG GND GND GND GND VS IN3 IN4 1 2 3 20 19 18 PRG OUT1 OUT2 GND GND GND GND OUT3 OUT4 EN SO 20 STD 4 5 6 7 8 9 10 17 16 15 14 13 12 11 4 5 6 7 8 9 10 So 12+4+4 Med. Power Package 17 16 15 14 13 12 11 PIN FUNCTION Pin Name VS GND EN PRG DIAG IN 1 IN 2 IN 3 IN 4 OUT 1 OUT 2 OUT 3 OUT4 NC Description SO20 Supply Voltage Ground Enable Programming Diagnostic Input 1 Input 2 Input 3 Input 4 OUTPUT 1 OUTPUT 2 OUTPUT 3 OUTPUT4 Not Connected 2 9 6 15 19 16 17 4 5 14 13 8 7 1,3,10,11,12,18,20 SO20 (SO 12+4+4) 8 4, 5, 6, 7, 14, 15, 16, 17 11 20 3 1 2 9 10 19 18 13 12 - 2/13 L9333 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VS dV S/dt VIN, VEN, VPRG VOUT VDIAG Supply voltage DC Supply voltage Pulse (T = 400ms) Supply voltage transient Input, Enable, Programming Pin voltage Output voltage Diagnostic output voltage -0.3 to 32 -0.3 to 45 -10 to +10 -14 to 45 V V V/µs V -0.3 to 45 1) -0.3 to 45 V V Notes: 1. In flyback phase the output voltage can reach 60V. ESD - PROTECTION Parameter Supply pins and signal pins Output pins Note: Human-Body-Model according to MIL 8832. The device widthstand ST1 class level. Value against GND ±2 ±4 Unit KV KV THERMAL DATA Symbol TJSD TJSDhys SO 12+4+4 Rth (j-p) Rth (j-a) SO 20 Rth (j-a) Thermal resistance junction to ambient 3) 97 ° C/W Thermal resistance junction to pins Thermal resistance junction to ambient 2) 15 50 ° C/W ° C/W Parameter Temperature shutdown threshold Temperature shutdown hysteresis Min 175 20 Typ Max 220 Unit °C K 2. With 6cm2 on board heat sink area. 3. Mounted on SMPCB2 board 3/13 L9333 LIFE TIME Symbol tB tb Parameter useful life time operating life time Condition V S ≤ 14V EN = low 4.5V ≤ VS ≤ 32V EN = high Value 20 5000 Unit years hours OPERATING RANGE: Within the operating range the IC operates as described in the circuit description, including the diagnostic table. Symbol VS VIN, VEN, V PRG VOUT VDIAG TJ Parameter Supply voltage Input voltage Condition Min 4.5 -14 Max 32 45 Unit V V Output voltage Diagnostic output voltage Junction temperature Voltage will be limited by internal ZDiode clamping -0.3 -0.3 -40 60 45 150 V V °C ELECTRICAL CHARACTERISTCS The electrical characteristics are valid within the defined Operating Conditions, unless otherwise specified. The function is guaranteed by design until TJSDon switch-on-threshold. Symbol SUPPLY IQ Quiescent current V S ≤ 14V; VEN ≤ 0.3V Tamb 85 °C V S ≤ 14V; VEN ≤ 0.3V Ta 150°C V S ≤ 14V; EN = high, Output = off EN = high, Output = on Inputs, IN1 - IN4; Programming, PRG VINlow VINhigh IIN RIN Input voltage LOW Input voltage HIGH Input current Input impedance 0V ≤ VIN ≤ 45V 4) V IN < 0V; V IN > VS -14 2 -25 10 60 1 45 50 V V µA kΩ 1 6V, I O = 0.3A VO = VS = 14V; Ta < 125°C VO = VS = 14V; Ta < 150°C VOClamp IOSC CO Output voltage during clamping Short-circuit current internal output capacities E FB ≤ 2mJ; 10 mA < IO < 0.3A V S > 6V VO > 4.5V 45 400 52 700 1.7 1 3.8 5 25 60 1000 100 Ω µA µA V mA pF Diagnostic Output DIAG VDlow IDmax IDLeak Output voltage LOW Max. output current IDL = 0.6mA internal current limitation; VD = 14V V D = VS = 14 V; Ta < 125 °C V D = VS = 14 V; Ta < 150 °C Timing Characteristics 5) td,on td,off tset td,DIAG Sout Note : 0.8 1 5 15 V mA µA µA Leakage current 0.1 1 5 On delay time Off delay time Enable settling time ON or OFF Diagnostic delay time Output voltage slopes V S = 14V C ext = 0F; Lext = 0H only testing condition 10mA ≤ I0 ≤ 200mA 2.5 2 3 3.5 4.5 20 10 µs µs µs µs V/µs 9 16 All parameters are measured at 125°C. 5. See also Fig.3 Timi ng Characteristics 5/13 L9333 Figure 1. Timing Characteristics VE N Active V PR G t N o n - In v e r tin g M o d e In v e r ti n g M o d e t V IN t VO U T VS 0.8 V S 6) 0.2 V S t t set t d,off t d,on t set 6. Output voltage slope not controlled for enable low! 6/13 L9333 FUNCTIONAL DESCRIPTION The L9333 is a quad low side driver for lines, lamps or inductive loads in automotive and industrial applications. The logic input levels are 3.3V CMOS compatible. This allows the device to be driven directly by a microcontroller. For the noise immunity, all input thresholds have a hysteresis of typ. 100mV. Each input (IN, EN and PRG) is protected to withstand voltages from -14V to 45V. The device is activated with a ’high’ signal on ENable. ENable ’low’ switches the device into the sleep mode. In this mode the quiescent current is typically less than 2µ A. A high signal on PRoGramming input changes the signal transfer polarity from noninverting to the inverting mode. This pin can be connected either to VS or GND. If these pins are not connected, the forced status of the PRG and EN pin is low. For packaged applications it is still recommended to connect all input pins to ground respective VS to avoid EMC influence. The forced condition leads to a mode change if the PRG pin was high before the interruption. Independent of the PRoGramming input, the OUTput switches off, if the signal INput pin is not connected. This function is verified using a leakage current of 5µA (sink for PRG=high; source for PRG=low) during circuit test. Each output driver has a current limitation of min 0.4A and an independent thermal shut-down. The thermal shut-down deactivates that output, which exceeds temperature switch off level. When the junction temperature decreases 20K below this temperature threshold the output will be activated again. This 20K is the hysteresis of the thermal shutdown function. The Gates, of the output DMOS transistors are charged and discharged with a current source. Therefore the output slope is limited. This reduces the electromagnetic radiation. For inductive loads an output voltage clamp of typically 52V is implemented. The DIAGnostic is an open drain output. The logic status depends on the PRoGramming pin. If the PRG pin is ’low’ the DIAG output becomes low, if the device works correctly. At thermal shut-down of one channel or if the ground is disconnected the DIAGnostic output becomes high. If the PRG pin is ’high’ this output is switched off at normal function and switched on at overtemperature. For the fault condition of interrupted ground, the potential of VS and Diagnostic should be equal. DIAGNOSTIC TABLE Pins Normal function EN H H H H L Overtemperature, disconnected ground or supply voltage Overtemperature H PRG L L H H X L IN L H L H X X OUT L (on) H (off) H (off) L (on) H (off) H (off) * DIAG L (on) L (on) H (off) H (off) H (off) H (off) H H X H(off) * L(on) X = not relevant * selective for each channel at overtemperature 7/13 L9333 Figure 2. Application for Inverting Transfer Polarity BOARD VOLTAGE 14 V VCC = 5V or 3.3V 33µF VCC INT MICROCONTROLLER A 0:8 D0 D1 D2 D3 Adressdecoder PRG EN VS DIAG M 2W 12 mH 250 mA 240Ω VCC = 5V 8 L9333 IN 1 IN 2 IN 3 IN 4 OUT 1 OUT 2 OUT 3 OUT 4 GND VCC IN 50 kHz 10µH 50pF GND GND Figure 3. Application for non Inverting Transfer Polarity BOARD VOLTAGE 14 V 33 µF PRG VS DIAG EN M 2W 12 mH 250 mA VCC = 5V L9333 IN 1 IN 2 IN 3 IN 4 OUT 1 OUT 2 OUT 3 OUT 4 GND 240Ω VCC IN 10µH 50pF GND Note We recommend to use the device for driving inductive loads with flyback energy EFB ≤ 2mJ. 8/13 L9333 EMC SPECIFICATION EMS (electromagnetic susceptibility) Measurement setup: DUT mounted on a specific application board is driven in a typical application circuit (see below). Two devices are stimulated by a generator to read and write bus signals. They will be monitored externally to ensure proper function. Figure 4. PCB layout TOPSIDE BACKSIDE Measurement method: a) b) c) The two bus lines are transferred 2m under a terminated stripline. That’s where they were exposed to the RF-field. Stripline setup and measurement method is described in DIN 40839-4 or ISO 11452-5. DUT mounted on the same application board is exposed to RF through the tophole of a TEM-cell. Measurement method according SAE J1752. The two bus lines are transferred into a BCI current injection probe. Setup and measurement method is described in ISO 11452-4. Failure criteria: Failure monitoring is done by envelope measurement of the logic signals with a LeCroy oscilloscope with acceptance levels of 20% in amplitude and 2% time. Limits: The device is measured within the described setup and limits without fail function. The Electromagnetic Susceptivity is not tested in production. a) Field strength under stripline of > 250V/m in the frequency range 1 - 400MHz modulation:AM 1kHz 80%. b) Field strength in TEM-cell of > 500V/m in the frequency range 1 - 400MHz modulation: c) RF-currents with BCI of > 100mA in the frequency range 1 - 400MHz modulation: AM 1kHz 80%. AM 1kHz 80%. 9/13 9 1 7 8 13 14 11 10/13 2m Flat cable Stripline SMBYW01-200 1 33µF 10k Ω SM6T39A 10nF 4.7nF 4.7nF 10kΩ 20kΩ 4 ∗ 100Ω optional Jumper 11 L9333 Figure 5. Measured Circuit ANECHOIC CHAMBER 125Hz 16 f 2 17 250Hz f 2 4 500Hz U(t) f VS 4 ∗ 10kΩ IN1 IN2 IN3 IN4 GND 4 ∗ 4.7n 4.7nF 4 ∗ 1 nF optional EN PRG DIAG OUT1 Jumper 19 14 OUT2 OUT3 OUT4 13 2 The EMS of the device was verified in the below described setup. 5 16 17 4 5 9 1kHz 14V + - L9333 8 7 L9333 DIM. MIN. A A1 B C D E e H h L K 10 0.25 0.4 2.35 0.1 0.33 0.23 12.6 7.4 mm TYP. MAX. 2.65 0.3 0.51 0.32 13 7.6 1.27 10.65 0.75 1.27 0.394 0.010 0.016 MIN. 0.093 0.004 0.013 0.009 0.496 0.291 inch TYP. MAX. 0.104 0.012 0.020 0.013 0.512 0.299 0.050 0.419 0.030 0.050 OUTLINE AND MECHANICAL DATA 0° (min.)8° (max.) SO20 L h x 45° A B e K H D A1 C 20 11 E 1 1 0 SO20MEC 11/13 L9333 PAD L9333 12/13 L9333 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. N o license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics ® 2000 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http:/ /www.st.com 13/13