LCP22-150B1RL

LCP22 Protection IC for ringing SLICs Datasheet − production data Description The LCP22 has been developed to protect SLICs operating on both negative and positive battery supplies, as well as high voltage SLICs. It provides crowbar mode protection for both TIP and RING lines. The surge suppression is assumed for each wire by two thyristor structures, one dedicated to positive surges the second one for negative surges. Both positive and negative threshold levels are programmable by two gates. 62ZLGH Features • Protection IC recommended for ringing SLICs • Wide firing voltage range: -120 V to +120 V • Low gate triggering current: IG = 5 mA max • Peak pulse current: IPP = 50 A (10/1000 µs) LCP22 can be used to help equipment to meet various standards such as UL1950, IEC 60950 / CSAC22.2, UL1459 and TIA-968-A. LCP22 pinout and clearance is compatible with UL60950. A Trisil ™ meets UL94 V0. The LCP22 associated with Epcos PTC model B59173C1130A151 is compliant with ITU TK20/K21 (4 kV lightning and AC power fault tests). • Holding current: IH = 150 mA min. Figure 1. Functional diagram Line (TIP or RING) Applications • Dual battery supply voltage SLICs • Central office (CO) Gp Gn • Private branch exchange (PBX) GND • Digital loop carrier (DLC) • Digital subscriber line access multiplexer (DSLAM) • Fiber in the loop (FITL) Line (RING or TIP) Figure 2. Pin-out configuration • Wireless local loop (WLL) • Hybrid fiber coax (HFC) • ISDN terminal adapter • Cable modem Gn Line (TIP or RING) NC GND Gp GND NC Line (RING or TIP) TM: Trisil is a trademark of STMicroelectronics October 2014 This is information on a product in full production. Doc ID025775 Rev 3 1/10 www.st.com Characteristics 1 LCP22 Characteristics Table 1. Compliant with the following standards Standard Peak surge voltage (V) Voltage waveform Required peak current (A) Current waveform Minimum series resistor Rs to meet standard ( Ω ) GR-1089 Core First level 2500 1000 2/10 µs 10/1000 µs 500 100 2/10 µs 10/1000 µs 12 10 GR-1089 Core Second level 5000 2/10 µs 500 2/10 µs 24 GR-1089 Core Intra-building 1500 2/10 µs 100 2/10 µs 0 ITU-T-K20/K21 6000 4000 1500 10/700 µs 150 100 37.5 5/310 µs 35 10 0 ITU-T-K20 (IEC61000-4-2) 8000 15000 1/60 ns ESD contact discharge ESD air discharge 0 0 IEC61000-4-5 4000 4000 10/700 µs 1.2/50 µs 100 100 5/310 µs 8/20 µs 14 0 TIA-968-A (formerly FCC part 68) type A 1500 800 10/160 µs 10/560 µs 200 100 10/160 µs 10/560 µs 20 15 TIA-968-A (formerly FCC part 68) type B 1000 9/720 µs 25 5/320 µs 0 Table 2. Absolute maximum ratings (Tamb = 25 °C) Symbol IPP Peak pulse current ITSM Non repetitive surge peak on-state current (F = 50 Hz) ITSM value specified for each line ITSM value can be applied on both lines at the same time (GND capability is twice the line ITSM) VGn VGp Negative battery voltage range Positive battery voltage range Value Unit 10/1000 µs 5/310 µs 2/10µs 50 80 150 A tp = 0.2 s tp = 1 s tp = 15 min. 11 7.5 3 A -120 to 0 0 to +120 V Operating junction temperature range -55 to +125 °C Tstg Storage temperature range -55 to +150 °C TL Lead solder temperature (10 s duration) 260 °C Tj 2/10 Parameter Doc ID025775 Rev 3 LCP22 Characteristics Figure 3. Pulse waveform % I PP 100 50 0 tr t tp Table 3. Thermal resistance Symbol Rth(j-a) Parameter Value Unit 150 °C/W Junction to ambient Table 4. Parameters related to the negative suppressor Symbol Parameter Test conditions IGn Negative gate trigger current VGn/GND = -60 V Measured at 50 Hz IH- Holding current (see Figure 4) VGn = -60 V Min. Max. Unit 5 150 VDGL- VGn/GND = -60 V Dynamic switching voltage Gn / TIP or 10/700 µs 2 kV RING(1) 1.2/50 µs 2 kV VGnT Gn to TIP voltage Rs = 25 Ω Rs = 25 Ω IPP = 30 A IPP = 30 A IGn = 20 mA 0.7 mA mA 8 12 V 1.7 V 1. The VDGL value is the difference between the peak line voltage during the surge and the programmed gate voltage. Table 5. Parameters related to the positive suppressor Symbol IGp Parameter Positive gate trigger current Test conditions Min. Max. Unit VGp/GND = 60 V, measured at 50 Hz VDGL+ VGp/GND = 60 V Dynamic switching voltage Gp / TIP or 10/700 µs 2 kV RING(1) 1.2/50 µs 2 kV VGpR G P to RING voltage Rs = 25 Ω Rs = 25 Ω IPP = 30 A IPP = 30 A IGp = -20 mA 5 mA 8 20 V 2 V 1 1. The VDGL value is the difference between the peak line voltage during the surge and the programmed gate voltage. Table 6. Parameters related to TIP or RING / GND Symbol Parameter Test conditions VGp/TIP or RING= +1 V VGn/TIP or RING= -1 V IR Reverse leakage current VTIP or RING = +120 V VTIP or RING = -120 V C Capacitance TIP or RING / GND VR = -3 V, F =1 MHz, VGp = 60 V, VGn = -60 V Doc ID025775 Rev 3 Min. Max. Unit 5 5 µA 60 pF 3/10 10 Characteristics LCP22 Table 7. Recommended gate capacitance Symbol Cn, Cp Component Gate decoupling capacitance Min. Typ. 100 220 Max. Unit nF Figure 4. Relative variation of holding current versus junction temperature IH[Tj] / IH[Tj=25 °C] 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 T (°C) 0.0 -40 -20 0 20 40 60 80 100 120 Figure 5. Maximum non repetitive surge peak on state current versus overload duration 20 ITSM (A) F = 50 Hz Tj initial = 25 °C 18 16 14 12 10 8 6 4 2 0 t(s) 0.01 0.1 1 10 100 1000 Figure 6. Capacitance versus reverse applied voltage (typical values) with VGn = -90 V and VGp = +90 V C (pF) 70 line + 60 line - 50 40 30 20 10 0 4/10 Vline (V) 20 40 60 Doc ID025775 Rev 3 80 100 LCP22 2 Technical information Technical information Figure 7. LCP22 concept behavior Rs L1 TIP GND -Vbat V Tip T2 IGn T1 Th1 Th2 Gp Gn Rs +Vb Cp Cn L2 IGp RING GND V Ring Figure 7 shows the classical protection circuit using the LCP22 crowbar concept. This topology has been developed to protect two-battery voltage SLICs. It allows both positive and negative firing thresholds to be programmed. The LCP22 has two gates (Gn and Gp). Gn is biased to negative battery voltage -Vbat, while Gp is biased to the positive battery voltage +Vb. When a negative surge occurs on one wire (L1 for example), a current IGn flows through the base of the transistor T1 and then injects a current in the gate of the thyristor Th1 which turns-on. All the surge current flows through the ground. After the surge, when the current flowing through Th1 becomes less negative than the negative holding current IH-, Th1 switches off. This holding current IH- is temperature dependent as per Figure 4 When a positive surge occurs on one wire (L1 for example), a current IGp flows through the base of the transistor T2 and then injects a current in the gate of the thyristor Th2 which fires. All the surge current flows through the ground. After the surge, when the current flowing through Th2 becomes less positive than the positive holding current IH+, Th2 switches off. This holding current IH+, typically 20 mA at 25 °C, is temperature dependent and the same Figure 4 also applies. The capacitors Cn and Cp are used to speed up the crowbar structure firing during the fast rise or fall edges. This allows minimization of the dynamic breakover voltage at the SLIC TIP and RING inputs during fast surges. Please note that these capacitors are generally available around the SLIC. To be efficient they have to be as close as possible to the LCP22 gate pins (Gn and Gp) and to the reference ground track (or plan). The optimized value for Cn and Cp is 220 nF. The series resistors Rs shown in Figure 7 represent the fuse resistors or the PTCs which are needed to withstand the power contact or the power induction tests imposed by the country standards. Taking this factor into account, the actual lightning surge current flowing through the LCP22 is equal to: I surge = Vsurge / (Rg + Rs) With V surge = peak surge voltage imposed by the standard. Rg = series resistor of the surge generator Rs = series resistor of the line card (e.g. PTC) Doc ID025775 Rev 3 5/10 10 Technical information LCP22 For a line card with 50 Ω of series resistors which has to be qualified under GR-1089 1000 V 10/1000 µs surge, the present current through the LCP22 is equal to: I surge = 1000 / (10 + 50) = 17 A The LCP22 topology is particularly optimized for the new telecom applications such as fiber in the loop, WLL systems, and decentralized central office, for example. Figure 8. Protection of SLIC with positive and negative battery voltages Line card -Vbat Rs (*) TIP Gn Line 220nF GND TIP LCP22 Gp 220nF SLIC RING Rs (*) RING +Vb Rs (*) = PTC or Resistor fuse Figure 8 shows the classical protection topology for SLIC using both positive and negative battery voltages. With such a topology the SLIC is protected against surge over +Vb and lower than -Vbat. In this case, +Vb can be programmed up to +120 V while -Vbat can be programmed down to -120 V. 6/10 Doc ID025775 Rev 3 LCP22 3 Package information Package information • Epoxy meets UL94, V0 • Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 9. SO-8 wide dimension definitions L D A2 A C A1 K b E e 8 5 E1 1 4 Doc ID025775 Rev 3 7/10 10 Package information LCP22 Table 8. SO-8 wide dimension values Dimensions Ref. Millimeters Min. Inches Max. Min. Max. A 1.70 1.90 2.10 0.07 0.07 0.08 A1 0.05 0.10 0.25 0.00 0.00 0.01 A2 1.65 1.80 1.75 0.06 0.07 0.07 b 0.38 0.43 0.48 0.01 0.02 0.02 c 0.15 0.20 0.25 0.01 0.01 0.01 D 5.14 5.24 5.34 0.02 0.021 0.21 E 5.20 5.30 5.40 0.02 0.021 0.21 E1 7.70 7.80 8.25 0.30 0.031 0.32 0.05 0.05 8.00 0.14 0.31 0.85 0.02 0.03 e 1.27 K L 0.55 0.75 0.03 Figure 10. SO-8 wide footprint in mm (inches)           Figure 11. Recommended footprint for SO-8/SO-8 wide compatibility $ PP & PP % PP ' PP 8/10 Doc ID025775 Rev 3 LCP22 4 Ordering information Ordering information Table 9. Ordering information 5 Order code Marking Package Weight Base qty Delivery mode LCP22-150B1RL LCP22 SO-8 wide 0.125g 1500 Tape and reel Revision history Table 10. Document revision history Date Revision Changes 07-Feb-2014 1 Initial release. 03-Jun-2014 2 Updated Figure 1: Functional diagram, Figure 2: Pin-out configuration and Tj value in Table 2: Absolute maximum ratings (Tamb = 25 °C). 22-Oct-2014 3 Added Figure 11. Doc ID025775 Rev 3 9/10 10 LCP22 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2014 STMicroelectronics – All rights reserved 10/10 Doc ID025775 Rev 3