PM6613N
2 to 4-cell Li-Ion, Li-FePO4 battery charger with SMBus interface,
N-channel RBFET and BATFET MOSFET selectors
Datasheet - production data
Applications
• Mobile PC:
– UMPC/MID and tablets
– Netbook and notebook computers
Description
VFQFPN 3x3 20L
Features
• Synchronous buck converter with N-channel
high-side, low-side power MOSFET integrated
drivers
• 350 kHz or 700 kHz switching frequency,
selectable with SMBus
• AC adapter input voltage range 9 V - 24 V
• 5 V bias input voltage supply
• Battery charge voltage range 2.5 V -18 V
• ±1.53% charge voltage accuracy
• 0.1% cell charge voltage resolution
The PM6613N is a high efficiency battery charger
with SMBus communication interface. It includes
a synchronous switching DC-DC converter with
N-channel high-side and low-side power
MOSFET drivers. The possibility to set the
switching frequency with SMBus by choosing one
of the two preset values of 350 kHz or 700 kHz
assures the best trade-off between power
conversion efficiency and PCB cost and size.
Integrated loop compensation network and softstart allow the reduction of the number of external
components.
The PM6613N integrates 2 charge pumps to drive
N-channel ACFET/RBFET and BATFET
MOSFETs.
The SMBus communication interface is used to
set the battery charge current and voltage.
• ±3% charge current accuracy
• ±3% input current accuracy
• Overvoltage, overcurrent protections
• Battery, inductor, power MOSFET short-circuit
protection
The PM6613N charges 2 to 4 series Li-Ion or
LiFePO4 cells, for mobile PC applications. It is
available in a compact VFQFPN 3x3 mm
package.
• Internal loop compensation network
Table 1. Device summary
• Integrated soft-start
• Selector
– N-channel ACFET/RBFET MOSFET driver
– N-channel BATFET MOSFET driver
Order code
Package
Packing
PM6613NTR
VFQFPN 3x3 20L
Tape and reel
• System
– 1 mA quiescent supply current
– 17 µA - 35 µA sleep mode current (BATFET
charge pump off - on)
– Thermal shutdown list
November 2013
This is information on a product in full production.
DocID024974 Rev 3
1/30
www.st.com
30
Contents
PM6613N
Contents
1
Device pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
5
3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Operating description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1
SMBus communication interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2
ACFET/RBFET and BATFET system power selectors . . . . . . . . . . . . . . . 17
4.3
Adapter detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.4
Internal charge pumps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.5
Switching frequency selection and EMI adjustments . . . . . . . . . . . . . . . . 18
4.6
Charge settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.7
Adapter constant power function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.8
Input current limit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.9
Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.10
Battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.11
Adapter insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.12
Adapter removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
The PM6613N registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1
Charge option register (CHRG_OPT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2
STATUS register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3
Charge current register (CHRG_AMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.4
Charge voltage register (CHRG_VOLT) . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.5
Input current register (INPUT_AMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2/30
DocID024974 Rev 3
PM6613N
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
SMBus communication timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Low power SMBus DC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SMBus command summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Valid battery charge voltage ranges for Li-Ion battery cells . . . . . . . . . . . . . . . . . . . . . . . . 19
Valid battery charge voltage ranges for LiFePO4 battery cells. . . . . . . . . . . . . . . . . . . . . . 19
Battery overvoltage detection ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Adapter insertion sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Adapter removal sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CHRG_OPT 0x12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Status 0x13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
CHRG_AMP 0x14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
CHRG_VOLT 0x15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
INPUT_AMP 0x3F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VFQFPN 3x3x1.0 20 L pitch 0.4 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
DocID024974 Rev 3
3/30
Device pinout
1
PM6613N
Device pinout
16
ACOK
17
IOUT
ALARM#
18
19
SCL
ACDRV
14
13
12
11
ACN
ACP
15
10
9
SRN
BATFET
LOW
GND
B2B
PM6613N
6
5
BTST
8
4
ILIM
ACDIV
SRP
3
HIGH
7
2
PH
DCIN
1
SDA
20
Figure 1. The PM6613N pinout
AM16597v1
4/30
DocID024974 Rev 3
PM6613N
2
Pin description
Pin description
Table 2. Pin description
Pin
Name
1
PH
Description
High-side power nMOS driver source. Connection to the high-side
nMOS source pin and low-side nMOS drain pin.
2
HIGH
High-side power nMOS driver output. Connection to the high-side
nMOS gate pin. In critical application conditions, a series resistor can
be used to increase the nMOS turn-on/off time and to limit the phase
ringing, R = 4.7 Ω.
3
BTST
High-side power nMOS driver power supply. Connection to 5 V power
supply voltage through a Schottky diode, and to the phase net
through a filtering capacitor.
4
LOW
Low-side power nMOS driver output. Connection to the low-side
nMOS gate pin. In critical application conditions, a series resistor can
be used to increase the nMOS turn-on/off time and to limit the phase
ringing, R = 4.7Ω.
5
GND
Device analog and power ground reference.
6
DCIN
5 V input power supply. It is used to bias the internal logic and to
supply the internal power drivers. An RC filter is used to limit inrush
current and voltage spikes, typical value R=1 Ω, C=10 μF.
7
SRP
Battery charge current sense resistor positive pin.
8
SRN
Battery charge current sense resistor negative pin.
9
BATFET
10
ACN
Input current sense resistor negative input. System power
connection.
11
ACP
Input current sense resistor positive input. RBFET nNMOS drain pin
connection.
12
ACDRV
13
B2B
Output driven by AC adapter back-to-back MOS switches.
Connection to the ACFET and RBFET nMOS source pins.
14
ACDIV
Adapter detection pin. Adapter resistor divider connection.
15
ILIM
16
ACOK
AC adapter detection status pin. Open-drain pin.
It pulls high, when a valid adapter voltage is detected: 2 V < ACDIV <
2.625 V. It pulls low when ACDIV > 2.625 V or ACDIV < 2 V.
17
IOUT
Adapter/battery charge current output pin, selectable using SMBus
command. IOUT voltage is 20 times the differential voltage across
sense resistor.
18
ALARM#
nMOS driver output. Connection to the BATFET nMOS gate pin,
through a series resistor used to limit the inrush current.
nMOS driver output. Connection to the ACFET and RBFET nMOS
gate pin, through a series resistor used to limit the inrush current.
Battery charge current limit setting pin.
Open-drain output pin. Low when a fault condition is detected, to
trigger the system microcontroller interrupt.
DocID024974 Rev 3
5/30
Pin description
PM6613N
Table 2. Pin description (continued)
6/30
Pin
Name
Description
19
SCL
SMBus clock pin. Connection to the SMBus clock line. Open-drain
pin, a pull-up resistor R = 10 kΩ is used.
20
SDA
SMBus data pin. Connection to the SMBus data line. Open-drain pin,
a pull-up resistor R = 10 kΩ is used.
DocID024974 Rev 3
SYS
3.9kR
DocID024974 Rev 3
DCIN
GND
STL56N3LLH5
nMOS
6
10uF
SRP
CDC
SRN
+5V RDC
1R
SYS
ACN
ACN
1uF
CBT1
BATFET
BATFET
5
6
7
8
LSG
D1
ACP
RSA
10mR
ACP
11
B2B
ACDRV
13
12
3.9kR
RACDVR
RBFET
RBFETG
B2BC
nMOS
SRN
4
3
2
1
GND
B2B
ACDRV
56kR
430kR
ADP
ACFET
BAT54JFILM WAKE
1
2
3
4
SRP
LS
D3
BAT54JFILM
SCL
5
ALARM#
PM6613N
ACDIV
15
14
RACDIVL
LOW
BTST
IOUT
4
ILIM
D2
110kR
RACDIVU
RWAKE
+5V
STL56N3LLH5
10uF
STL56N3LLH5
3
THP
BTST
220nF RBT 0R LOW
20
ACOK
ACDIV
NM
1MR
RILU
1
2
3
4
10uF
COUT1
CBT
21
SDA
HIGH
19
PH
18
2
1
16
PH
PH
17
4.7uH
L1
HIGH
SDA
SCL
ALARM
RILL
ILIM
10mR
RSB
HS
SDA
+5V RSDAU
10kR
+5V RSCLU
10kR
IOUT
ACOK
nMOS
+ COUT2
22uF
CIN1
nMOS
BATT
nMOS
5
6
7
8
5
6
7
8
STL56N3LLH5
4
3
2
1
SCL
10kR
RIOUT
8
7
6
5
BATT
BATFETG
BATFET
ALARM#
CIOUT
+5V RALARMU
10kR
100nF
SYS
IOUT_FLT
ACOK
+5V RACOKU
1MR
WAKE
ILIMext
CIN05
10uF
RFLT2
C5V
22uF
CADP1
CADP0
3.9R
2.2uF; 10V
+5V
RFLT1
3.9R
2.2uF; 25V
+5V
ADP
PM6613N
Pin description
Figure 2. Typical application circuit
STL56N3LLH5
8
7
6
5
10
9
7
8
4
3
2
1
STPS2L30A
RBATFET
AM16596v1
7/30
Electrical characteristics
PM6613N
3
Electrical characteristics
3.1
Absolute maximum ratings
Stresses beyond those listed in "absolute maximum ratings" may cause permanent damage
to the device. Exposure to absolute maximum rated conditions for extended periods may
affect device reliability.
Table 3. Voltage characteristics
PINs
Values
BATFET, ACDRV, BTST, HIGH to GND
-0.3 to 36
SRP, SRN, B2B, ACP, ACN to GND
-0.3 to 30
LOW, DCIN, ACDIV, ILIM to GND
-0.3 to 6
PH to GND
-2 to 30
BTST to PH
-0.3 to 6
ACOK, IOUT, ALARM#, SCL, SDA to GND
-0.3 to 6
SRP to SRN, ACP to ACN
-0.5 to 0.5
ACDRV to B2B
-0.3 to 7
BATFET to SRN
-0.3 to 7
Unit
V
Table 4. Thermal characteristics
8/30
Symbol
Parameters
Values
Unit
Rth(JA)
Thermal resistance junction-to-ambient
45
°C/W
TJ
Junction operating temperature range
-40 to 125
TA
Ambient operating temperature range
-40 to 85
Tstg
Storage temperature range
-50 to 150
DocID024974 Rev 3
°C
PM6613N
Electrical characteristics
Table 5. Electrical characteristics
Symbol
Parameters
Test conditions
Min.
Typ.
Max.
40
60
Unit
Supply current
ISLP
IOP
Total current (DCIN, SRN,
SRP, ACP, ACN, PH)
consumption in sleep mode
Total quiescent supply current
ACDIV < ACDIVSLP
BATFET on
uA
ACDIV < ACDIVSLP
BATFET off
18
35
Charge disabled
1.25
2.1
mA
V
Supply voltage
DCINUVLO
DCIN UVLO rising threshold
3.8
4
4.2
DCIN UVLO falling threshold
3.65
3.85
4.05
ACOK comparator
ACDIVTH
ACDIV rising voltage
threshold to assert ACOK
1.87
2
2.13
V
ACDIVHYS
ACDIV voltage threshold
hysteresis
5
20
35
mV
ACDIVSLP
ACDIV voltage threshold to
enable internal bias
0.55
0.65
0.75
V
ACDIVOV
ACDIV rising threshold
voltage to determine an OV
condition that let ACOK go
low
2.55 2.625 2.70
V
ACDIVOV_H
tR_ACOK
ACDIV overvoltage hysteresis
Rising edge deglitch time
35
65
95
mV
AD bit cleared
230
250
270
ms
BSE bit cleared
600
700
800
kHz
BSE bit set
300
350
400
Switching frequency
fSW
Buck converter switching
frequency
Charging voltage
VBATT_ERR
Charge voltage accuracy
-1.53
1.53
%
ICHG = 0.128 A
RSENSE = 10 mΩ
-50
50
%
ICHG = 8.192 A
RSENSE = 10 mΩ
-3
+3
Charging current
ICHG_ERR
Charge current accuracy
VSRN = 12 V
Adapter current sense amplifier
IADP_G
Current sense amplifier gain
18
IADP_G_ERR
Current sense amplifier gain
error
-10
DocID024974 Rev 3
20
22
10
%
9/30
Electrical characteristics
PM6613N
Table 5. Electrical characteristics (continued)
Symbol
IADP_SRC
Parameters
IACP + IACN source current
Test conditions
Min.
Typ.
Max.
Unit
VSENSE =
= ACP- ACN = 0
5
25
45
mA
20
22
Battery current sense amplifier
IBATT_G
Current sense amplifier gain
18
IBATT_G_ERR
Current sense amplifier gain
error
-10
+10
%
VSENSE =
= SRP- SRN = 0
5
25
50
mA
AM[1:0]=0x0
0.25
0.45
0.65
A
AM[1:0]=0x1
0.70
0.90
1.10
AM[1:0]=0x2
1.10
1.30
1.50
AM[1:0]=0x3
1.50
1.70
1.90
255
280
305
mA
1.9
2.3
2.7
mA
B2B rising threshold to enable
charge
4.4
5
5.6
V
VB2B_LOW hysteresis
300
450
600
mV
VILIM_FALL
ILIM falling threshold for
disabling charge
55
75
95
mV
VILIM_RISE
ILIM rising threshold for
enabling charge
75
95
115
2.45
2.55
2.65
V
85
100
115
mV
Li- Ion
120
170
220
mV/cell
LiFePO4
100
140
170
IBATT_SRC
ISRP + ISRN source current
Light load comparator
ILL
ILL_hys
Light load average current
falling threshold for
asynchronous working mode.
Low-side MOSFET turned on
only when ICHG > ILL
ILL hysteresis
B2B
IB2B
VB2B_LOW
VB2B_LOW_H
B2B pull-down current
ACOK = ‘0’
DCIN = 5 V
ILIM comparator
Battery fault comparators
VBATT_LOW
Battery voltage rising
threshold for enabling charge
VBATT_LOW_HIS VBATT_LOW comparator
hysteresis
T
VBATT_OV
10/30
Battery overvoltage rising
threshold as difference
between SRN voltage and
CHRG_VOLT register value
DocID024974 Rev 3
PM6613N
Electrical characteristics
Table 5. Electrical characteristics (continued)
Symbol
Parameters
Test conditions
Min.
Typ.
Max.
Unit
Li- Ion
75
90
105
mV/cell
LiFePO4
55
75
85
VBATT_OV_H
VBATT_OV overvoltage
hysteresis
VBATT_OV_PD
Pull down current on SRN pin
during overvoltage condition
3.5
5
6.5
mA
IBATT_OC
Battery overcurrent threshold
as difference with
CHRG_AMP register value
1.7
2
2.3
A
BATTERY overcurrent
hysteresis
300
400
510
mA
Adapter input overcurrent
threshold as difference with
INPUT_AMP register value
1.7
2
2.3
A
IADP_OC overcurrent
hysteresis
250
400
550
mA
IBATT_OC_H
Adapter fault comparators
IADP_OC
IADP_OC_H
BATFET driver
VBATFET_DRV
BATFET gate driving voltage
respect to SRN pin
BATFET-SRN
5.3
6
6.6
V
IBATFET_SHORT
BATFET driver max. current
BATFET shorted to
SRN
35
60
80
mA
VACDRV_DRV
RBFET gate driving voltage
respect to B2B pin
ACDRV-B2B
5.3
6
6.6
V
IACDRV_SHORT
BATFET driver max. current
BATFET shorted to
SRN
35
55
75
mA
ACDRV driver
DocID024974 Rev 3
11/30
Electrical characteristics
3.2
PM6613N
Operating characteristics
Table 6. Typical operating characteristics
Symbol
Parameters
Test conditions
Min.
Typ.
Max.
Unit
Charging voltage
VCELL_RES
Cell voltage resolution
4
mV/cell
64
mA
3
ms
Referred to input
1
mV
Referred to input
1
mV
Charging current
ICHG_RES
Charge current control
resolution
RSENSE = 10 mΩ
A2B adapter to battery comparator
tR_A2B
Rising edge deglitch time
Adapter current sense amplifier
IADP_VOS
Current sense amplifier offset
Battery current sense amplifier
IBATT_VOS
Current sense amplifier offset
HS short detection
(1)
VHS_SHORT
Phase to GND threshold for
high-side short detection when
low-side is on
200
mV
tHS_SHORT
Mask time on HS_SHORT from
low-side turn-on time
300
ns
42
kΩ
5
kΩ
42
kΩ
5
kΩ
3.6
Ω
BATFET driver
RBATFET_DRV
BATFET driver output
impedance
IBATFET < 20 μA
RBATFET_OFF Charge pump off resistance
ACDRV driver
RACDRV_DRV RBFET driver output impedance IACDRV < 20 μA
RACDRV_OFF
Charge pump off resistance
HS driver(1)
HSRON
High-side driver turn-on
resistance
HSROFF
High-side driver turn-off
resistance
0.7
LSRON
Low-side driver turn-on
resistance
3.2
LSROFF
Low-side driver turn-off
resistance
0.8
VBTST -VPH = 5 V
LS driver(1)
1. Guaranteed by design
12/30
DocID024974 Rev 3
Ω
PM6613N
3.3
Electrical characteristics
Recommended operating conditions
(DCIN = 5 V, Tj = 25 °C unless otherwise specified)
Table 7. Recommended operating conditions
Symbol
Parameters
Test conditions
Min.
Typ.
Max.
Unit
5.5
V
24
V
V/cell
Supply voltage
DCINOP
VADP
DCIN input voltage operating
range
4.5
Adapter maximum voltage
Charging voltage
VCELL
Cell charge voltage
VBATT
Charge voltage range
Li-Ion
4
4.508
LiFePO4
3.4
3.908
6.8
18.032
V
0.128
16.320
A
Charging current
ICHG
Buck converter regulated charge
current range
RSENSE = 10 mΩ
A2B adapter to battery comparator
A2BTH
IA2B
A2B rising threshold
A2B sink current from B2B pin
0.35
0.45
0.55
V
12
14
16
μA
Adapter current sense amplifier
IADP_CM
IADP input common mode
minimum voltage
2.5
V
2.5
V
Battery current sense amplifier
IBATT_CM
IBATT input common mode
minimum voltage
Thermal protection
TSHUT
Temperature rising threshold for
disabling charge
160
°C
TSHUT_H
Thermal shutdown temperature
hysteresis
10
°C
DocID024974 Rev 3
13/30
Electrical characteristics
PM6613N
Table 8. SMBus communication timing values
Symbol
Parameters
Min.
Max.
Unit
100
kHz
fSMB
SMBus operating frequency
10
t(BUF)
Bus free time between stop and start condition
4.7
th(STA)
Hold time after (repeated) start condition. After this period,
the first clock is generated
tSU(STA)
Repeated start condition setup time
tSU(STOP) Stop condition setup time
μs
4
4.7
4
tH(DAT)
Data hold time
300
tSU(DAT)
Data setup time
250
tTIMEOUT Detect clock high timeout
ns
50
tw(L)
Clock low period
4.7
tw(H)
Clock high period
4
μs
μs
50
tr
Clock/data fall time
300
tf
Clock/data rise time
1000
Time in which a device must be operational after power-on
reset
500
ms
Max.
Unit
0.8
V
tPOR
ns
Table 9. Low power SMBus DC specifications
Symbol
Min.
VIL
Data, clock input low voltage
VIH
Data, clock input high voltage
VOL
Data, clock output low voltage
0.4
ILEAK
Input leakage
±5
IPULLUP
VDD
14/30
Parameters
2.1
VDD
Current through pull-up resistor or
current source
100
350
Nominal SMBus voltage
2.7
5.5
DocID024974 Rev 3
μA
V
PM6613N
Operating description
4
Operating description
4.1
SMBus communication interface
The PM6613N communicates to the system MCU by the SMBus interface. The PM6613N is
compliant with the system management Bus specification v2.0 (please refer to the official
website www.smbus.org).
The PM6613N uses a simplified command subset, with SMBus read-word and write-word
protocols to communicate to the system MCU.The PM6613N works in slave mode only;
according to the SMBus specifications, the slave address is set by using 7 bits, the value is
0b0010010 (0x12).
The SMBus interface input pins SDA (data) and SCL (clock) have Schmitt-trigger inputs.
Selecting pull-up resistors by 10 k for both of them to achieve rise times according to the
SMBus specifications.
A watchdog timer adjust function is provided within register 0x12. The charge is suspended
if IC does not receive write charge voltage or write charge current command within the
watchdog time period and watchdog timer is enabled. The charge is resumed after receiving
write charge voltage or write charge current command when watchdog timer expires and
charge suspends.
Figure 3. SMBus communication timing waveforms
tSU(STA)
SCL
tW(H) tW(L)
tf
tr
t(BUF)
tr
SDA
th(STA)
th(DAT) tsu(DAT)
th(DAT)
tsu(STOP)
AM16598v1
DocID024974 Rev 3
15/30
Operating description
PM6613N
Figure 4. SMBus write-word and read-word protocols
Write-Word Format
SLAVE
ADDRESS
S
7 bits
W ACK
COMMAND BYTE
ACK
(CHARGER REGISTER
)
1b 1b
8 bits
0 0 1 0 0 1 0 0 0 MSB
LOW DATA BYTE
1b
8 bits
LSB 0 MSB
ACK
HIGH DATA BYTE
1b
ACK P
8 bits
LSB 0 MSB
1b
LSB 0
Read-Word Format
SLAVE
ADDRESS
S
7 bits
W ACK
COMMAND BYTE
ACK S
(CHARGER REGISTER
)
1b 1b
8 bits
0 0 1 0 0 1 0 0 0 MSB
SLAVE
ADDRESS
1b
LSB 0
7 bits
Start Condition or Repeated Start Condition
P
Stop Condition
W
Write Bit ( Logic
- LOW )
R
Read Bit (Logic
- HIGH )
Acknowledge (Logic
- LOW )
XXXX
Master to Slave
N
ACK
1b 1b
0 0 1 0 0 1 0 1 0 MSB
S
ACK
R ACK
LOW DATA BYTE
8 bits
ACK
1b
LSB 0 MSB
HIGH DATA BYTE
8 bits
N
P
ACK
1b
LSB 1
Not - Acknowledge (Logic
HIGH )
XXXX
Slave to Master
AM16599v1
16/30
DocID024974 Rev 3
PM6613N
Operating description
The PM6613N supports 7 SMBus commands as listed in Table 10.
3
2
ARED
CF
0
4
BED
CI
5
SOVR
BOC
LB
AOV
AUV
HS
0
0
0
0
0
0
0
0
0
0
0
0
0
AMP[13:6]
0x14
Res
Reserved
Reset value
0
0
0
0
0
CHRG_VOLT
0x15
1
BOV
0
1
6
0
IOC
CHRG_AMP
0
0
AOC
Reset value
0
0
RBSS
Reserved
0
1
R
HBRO
STATUS
0x13
IS
0
7
0
8
9
EE
0
AM[1:0]
10
EFA
1
TS
11
13
1
PF
1
12
0
BSE
Reset value
14
CHRG_OPT
0x12
WD[1:0]
Register
15
Address
AD
Table 10. SMBus command summary
VOLT[14:1]
R
Reset value
R
0
0
0
INPUT_AMP
0
0
0
0
0
0
0
0
0
0
0
0
0
AMP[13:7]
0x3F
Res
Reserved
Reset value
1
0
0
0
MAN_ID
0
Manufacturer ID
0xFE
Reset value
0
0
0
0
0
0
0
DEV_ID
0
0
0
1
0
0
0
0
0
0
0
0
0
0
Device ID
0xFF
Reset value
4.2
0
0
0
0
0
0
0
0
0
ACFET/RBFET and BATFET system power selectors
The PM6613N integrates 2 charge pumps to drive nMOS selectors for ACFET/RBFET and
BATFET. At reset condition, the PM6613N internal circuitry controls the RBFET turn-on, to
avoid inrush current flowing from ADP (adapter) to SYS (system). The BATFET selector
connects (disconnects) the battery from the system. At reset condition, the BATFET selector
is controlled by the internal circuitry. During a charging process, if the adapter is
disconnected, the PM6613N stops any charge operation and remains in sleep mode: if the
BSE is set, the PM6613N connects the battery to the system. If the SOVR bit is set, the
internal circuitry can be disabled: the nMOS selectors can be manually controlled changing
the ARED and BED bits respectively.
DocID024974 Rev 3
17/30
Operating description
4.3
PM6613N
Adapter detection
The ACOK pin is an open-drain output signal to inform the system MCU that a valid
ADAPTER voltage has been detected by the ACDIV pin (ACDIV > 2 V). At reset condition,
for safety reason, a delay is applied to the internal circuitry, in order to avoid false adapter
insertions. An adapter insertion is detected when the voltage across ACDIV pin is higher
than 2.0 V. A voltage divider assures that when the adapter is inserted a voltage between
2.0 V and 2.65 V is applied to ACDIV pin. The internal circuitry checks for 250 ms that this
voltage is stable, and in this case enables the ACFET/RBFET selectors and the ACOK pin.
The delay can be removed clearing the AD bit on the CHRG_OPT register.
4.4
Internal charge pumps
Some charge pumps allow the PM6613N to supply the internal drivers necessary to drive
the ACFET/RBFET selectors, the BATFET selector and the high-side MOSFET. The
ACFET/RBFET selectors are switched off/on by the ACDRV pin. An internal charge pump is
used to lift the ACDRV voltage using the voltage coming from the B2B pin.The high-side
MOSFET is controlled by the HIGH pin. A charge pump receives the base voltage from the
PH pin, allowing the HIGH pin to be toggled. The BATFET selector is driven by the BATFET
pin whose voltage is bootstrapped using the BTST pin.
4.5
Switching frequency selection and EMI adjustments
The PM6613N buck converter switching frequency can be chosen, by setting bit 9 and bit 10
of the CHRG_OPT register. The choice depends on the compromise among efficiency,
inductance, output capacitor, and the PCB area. An additional offset can be applied to the
nominal frequency to avoid EMI issues, setting the bit EE of the CHRG_OPT register. The
offset can be set to ±15% changing the bit EFA of the CHRG_OPT register.
4.6
Charge settings
The PM6613N uses 3 SMBus registers and the ILIM pin to control the charging process.
The CHRG_VOLT register sets the voltage limit, ranging from a minimum value of 6800 mV
to a maximum value of 18032 mV, with 2 mV step resolution. Not all the values are allowed
within the above range (see Table 11 and Table 12). Any attempt to write a non valid value
causes the internal circuitry to clear the register and stop any charging process. The
CHRG_AMP register sets the current limit drained to the battery. The allowable value
ranges from a minimum of 128 mA to a maximum of 16320 mA. Setting a value outside this
range causes the PM6613N to clear the register and terminate any charging process. The
charging current is sensed measuring the differential voltage between SRP and SRN pins
where a small resistor value is connected to. A suggested value is 10 mΩ, and not more
than 20 mΩ. Greater values increase the sensitivity of the current sensing and the regulation
accuracy, but cause a higher power loss and could lead to an overcurrent protection
latching.
The charge current limit can be set forcing a voltage through the ILIM pin too. The PM6613N
automatically sets the maximum charge current by choosing the minimum value between
the ILIM voltage value and the CHRG_AMP register. The relationship between the ILIM
voltage and the input current limit is reported below:
18/30
DocID024974 Rev 3
PM6613N
Operating description
Equation 1
VILIM = R SB ⋅ ICHG ⋅ 10 + 0.03125
whereas RSB is the sensing resistor connected between the SRP and SRN pins and ICHG is
the charge current limit.
The charge is disabled when the ILIM voltage decreases below 70 mV and re-enabled when
increases over 90 mV. The ILIM control can be disabled by pulling it to 5 V.
Table 11. Valid battery charge voltage ranges for Li-Ion battery cells
CHRG_VOLT
Charge voltage [mV]
Cells
Min.
Max.
Min.
Max.
2
0x1F40
0x2338
8000
9016
3
0x2EE0
0x34D4
12000
13524
4
0x3E80
0x4670
16000
18032
Table 12. Valid battery charge voltage ranges for LiFePO4 battery cells
CHRG_VOLT
Charge voltage [mV]
Cells
4.7
Min.
Max.
Min.
Max.
2
0x1A90
0x1E88
6800
7816
3
0x27D8
0x2DCC
10200
11724
4
0x3520
0x3D10
13600
15632
Adapter constant power function
The adapter constant power function manages the amount of input current flowing to the
system and to the battery during a charging process. If the input current exceeds the chosen
input current limit, the PM6613N keeps the input current at the limit decreasing the charging
current. In this manner the system load has the priority. As the system load current
increases, the charging current linearly decreases down to 0 A. The input current is sensed
measuring the differential voltage between ACP and ACN pins where a small resistor is
connected. A suggested value is 10 mΩ, and eventually not more than 20 mΩ. Greater
values increase the sensitivity and a finer current limit management, but cause a higher
power loss and could lead to an overcurrent protection due to a higher voltage ripple. The
INPUT_AMP register sets the input current limit through SMBus. Valid ranges are between
128 mA and 16256 mA. Any attempt to write a value outside this range causes the register
to be cleared and any charging process to be stopped.
DocID024974 Rev 3
19/30
Operating description
4.8
PM6613N
Input current limit protection
An input current limit protection is integrated into the PM6613N. When the input current,
sensed by ACP and ACN pins, reaches 2 A more than the value stored on INPUT_AMP, the
internal circuit stops any charging process and sets the AOC bit of the STATUS register.
When the fault condition is not more present for 2.5 ms, the charging process is recovered
by a soft-start.
4.9
Thermal shutdown
A thermal protection feature is integrated in the PM6613N. If the junction temperature (TJ)
exceeds 165 °C, the internal circuitry stops any charging process and the bit TS of STATUS
register is set. When TJ falls below 145 °C, the charger exits from the fault condition and
after 2.5 ms the charging process resumes by a soft-start.
4.10
Battery protection
Several protection features disable the charging process if the battery condition falls in one
of the following conditions:
•
battery undervoltage
•
battery overvoltage
•
battery overcurrent
A voltage fault is detected sensing the battery voltage on SRN pin. A battery undervoltage
condition occurs when the SRN voltage is below 2.5 V: the LB bit of the STATUS register is
set. A battery overvoltage occurs when SRN voltage exceeds the charging voltage
according to the Table 13:
Table 13. Battery overvoltage detection ranges
Battery type
Overvoltage threshold
Li-Ion
CHRG_VOLT[mV]+170 mV* cells
Li-FePO4
CHRG_VOLT[mV]+144 mV* cells
Battery current is sensed by the current flowing through a small resistor connected between
SRP and SRN pins. An overcurrent condition occurs when the battery average current
exceeds the value set in the CHRG_AMP register by 2 A: the BOC bit of the STATUS
register is set.
4.11
Adapter insertion
When the ACDIV pin has a voltage under the ACDIVSLP (see Table 14), the PM6613N is in
sleep mode. If BSE of CHRG_OPT register is set, the BATFET selector is kept closed,
allowing the battery to supply the system. When the adapter is inserted, the ACDIV pin
voltage rises, and when it reaches a 0.65 V threshold, the PM6613N goes out of the sleep
mode. When the ACDIV pin reaches 2 V threshold, an internal comparator monitors this
condition for a programmable deglitch time, set to 250 ms at power-on reset. If the condition
is stable after this time, the ACOK pin goes high. This time can be reduced setting the AD bit
20/30
DocID024974 Rev 3
PM6613N
Operating description
of CHRG_OPT register. When ACOK is high, the ACFET selector has to be switched on, in
order to supply the B2B pin. This pin is used to provide the offset for the charge pump that
supplies the ACFET/RBFET selectors. Once B2B reaches the 2.5 V threshold, the BATFET
selector is switched off and the battery is disconnected from the system: in this case the
current flows to the system through the body diode of the selector. When the B2B pin
crosses the battery voltage (sensed by SRN pin) by 255 mV, the RBFET is switched ON.
From now on the system is supplied by the adapter. The described sequence is summarized
in the below table:
Table 14. Adapter insertion sequence
4.12
Condition
Action
Adapter insertion
ACDIV voltage rises
ACDIV > 0.65 V
PM6613N goes out of sleep mode
B2B pin forces a low voltage
ACDIV > 2 V
ACOK pin goes high after 250 ms
B2B pin stops forcing voltage
ACFET is turned on
B2B voltage rises
B2B > 2.5 V
BATFET is off
B2B > SRN+225 mV
ACFET/RBFET is on
Adapter removal
When the adapter is unplugged, a disconnection sequence occurs, bringing the charger into
a sleep mode. When the ACDIV pin goes below 1.95 V, the ACOK pin goes immediately
low: there's no deglitch time in this case. Any charging process is interrupted and the B2B
pin is internally discharged. The B2B pin is used to sense the system voltage through the
ACFET/RBFET selectors. When the B2B pin goes below the value of the battery plus 225
mV, the ACFET/RBFET selectors are opened if SOVR bit of CHRG_OPT is set, and the
BATFET selector is closed if the BSE bit of CHRG_OPT is set, allowing the battery to supply
the system. As the system voltage is much closer to the battery voltage, any inrush current
caused by system capacitors is avoided. When the ACDIV voltage goes below 0.6 V the
PM6613N is in sleep mode. The sequence is summarized in Table 15
Table 15. Adapter removal sequence
Condition
Action
Adapter unplugged
ACDIV voltage decreases
ACDIV < 1.95 V
ACOK goes low
B2B pin forces a low voltage
Internal circuitry disables any charging process
B2B < SRN+ 225 mV
ACFET/RBFET selectors opened
BATFET selector closed
ACDIV < 0.6 V
The PM6613N is in sleep mode
DocID024974 Rev 3
21/30
The PM6613N registers
PM6613N
5
The PM6613N registers
5.1
Charge option register (CHRG_OPT)
Address: 0x12
Reset value: 0x7101
Table 16. CHRG_OPT 0x12
15
14
13
AD
WD[1:0]
12
11
10
9
BSE
PF
EFA
EE
8
7
6
AM[1:0]
IS
5
4
3
SOVR BED ARED
2
1
CF
0
CI
Res
rw
•
•
•
•
•
22/30
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bit 15 AD: ACOK deglitch
–
set by software to enable a delay for the adapter insertion
–
0: the PM6613N waits for 250 ms for adapter voltage detection
–
1: the PM6613N waits for a time < 50 μs for adapter voltage detection
Bit [14:13] WD: watchdog
–
set by software to enable and select the timeout of the PM6613N watchdog
–
00: watchdog disabled
–
01: enabled, timeout at 44 sec.
–
10: enabled, timeout at 88 sec.
–
11: enabled, timeout at 175 sec.
Bit 12 BSE: BATFET sleep enabled
–
set by software to control the BATFET selector behavior, when the PM6613N is in
sleep mode
–
0: BATFET disabled during sleep mode
–
1: BATFET enabled during sleep mode
Bit 11 PF: PWM frequency
–
set by software to select the working PWM frequency of the buck converter
–
0: PWM frequency set to 700 kHz
–
1: PWM frequency set to 350 kHz
Bit 10 EFA: EMI frequency adjustments
–
set by software in order to increase or decrease by 15% the PWM frequency of the
buck converter when EE bit is enabled
–
0: PWM frequency decreased by 15%
–
1: PWM frequency increased by 15%
DocID024974 Rev 3
PM6613N
The PM6613N registers
•
•
•
•
•
•
•
Bit 9 EE: EMI enabled
–
set by software to enable the EMI reduction function
–
0: EMI disabled
–
1: EMI enabled
Bit 8:7 AM: asynchronous mode
–
set by software to choose the average charging current limit for passive
recirculation condition
–
00: 375 mA
–
01: 750 mA
–
10: 1125 mA
–
11: 1500 mA
Bit 6 IS: IOUT selection
–
set by software to choose which current has to be monitored through the IOUT pin
–
0: adapter current
–
1: battery current
Bit 5 SOVR: selector override
–
set by software to enable the external control of the RBFET/BATFET selectors.
Once set, RBFET/BATFET can be controlled by bits 3 and 4
–
0: override enabled
–
1: override disabled
Bit 4 BED: BATFET external driver
–
set by software to control the external selector BATFET. OVR bit has to be set, in
order to control BATFET
–
0: open BATFET
–
1: close BATFET
Bit 3 ARED: ACFET/RBFET external driver
–
set by software to control the external selectors ACFET/RBFET. OVR bit has to be
set, in order to control ACFET/RBFET
–
0: open ACFET/RBFET selectors
–
1: close ACFET/RBFET selectors
Bit 2 CF: clear fault
–
set by software to clear the STATUS register. The bit is cleared once the process
has been executed
–
0: STATUS register unchanged
–
1: clear STATUS register
•
Bit 1 reserved, read as 0
•
Bit 0 CI: charge inhibited
–
set by software to inhibit the charging process
–
0: charge enabled
–
1: charge inhibited
DocID024974 Rev 3
23/30
The PM6613N registers
5.2
PM6613N
STATUS register
Address: 0x13
Reset value: 0x0000
Table 17. Status 0x13
15
14
13
12
11
10
9
TS
8
7
6
5
4
HBRO RBSS AOC IOC BOV BOC
3
LB
2
1
AOV AUV
0
HS
Reserved
r
•
Bit 15:11 reserved, read as 0
•
Bit 10 TS: thermal shutdown
–
r
Bit 9 HBRO: HS BTST RBFET open
•
Bit 8 RBSS: RBFET selector short
•
•
r
r
r
r
set by hardware to indicate a short on RBFET between drain and source
–
0: no short detected
–
1: short detected
r
r
Bit 7 AOC: adapter overcurrent
set by hardware to indicate that the adapter current is 2 A higher than the value
Bit 6 OC: ILIM overcurrent
–
•
r
–
–
•
r
set by hardware to indicate that thermal shutdown condition occurred on the
PM6613N. Thermal shutdown occurs when the junction temperature (Tj) is higher
than 165 °C. It's cleared by hardware when Tj drops below 145 °C.
•
•
24/30
r
set by hardware when input current crosses the input limit set by INPUT_AMP
register and ILIM pin
–
0: no input overcurrent detected
–
1: input overcurrent detected
Bit 5 BOV: battery overvoltage
–
set by hardware when the PM6613N detects a battery voltage (SRN pin) higher
than the value reported on Table 13
–
0: no battery overvoltage detected
–
1: battery overvoltage detected
Bit 4 BOC: battery overcurrent
–
set by hardware when the PM6613N detects a current flowing through the battery,
2 A higher than the value set on CHRG_AMP register
–
0: no battery overcurrent detected
–
1: battery overcurrent detected
Bit 3 LB: low battery
–
set by hardware when the PM6613N detects a battery voltage (SRN pin) lower
than 2.5 V
–
0: no low battery condition detected
–
1: low battery condition detected
DocID024974 Rev 3
PM6613N
The PM6613N registers
•
Bit 2 AOV: ACDIV overvoltage
•
set by hardware when the PM6613N detects an ACDIV pin voltage higher than
2.625 V
–
0: no ACDIV overvoltage detected
–
1: ACDIV overvoltage detected
Bit 1 AUV: ACDIV undervoltage
•
5.3
–
–
set by hardware when the PM6613N detects an ACDIV pin voltage lower than 2 V
–
0: no ACDIV undervoltage detected
–
1: ACDIV undervoltage detected
Bit 0 HS: high-side short
–
set by hardware when a short condition is detected between drain and source of
the high-side MOS
–
0: no short detected on high-side MOS
–
1: short detected on high-side MOS
Charge current register (CHRG_AMP)
Address: 0x14
Reset value: 0x0000
Table 18. CHRG_AMP 0x14
15
14
13
12
11
10
9
8
7
6
rw
rw
rw
5
4
3
2
1
0
AMP[13:6]
Reserved
Reserved
rw
•
rw
rw
rw
rw
Bits 13:6 AMP[13:6]: charge current configuration bits
–
these bits are written by software and fix the amount of current to be delivered
when battery is charging. Values are in mA. The range goes from 64 mA when
AMP[13:6] = 0x0040 to 16320 mA when AMP[13:6] = 0x3FC0. Minimum step is 64
mA.
DocID024974 Rev 3
25/30
The PM6613N registers
5.4
PM6613N
Charge voltage register (CHRG_VOLT)
Address: 0x15
Reset value: 0x0000
Table 19. CHRG_VOLT 0x15
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
rw
rw
rw
rw
rw
rw
0
VOLT[14:1]
Res
Res
rw
•
rw
rw
rw
rw
rw
rw
rw
Bits 14:1 VOLT[14:1]: charge voltage configuration bits
–
these bits are written by software and fix the voltage to apply to the battery when it
is charging. Values are in mV and set according to the following formula:
Equation 2
V BAT = ( 2 ⋅ 2
VOLT [ 14 ÷ 1 ]
)mV
Not all the values are allowed. See Table 11 and Table 12 for allowable ranges.
5.5
Input current register (INPUT_AMP)
Address: 0x3F
Reset value: 0x2000
Table 20. INPUT_AMP 0x3F
15
14
Reserved
•
12
11
10
9
8
7
rw
rw
rw
6
AMP[13:7]
rw
rw
rw
rw
5
4
3
2
1
0
Reserved
Bits 13:7 AMP[13:7]: charge current configuration bits
–
26/30
13
these bits are written by software and fix the current limit delivered by the adapter.
The range goes from 128 mA when AMP[13:6] = 0x0080 to 16256 mA when
AMP[13:6] = 0x3F80. Minimum step is 128 mA.
DocID024974 Rev 3
PM6613N
6
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Table 21. VFQFPN 3x3x1.0 20 L pitch 0.4 package dimensions
Ref.
Min.
Typ.
Max.
A
0.8
0.90
1.00
A1
0.02
0.05
A2
0.65
1.00
A3
0.20
b
0.15
0.20
0.25
D
2.85
3.00
3.15
D1
1.60
D2
1.50
1.60
1.70
E
2.85
3.00
3.15
E1
1.60
E2
1.50
1.60
1.70
e
0.35
0.40
0.45
L
0.30
0.40
0.50
ddd
0.07
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Figure 5. VFQFPN 3x3x1.0 20 L pitch 0.4 mechanical data drawings
B5(9B$
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Revision history
Revision history
Table 22. Document revision history
Date
Revision
23-Jul-2013
1
Initial release.
2
Updated, in Table 5: Electrical characteristics, the following
parameters: IOP, ACDIVTH, VBATT_ERR, ICHG_ERR, IADP_G_ERR,
IBATT_G_ERR and IBATT_SRC.
Datasheet status promoted from preliminary to production data.
3
Changed the value of charge voltage accuracy from 0.5% to 1.53%
in the features.
Updated light load comparator, battery fault comparators, tR_ACOK
and fSW test conditions in Table 5: Electrical characteristics.
Updated IBATT_OC and IADP_OC parameters in Table 5: Electrical
characteristics.
Updated Table 7: Recommended operating conditions.
Changed the title of Table 16, Table 17, Table 18, Table 19 and
Table 20.
25-Sep-2013
27-Nov-2013
Changes
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