STD2NC40

N-CHANNEL 400V - 4.7Ω - 1.5A IPAK PowerMesh™ II MOSFET TYPE STD2NC40-1 s s s s s STD2NC40-1 VDSS 400V RDS(on) ID(on) x RDS(on)max, VGS = 10V Min. 2 Typ. 3 4.7 Max. 4 5.5 Unit V Ω 1.5 A DYNAMIC Symbol gfs (1) C iss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 Test Conditions VDS > ID(on) x RDS(on)max, ID =0.7A Min. Typ. 1.1 108 22.5 0.4 Max. Unit S pF pF pF 2/8 STD2NC40-1 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Q gd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 200V, I D = 0.7A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 320V, ID = 1.5A, VGS = 10V Min. Typ. 7.5 12 6.1 2.1 2.4 8.2 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Condit ions VDD = 320V, ID = 1.5A, R G = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Min. Typ. 20 27 29 Max. Unit ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 1.5A, VGS = 0 ISD = 1.5A, di/dt = 100A/µs, VDD = 100V, T j = 150°C (see test circuit, Figure 5) 180 625 5 Test Conditions Min. Typ. Max. 1.5 6 1.5 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/8 STD2NC40-1 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STD2NC40-1 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STD2NC40-1 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STD2NC40-1 TO-251 (IPAK) MECHANICAL DATA DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033 H C A C2 L2 D B3 B6 A1 L = = 3 B5 B A3 = B2 = G = E L1 1 2 = 0068771-E 7/8 STD2NC40-1 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8